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cpu/nrf5x_common: share nRF52 PWM driver with nRF53/nRF9160
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
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c19626c525
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@ -153,54 +153,6 @@ typedef struct {
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#define i2c_pin_scl(dev) i2c_config[dev].scl
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/** @} */
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/**
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* @name The PWM unit on the nRF52 supports 4 channels per device
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*/
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#define PWM_CHANNELS (4U)
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/**
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* @name Generate PWM mode values
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*
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* To encode the PWM mode, we use two bit:
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* - bit 0: select up or up-and-down counting
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* - bit 15: select polarity
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*/
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#define PWM_MODE(ud, pol) (ud | (pol << 15))
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/**
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* @brief Override the PWM mode definitions
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* @{
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*/
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#define HAVE_PWM_MODE_T
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typedef enum {
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PWM_LEFT = PWM_MODE(0, 1), /**< left aligned PWM */
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PWM_RIGHT = PWM_MODE(0, 0), /**< right aligned PWM */
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PWM_CENTER = PWM_MODE(1, 1), /**< not supported */
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PWM_CENTER_INV = PWM_MODE(1, 0) /**< not supported */
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} pwm_mode_t;
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/** @} */
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/**
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* @brief PWM configuration options
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*
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* Each device supports up to 4 channels. If you want to use less than 4
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* channels, just set the unused pins to GPIO_UNDEF.
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*
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* @note define unused pins only from right to left, so the defined channels
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* always start with channel 0 to x and the undefined ones are from x+1
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* to PWM_CHANNELS.
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*
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* @warning All the channels not in active use must be set to GPIO_UNDEF; just
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* initializing fewer members of pin would insert a 0 value, which
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* would be interpreted as the P0.00 pin that's then driven.
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*/
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#if defined(PWM_PRESENT) || DOXYGEN
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typedef struct {
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NRF_PWM_Type *dev; /**< PWM device descriptor */
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gpio_t pin[PWM_CHANNELS]; /**< PWM out pins */
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} pwm_conf_t;
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#endif
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/**
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* @brief Size of the UART TX buffer for non-blocking mode.
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*/
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@ -312,6 +312,55 @@ typedef struct {
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*/
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#define USBDEV_CPU_DMA_REQUIREMENTS __attribute__((aligned(USBDEV_CPU_DMA_ALIGNMENT)))
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#if !defined(CPU_FAM_NRF51) && !defined(DOXYGEN)
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/**
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* @brief The PWM unit on the nRF52, nRF53 and nRF9160
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* supports 4 channels per device
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*/
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#define PWM_CHANNELS (4U)
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/**
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* @brief Generate PWM mode values
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*
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* To encode the PWM mode, we use two bit:
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* - bit 0: select up or up-and-down counting
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* - bit 15: select polarity
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*/
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#define PWM_MODE(ud, pol) (ud | (pol << 15))
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/**
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* @brief Override the PWM mode definitions
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*/
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#define HAVE_PWM_MODE_T
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typedef enum {
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PWM_LEFT = PWM_MODE(0, 1), /**< left aligned PWM */
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PWM_RIGHT = PWM_MODE(0, 0), /**< right aligned PWM */
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PWM_CENTER = PWM_MODE(1, 1), /**< not supported */
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PWM_CENTER_INV = PWM_MODE(1, 0) /**< not supported */
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} pwm_mode_t;
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/**
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* @brief PWM configuration options
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*
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* Each device supports up to 4 channels. If you want to use less than 4
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* channels, just set the unused pins to GPIO_UNDEF.
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*
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* @note define unused pins only from right to left, so the defined channels
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* always start with channel 0 to x and the undefined ones are from x+1
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* to PWM_CHANNELS.
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*
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* @warning All the channels not in active use must be set to GPIO_UNDEF; just
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* initializing fewer members of pin would insert a 0 value, which
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* would be interpreted as the P0.00 pin that's then driven.
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*/
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#if defined(PWM_PRESENT)
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typedef struct {
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NRF_PWM_Type *dev; /**< PWM device descriptor */
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gpio_t pin[PWM_CHANNELS]; /**< PWM out pins */
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} pwm_conf_t;
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#endif
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#endif /* ndef CPU_FAM_NRF51 */
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#ifdef __cplusplus
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}
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#endif
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@ -7,6 +7,14 @@ ifneq (,$(filter periph_i2c,$(USEMODULE)))
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endif
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endif
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# Select the specific implementation for `periph_pwm`
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# nRF51 has its own PWM driver variant in its periph driver folder
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ifneq (,$(filter periph_pwm,$(USEMODULE)))
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ifneq (,$(filter $(CPU_FAM),nrf52 nrf53 nrf9160))
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SRC += pwm_nrfxx.c
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endif
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endif
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# Select the specific implementation for `periph_spi`
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ifneq (,$(filter periph_spi,$(USEMODULE)))
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ifneq (,$(filter $(CPU_FAM),nrf52 nrf9160))
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@ -7,7 +7,7 @@
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*/
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/**
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* @ingroup cpu_nrf52
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* @ingroup cpu_nrf5x_common
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* @{
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*
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* @file
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