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cpu/stm32f0: add STM32F030x4

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Benjamin Valentin 2019-09-28 02:31:15 +02:00 committed by Benjamin Valentin
parent 80c00339a4
commit 6db9421057
5 changed files with 5390 additions and 5 deletions
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5
cpu/stm32f0/include/cpu_conf.h
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@ -38,7 +38,7 @@ extern "C" {
#define CPU_DEFAULT_IRQ_PRIO (1U)
#if defined(CPU_LINE_STM32F030x8)
#define CPU_IRQ_NUMOF (29U)
#elif defined(CPU_LINE_STM32F031x6)
#elif defined(CPU_LINE_STM32F031x6) || defined(CPU_LINE_STM32F030x4)
#define CPU_IRQ_NUMOF (28U)
#elif defined(CPU_LINE_STM32F051x8) || defined(CPU_LINE_STM32F091xC)
#define CPU_IRQ_NUMOF (31U)
@ -58,7 +58,8 @@ extern "C" {
#if defined(CPU_LINE_STM32F091xC) || defined(CPU_LINE_STM32F072xB)
#define FLASHPAGE_SIZE (2048U)
#elif defined(CPU_LINE_STM32F051x8) || defined(CPU_LINE_STM32F042x6) \
|| defined(CPU_LINE_STM32F070xB) || defined(CPU_LINE_STM32F030x8)
|| defined(CPU_LINE_STM32F070xB) || defined(CPU_LINE_STM32F030x8) \
|| defined(CPU_LINE_STM32F030x4)
#define FLASHPAGE_SIZE (1024U)
#endif

5368
cpu/stm32f0/include/vendor/stm32f030x4.h vendored Normal file
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File diff suppressed because it is too large Load Diff

4
cpu/stm32f0/include/vendor/stm32f0xx.h vendored
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@ -129,7 +129,9 @@
* @{
*/
#if defined(STM32F030x6)
#if defined(STM32F030x4)
#include "stm32f030x4.h"
#elif defined(STM32F030x6)
#include "stm32f030x6.h"
#elif defined(STM32F030x8)
#include "stm32f030x8.h"

4
cpu/stm32f0/stm32_line.mk
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@ -5,7 +5,9 @@ MODEL1 := $(word 2, $(LINE))
MODEL2 := $(word 3, $(LINE))
ifneq (, $(filter $(TYPE), 030 031 042 070))
ifneq (, $(filter $(MODEL2), 4 6))
ifneq (, $(filter $(MODEL2), 4))
CPU_LINE = STM32F$(TYPE)x4
else ifneq (, $(filter $(MODEL2), 6))
CPU_LINE = STM32F$(TYPE)x6
else ifneq (, $(filter $(MODEL2), 8))
CPU_LINE = STM32F$(TYPE)x8

14
cpu/stm32f0/vectors.c
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@ -80,7 +80,19 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[22] = isr_tim17, /* [22] TIM17 global Interrupt */
[25] = isr_spi1, /* [25] SPI1 global Interrupt */
#if defined(CPU_LINE_STM32F030x8)
#if defined(CPU_LINE_STM32F030x4)
[ 4] = isr_rcc, /* [ 4] RCC global Interrupt */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupt */
[ 6] = isr_exti, /* [ 6] EXTI Line 2 and 3 Interrupt */
[ 7] = isr_exti, /* [ 7] EXTI Line 4 to 15 Interrupt */
[ 9] = isr_dma1_channel1, /* [ 9] DMA1 Channel 1 Interrupt */
[10] = isr_dma1_channel2_3, /* [10] DMA1 Channel 2 and Channel 3 Interrupt */
[11] = isr_dma1_channel4_5, /* [11] DMA1 Channel 4 and Channel 5 Interrupt */
[12] = isr_adc1, /* [12] ADC1 Interrupt */
[13] = isr_tim1_brk_up_trg_com, /* [13] TIM1 Break, Update, Trigger and Commutation Interrupt */
[23] = isr_i2c1, /* [23] I2C1 Event Interrupt */
[27] = isr_usart1, /* [27] USART1 global Interrupt */
#elif defined(CPU_LINE_STM32F030x8)
[ 4] = isr_rcc, /* [ 4] RCC global Interrupt */
[ 5] = isr_exti, /* [ 5] EXTI Line 0 and 1 Interrupt */
[ 6] = isr_exti, /* [ 6] EXTI Line 2 and 3 Interrupt */