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doc: some doxygen cleanups

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* removed RIOT unrelated cpu documentation
* introduced cpu_specific prefix to mark such documentation
* put oneway_malloc and crypto into sys group
This commit is contained in:
Oleg Hahm 2014-10-19 22:07:36 +02:00
parent 18ac4dfcb9
commit 6d8c0d74c3
11 changed files with 26335 additions and 26333 deletions
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6
cpu/nrf51822/include/nrf51.h
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@ -44,11 +44,11 @@
/** @addtogroup Nordic Semiconductor /** @addtogroup cpu_specific_Nordic Semiconductor
* @{ * @{
*/ */
/** @addtogroup nRF51 /** @addtogroup cpu_specific_nRF51
* @{ * @{
*/ */
@ -124,7 +124,7 @@ typedef enum {
/* ================================================================================ */ /* ================================================================================ */
/** @addtogroup Device_Peripheral_Registers /** @addtogroup cpu_specific_Device_Peripheral_Registers
* @{ * @{
*/ */

14
cpu/samd21/include/samd21.h
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@ -45,8 +45,8 @@
#define _SAMR21G18A_ #define _SAMR21G18A_
/** /**
* \ingroup SAMR21_definitions * \ingroup cpu_specific_SAMR21_definitions
* \addtogroup SAMR21G18A_definitions SAMR21G18A definitions * \addtogroup cpu_specific_SAMR21G18A_definitions SAMR21G18A definitions
* This file defines all structures and symbols for SAMR21G18A: * This file defines all structures and symbols for SAMR21G18A:
* - registers and bitfields * - registers and bitfields
* - peripheral base address * - peripheral base address
@ -247,7 +247,7 @@ void I2S_Handler ( void );
/* ************************************************************************** */ /* ************************************************************************** */
/** SOFTWARE PERIPHERAL API DEFINITION FOR SAMR21G18A */ /** SOFTWARE PERIPHERAL API DEFINITION FOR SAMR21G18A */
/* ************************************************************************** */ /* ************************************************************************** */
/** \defgroup SAMR21G18A_api Peripheral Software API */ /** \defgroup cpu_specific_SAMR21G18A_api Peripheral Software API */
/*@{*/ /*@{*/
#include "component/component_ac.h" #include "component/component_ac.h"
@ -275,7 +275,7 @@ void I2S_Handler ( void );
/* ************************************************************************** */ /* ************************************************************************** */
/** REGISTERS ACCESS DEFINITIONS FOR SAMR21G18A */ /** REGISTERS ACCESS DEFINITIONS FOR SAMR21G18A */
/* ************************************************************************** */ /* ************************************************************************** */
/** \defgroup SAMR21G18A_reg Registers Access Definitions */ /** \defgroup cpu_specific_SAMR21G18A_reg Registers Access Definitions */
/*@{*/ /*@{*/
#include "instance/instance_ac.h" #include "instance/instance_ac.h"
@ -314,7 +314,7 @@ void I2S_Handler ( void );
/* ************************************************************************** */ /* ************************************************************************** */
/** PERIPHERAL ID DEFINITIONS FOR SAMR21G18A */ /** PERIPHERAL ID DEFINITIONS FOR SAMR21G18A */
/* ************************************************************************** */ /* ************************************************************************** */
/** \defgroup SAMR21G18A_id Peripheral Ids Definitions */ /** \defgroup cpu_specific_SAMR21G18A_id Peripheral Ids Definitions */
/*@{*/ /*@{*/
// Peripheral instances on HPB0 bridge // Peripheral instances on HPB0 bridge
@ -361,7 +361,7 @@ void I2S_Handler ( void );
/* ************************************************************************** */ /* ************************************************************************** */
/** BASE ADDRESS DEFINITIONS FOR SAMR21G18A */ /** BASE ADDRESS DEFINITIONS FOR SAMR21G18A */
/* ************************************************************************** */ /* ************************************************************************** */
/** \defgroup SAMR21G18A_base Peripheral Base Address Definitions */ /** \defgroup cpu_specific_SAMR21G18A_base Peripheral Base Address Definitions */
/*@{*/ /*@{*/
#if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__) #if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
@ -514,7 +514,7 @@ void I2S_Handler ( void );
/* ************************************************************************** */ /* ************************************************************************** */
/** PORT DEFINITIONS FOR SAMR21G18A */ /** PORT DEFINITIONS FOR SAMR21G18A */
/* ************************************************************************** */ /* ************************************************************************** */
/** \defgroup SAMR21G18A_port PORT Definitions */ /** \defgroup cpu_specific_SAMR21G18A_port PORT Definitions */
/*@{*/ /*@{*/
#include "pio/pio_samr21g18a.h" #include "pio/pio_samr21g18a.h"

18
cpu/stm32f0/include/stm32f051x8.h
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@ -10,7 +10,7 @@
* This file contains: * This file contains:
* - Data structures and the address mapping for all peripherals * - Data structures and the address mapping for all peripherals
* - Peripheral's registers declarations and bits definition * - Peripheral's registers declarations and bits definition
* - Macros to access peripheral’s registers hardware * - Macros to access peripheral?s registers hardware
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -46,7 +46,7 @@
* @{ * @{
*/ */
/** @addtogroup stm32f051x8 /** @addtogroup cpu_specific_stm32f051x8
* @{ * @{
*/ */
@ -73,7 +73,7 @@
* @} * @}
*/ */
/** @addtogroup Peripheral_interrupt_number_definition /** @addtogroup cpu_specific_Peripheral_interrupt_number_definition
* @{ * @{
*/ */
@ -128,7 +128,7 @@ typedef enum
#include "core_cm0.h" /* Cortex-M0 processor and core peripherals */ #include "core_cm0.h" /* Cortex-M0 processor and core peripherals */
#include <stdint.h> #include <stdint.h>
/** @addtogroup Peripheral_registers_structures /** @addtogroup cpu_specific_Peripheral_registers_structures
* @{ * @{
*/ */
@ -552,7 +552,7 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Peripheral_memory_map /** @addtogroup cpu_specific_Peripheral_memory_map
* @{ * @{
*/ */
@ -616,7 +616,7 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Peripheral_declaration /** @addtogroup cpu_specific_Peripheral_declaration
* @{ * @{
*/ */
@ -669,11 +669,11 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Exported_constants /** @addtogroup cpu_specific_Exported_constants
* @{ * @{
*/ */
/** @addtogroup Peripheral_Registers_Bits_Definition /** @addtogroup cpu_specific_Peripheral_Registers_Bits_Definition
* @{ * @{
*/ */
@ -3485,7 +3485,7 @@ typedef struct
*/ */
/** @addtogroup Exported_macro /** @addtogroup cpu_specific_Exported_macro
* @{ * @{
*/ */

2
cpu/stm32f1/include/cpu-conf.h
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@ -9,7 +9,7 @@
/** /**
* @defgroup cpu_stm32f1 STM32F1 * @defgroup cpu_stm32f1 STM32F1
* @addtogroup cpu * @ingroup cpu
* @brief CPU specific implementations for the STM32F1 * @brief CPU specific implementations for the STM32F1
* @{ * @{
* *

18
cpu/stm32f1/include/stm32f10x.h
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@ -43,7 +43,7 @@
* @{ * @{
*/ */
/** @addtogroup stm32f10x /** @addtogroup cpu_specific_stm32f10x
* @{ * @{
*/ */
@ -54,7 +54,7 @@
extern "C" { extern "C" {
#endif #endif
/** @addtogroup Library_configuration_section /** @addtogroup cpu_specific_Library_configuration_section
* @{ * @{
*/ */
@ -480,7 +480,7 @@ typedef enum IRQn
#include "core_cm3.h" #include "core_cm3.h"
#include <stdint.h> #include <stdint.h>
/** @addtogroup Exported_types /** @addtogroup cpu_specific_Exported_types
* @{ * @{
*/ */
@ -532,7 +532,7 @@ typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
* @} * @}
*/ */
/** @addtogroup Peripheral_registers_structures /** @addtogroup cpu_specific_Peripheral_registers_structures
* @{ * @{
*/ */
@ -1265,7 +1265,7 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Peripheral_memory_map /** @addtogroup cpu_specific_Peripheral_memory_map
* @{ * @{
*/ */
@ -1374,7 +1374,7 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Peripheral_declaration /** @addtogroup cpu_specific_Peripheral_declaration
* @{ * @{
*/ */
@ -1457,11 +1457,11 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Exported_constants /** @addtogroup cpu_specific_Exported_constants
* @{ * @{
*/ */
/** @addtogroup Peripheral_Registers_Bits_Definition /** @addtogroup cpu_specific_Peripheral_Registers_Bits_Definition
* @{ * @{
*/ */
@ -8298,7 +8298,7 @@ typedef struct
#include "stm32f10x_conf.h" #include "stm32f10x_conf.h"
#endif #endif
/** @addtogroup Exported_macro /** @addtogroup cpu_specific_Exported_macro
* @{ * @{
*/ */

18
cpu/stm32f3/include/stm32f303xc.h
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@ -9,7 +9,7 @@
* This file contains: * This file contains:
* - Data structures and the address mapping for all peripherals * - Data structures and the address mapping for all peripherals
* - Peripheral's registers declarations and bits definition * - Peripheral's registers declarations and bits definition
* - Macros to access peripheral’s registers hardware * - Macros to access peripheral?s registers hardware
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -45,7 +45,7 @@
* @{ * @{
*/ */
/** @addtogroup stm32f303xc /** @addtogroup cpu_specific_stm32f303xc
* @{ * @{
*/ */
@ -73,7 +73,7 @@
* @} * @}
*/ */
/** @addtogroup Peripheral_interrupt_number_definition /** @addtogroup cpu_specific_Peripheral_interrupt_number_definition
* @{ * @{
*/ */
@ -168,7 +168,7 @@ typedef enum
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ #include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
#include <stdint.h> #include <stdint.h>
/** @addtogroup Peripheral_registers_structures /** @addtogroup cpu_specific_Peripheral_registers_structures
* @{ * @{
*/ */
@ -700,7 +700,7 @@ typedef struct
__IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */
} WWDG_TypeDef; } WWDG_TypeDef;
/** @addtogroup Peripheral_memory_map /** @addtogroup cpu_specific_Peripheral_memory_map
* @{ * @{
*/ */
@ -813,7 +813,7 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Peripheral_declaration /** @addtogroup cpu_specific_Peripheral_declaration
* @{ * @{
*/ */
#define TIM2 ((TIM_TypeDef *) TIM2_BASE) #define TIM2 ((TIM_TypeDef *) TIM2_BASE)
@ -897,11 +897,11 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Exported_constants /** @addtogroup cpu_specific_Exported_constants
* @{ * @{
*/ */
/** @addtogroup Peripheral_Registers_Bits_Definition /** @addtogroup cpu_specific_Peripheral_Registers_Bits_Definition
* @{ * @{
*/ */
@ -6426,7 +6426,7 @@ typedef struct
* @} * @}
*/ */
/** @addtogroup Exported_macros /** @addtogroup cpu_specific_Exported_macros
* @{ * @{
*/ */

16
cpu/stm32f4/include/stm32f407xx.h
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@ -9,7 +9,7 @@
* This file contains: * This file contains:
* - Data structures and the address mapping for all peripherals * - Data structures and the address mapping for all peripherals
* - Peripheral's registers declarations and bits definition * - Peripheral's registers declarations and bits definition
* - Macros to access peripheral’s registers hardware * - Macros to access peripheral?s registers hardware
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -45,7 +45,7 @@
* @{ * @{
*/ */
/** @addtogroup stm32f407xx /** @addtogroup cpu_specific_stm32f407xx
* @{ * @{
*/ */
@ -74,7 +74,7 @@
* @} * @}
*/ */
/** @addtogroup Peripheral_interrupt_number_definition /** @addtogroup cpu_specific_Peripheral_interrupt_number_definition
* @{ * @{
*/ */
@ -184,7 +184,7 @@ typedef enum
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ #include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
#include <stdint.h> #include <stdint.h>
/** @addtogroup Peripheral_registers_structures /** @addtogroup cpu_specific_Peripheral_registers_structures
* @{ * @{
*/ */
@ -1078,7 +1078,7 @@ USB_OTG_HostChannelTypeDef;
* @} * @}
*/ */
/** @addtogroup Peripheral_declaration /** @addtogroup cpu_specific_Peripheral_declaration
* @{ * @{
*/ */
#define TIM2 ((TIM_TypeDef *) TIM2_BASE) #define TIM2 ((TIM_TypeDef *) TIM2_BASE)
@ -1170,11 +1170,11 @@ USB_OTG_HostChannelTypeDef;
* @} * @}
*/ */
/** @addtogroup Exported_constants /** @addtogroup cpu_specific_Exported_constants
* @{ * @{
*/ */
/** @addtogroup Peripheral_Registers_Bits_Definition /** @addtogroup cpu_specific_Peripheral_Registers_Bits_Definition
* @{ * @{
*/ */
@ -7580,7 +7580,7 @@ USB_OTG_HostChannelTypeDef;
* @} * @}
*/ */
/** @addtogroup Exported_macros /** @addtogroup cpu_specific_Exported_macros
* @{ * @{
*/ */

18
cpu/stm32f4/include/stm32f415xx.h
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@ -9,7 +9,7 @@
* This file contains: * This file contains:
* - Data structures and the address mapping for all peripherals * - Data structures and the address mapping for all peripherals
* - Peripheral's registers declarations and bits definition * - Peripheral's registers declarations and bits definition
* - Macros to access peripheral’s registers hardware * - Macros to access peripheral?s registers hardware
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -45,7 +45,7 @@
* @{ * @{
*/ */
/** @addtogroup stm32f415xx /** @addtogroup cpu_specific_stm32f415xx
* @{ * @{
*/ */
@ -57,7 +57,7 @@
#endif /* __cplusplus */ #endif /* __cplusplus */
/** @addtogroup Configuration_section_for_CMSIS /** @addtogroup cpu_specific_Configuration_section_for_CMSIS
* @{ * @{
*/ */
@ -74,7 +74,7 @@
* @} * @}
*/ */
/** @addtogroup Peripheral_interrupt_number_definition /** @addtogroup cpu_specific_Peripheral_interrupt_number_definition
* @{ * @{
*/ */
@ -182,7 +182,7 @@ typedef enum
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ #include "core_cm4.h" /* Cortex-M4 processor and core peripherals */
#include <stdint.h> #include <stdint.h>
/** @addtogroup Peripheral_registers_structures /** @addtogroup cpu_specific_Peripheral_registers_structures
* @{ * @{
*/ */
@ -1050,7 +1050,7 @@ USB_OTG_HostChannelTypeDef;
* @} * @}
*/ */
/** @addtogroup Peripheral_declaration /** @addtogroup cpu_specific_Peripheral_declaration
* @{ * @{
*/ */
#define TIM2 ((TIM_TypeDef *) TIM2_BASE) #define TIM2 ((TIM_TypeDef *) TIM2_BASE)
@ -1143,11 +1143,11 @@ USB_OTG_HostChannelTypeDef;
* @} * @}
*/ */
/** @addtogroup Exported_constants /** @addtogroup cpu_specific_Exported_constants
* @{ * @{
*/ */
/** @addtogroup Peripheral_Registers_Bits_Definition /** @addtogroup cpu_specific_Peripheral_Registers_Bits_Definition
* @{ * @{
*/ */
@ -7158,7 +7158,7 @@ USB_OTG_HostChannelTypeDef;
* @} * @}
*/ */
/** @addtogroup Exported_macros /** @addtogroup cpu_specific_Exported_macros
* @{ * @{
*/ */

4
doc/doxygen/riot.doxyfile
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@ -91,8 +91,8 @@ FILE_PATTERNS = *.txt *.h
RECURSIVE = YES RECURSIVE = YES
EXCLUDE = EXCLUDE =
EXCLUDE_SYMLINKS = NO EXCLUDE_SYMLINKS = NO
EXCLUDE_PATTERNS = */board/*/tools/* EXCLUDE_PATTERNS = */board/*/tools/* */cpu/*/include/component/* */cpu/*/include/instance/*
EXCLUDE_SYMBOLS = EXCLUDE_SYMBOLS = *CMSIS* *cmsis* *cpu_specific*
EXAMPLE_PATH = EXAMPLE_PATH =
EXAMPLE_PATTERNS = EXAMPLE_PATTERNS =
EXAMPLE_RECURSIVE = NO EXAMPLE_RECURSIVE = NO

1
sys/crypto/doc.txt
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@ -8,5 +8,6 @@
/** /**
* @defgroup sys_crypto Crypto * @defgroup sys_crypto Crypto
* @ingroup sys
* @brief The crypto module is a lose collection of different crypto and hash algorithms * @brief The crypto module is a lose collection of different crypto and hash algorithms
*/ */

3
sys/oneway-malloc/include/malloc.h
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@ -7,7 +7,8 @@
*/ */
/** /**
* @addtogroup oneway_malloc * @defgroup oneway_malloc
* @ingroup sys
* @{ * @{
* @file malloc.h * @file malloc.h
* @brief A malloc implementation for MSP-430 boards without free. * @brief A malloc implementation for MSP-430 boards without free.