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stm32f1: implement new cpuid_get

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This commit is contained in:
Thomas Eichinger 2014-08-19 15:21:51 +02:00
parent c28aebf105
commit 6b43b3f587
7 changed files with 37 additions and 224 deletions
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4
boards/iot-lab_M3/drivers/at86rf231_driver.c
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@ -26,7 +26,7 @@
#include "arch/thread_arch.h" #include "arch/thread_arch.h"
#include "periph/gpio.h" #include "periph/gpio.h"
#include "spi.h" #include "periph/spi.h"
#include "periph_conf.h" #include "periph_conf.h"
#include "at86rf231.h" #include "at86rf231.h"
@ -105,7 +105,7 @@ void at86rf231_gpio_spi_interrupts_init(void)
gpio_init_in(SPI_0_MISO_GPIO, GPIO_NOPULL); gpio_init_in(SPI_0_MISO_GPIO, GPIO_NOPULL);
/* SPI init */ /* SPI init */
spi_init_master(SPI_0, SPI_CONF_FIRST_RISING, 4500000); spi_init_master(SPI_0, SPI_CONF_FIRST_RISING, SPI_SPEED_5MHZ);
spi_poweron(SPI_0); spi_poweron(SPI_0);

38
boards/iot-lab_M3/drivers/at86rf231_spi1.c
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@ -1,38 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup board_iot-lab_M3
* @{
*
* @file at86rf231_spi1.c
* @brief Board specific implementations for the at86rf231 SPI interface
*
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* @}
*/
#include "cpu.h"
#include "spi.h"
/*
SPI1
SCLK : PA5
MISO : PA6
MOSI : PA7
CS : PA4
GPIO
IRQ0 : PC4 : Frame buff empty indicator
DIG2 : ? : RX Frame Time stamping XXX : NOT USED
Reset : PC1 : active low, enable chip
SLEEP : PA2 : control sleep, tx & rx state
*/

4
cpu/stm32f1/include/cpu-conf.h
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@ -52,9 +52,9 @@
/** @} */ /** @} */
/** /**
* @name Macro for reading CPU_ID * @name Length for reading CPU_ID
*/ */
#define GET_CPU_ID(id) memcpy(&id, (void *)(0x1ffff7e8), CPU_ID_LEN) #define CPU_ID_LEN (12)
/** /**
* @name Definition of different panic modes * @name Definition of different panic modes

176
cpu/stm32f1/include/spi.h
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@ -1,176 +0,0 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup driver_periph
* @brief Low-level SPI peripheral driver
* @{
*
* @file
* @brief Low-level SPI peripheral driver interface definitions
*
* TODO: optimize interface for master AND slave usage, interface is focused on master mode so far...
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef __SPI_H
#define __SPI_H
#include "periph_conf.h"
/**
* @brief Definition available SPI devices
*/
typedef enum {
#if SPI_0_EN
SPI_0 = 0, /**< SPI device 0 */
#endif
#if SPI_1_EN
SPI_1, /**< SPI device 1 */
#endif
#if SPI_2_EN
SPI_2, /**< SPI device 2 */
#endif
#if SPI_3_EN
SPI_3, /**< SPI device 3 */
#endif
SPI_UNDEFINED
} spi_t;
/**
* @brief The SPI mode is defined by the four possible combinations of clock polarity and
* clock phase.
*/
typedef enum {
SPI_CONF_FIRST_RISING = 0, /**< first data bit is transacted on the first rising SCK edge */
SPI_CONF_SECOND_RISING, /**< first data bit is transacted on the second rising SCK edge */
SPI_CONF_FIRST_FALLING, /**< first data bit is transacted on the first falling SCK edge */
SPI_CONF_SECOND_FALLING /**< first data bit is transacted on the second falling SCK edge */
} spi_conf_t;
/**
* @brief Initialize the given SPI device to work in master mode
*
* In master mode the SPI device is configured to control the SPI bus. This means the device
* will start and end all communication on the bus and control the CLK line. For transferring
* data on the bus the below defined transfer functions should be used.
*
* @param[in] dev SPI device to initialize
* @param[in] conf Mode of clock phase and clock polarity
* @param[in] speed SPI bus speed in Hz
*
* @return 0 on success
* @return -1 on undefined SPI device
* @return -2 on unavailable speed value
*/
int spi_init_master(spi_t dev, spi_conf_t conf, uint32_t speed);
/**
* @brief Initialize the given SPI device to work in slave mode
*
* In slave mode the SPI device is purely reacting to the bus. Transaction will be started and
* ended by a connected SPI master. When a byte is received, the callback is called in interrupt
* context with this byte as argument. The return byte of the callback is transferred to the
* master in the next transmission cycle. This interface enables easy implementation of a register
* based access paradigm for the SPI slave.
*
* @param[in] dev The SPI device to initialize as SPI slave
* @param[in] conf Mode of clock phase and polarity
* @param[in] cb callback on received byte
*
* @return 0 on success
* @return -1 on undefined SPI device
* @return -2 on unavailable speed value
*/
int spi_init_slave(spi_t dev, spi_conf_t conf, char (*cb)(char));
/**
* @brief Transfer one byte on the given SPI bus
*
* @param[in] dev SPI device to use
* @param[in] out Byte to send out, set NULL if only receiving
* @param[out] in Byte to read, set NULL if only sending
*
* @return Number of bytes that were transfered
* @return -1 on error
*/
int spi_transfer_byte(spi_t dev, char out, char *in);
/**
* @brief Transfer a number bytes on the given SPI bus
*
* @param[in] dev SPI device to use
* @param[in] out Array of bytes to send, set NULL if only receiving
* @param[out] in Buffer to receive bytes to, set NULL if only sending
* @param[in] length Number of bytes to transfer
*
* @return Number of bytes that were transfered
* @return -1 on error
*/
int spi_transfer_bytes(spi_t dev, char *out, char *in, int length);
/**
* @brief Transfer one byte to/from a given register address
*
* This function is a shortcut function for easier handling of register based SPI devices. As
* many SPI devices use a register based addressing scheme, this function is a convenient short-
* cut for interfacing with such devices.
*
* @param[in] dev SPI device to use
* @param[in] reg Register address to transfer data to/from
* @param[in] out Byte to send, set NULL if only receiving data
* @param[out] in Byte to read, set NULL if only sending
*
* @return Number of bytes that were transfered
* @return -1 on error
*/
int spi_transfer_reg(spi_t dev, uint8_t reg, char *out, char *in);
/**
* @brief Transfer a number of bytes from/to a given register address
*
* This function is a shortcut function for easier handling of register based SPI devices. As
* many SPI devices use a register based addressing scheme, this function is a convenient short-
* cut for interfacing with such devices.
*
* @param[in] dev SPI device to use
* @param[in] reg Register address to transfer data to/from
* @param[in] out Byte array to send data from, set NULL if only receiving
* @param[out] in Byte buffer to read into, set NULL if only sending
* @param[in] length Number of bytes to transfer
*
* @return Number of bytes that were transfered
* @return -1 on error
*/
int spi_transfer_regs(spi_t dev, uint8_t reg, char *out, char *in, int length);
/**
* @brief Power on the given SPI device
*
* @param[in] dev SPI device to power on
*
* @return 0 on success
* @return -1 on undefined device
*/
int spi_poweron(spi_t dev);
/**
* @brief Power off the given SPI device
*
* @param[in] dev SPI device to power off
*
* @return 0 on success
* @return -1 on undefined device
*/
int spi_poweroff(spi_t dev);
#endif /* __SPI_H */
/** @} */

8
cpu/stm32f1/include/stm32f10x.h
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@ -15,15 +15,15 @@
* is using in the C source code, usually in main.c. This file contains: * is using in the C source code, usually in main.c. This file contains:
* - Configuration section that allows to select: * - Configuration section that allows to select:
* - The device used in the target application * - The device used in the target application
* - To use or not the peripheral’s drivers in application code(i.e. * - To use or not the peripheral’s drivers in application code(i.e.
* code will be based on direct access to peripheral’s registers * code will be based on direct access to peripheral’s registers
* rather than drivers API), this option is controlled by * rather than drivers API), this option is controlled by
* "#define USE_STDPERIPH_DRIVER" * "#define USE_STDPERIPH_DRIVER"
* - To change few application-specific parameters such as the HSE * - To change few application-specific parameters such as the HSE
* crystal frequency * crystal frequency
* - Data structures and the address mapping for all peripherals * - Data structures and the address mapping for all peripherals
* - Peripheral's registers declarations and bits definition * - Peripheral's registers declarations and bits definition
* - Macros to access peripheral’s registers hardware * - Macros to access peripheral’s registers hardware
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
@ -112,7 +112,7 @@
Tip: To avoid modifying this file each time you need to use different HSE, you Tip: To avoid modifying this file each time you need to use different HSE, you
can define the HSE value in your toolchain compiler preprocessor. can define the HSE value in your toolchain compiler preprocessor.
*/ */
#define HSE_VALUE ((uint32_t)16000000) // NOTE : agilefox #define HSE_VALUE ((uint32_t)16000000) /*!< NOTE : agilefox */
#if !defined HSE_VALUE #if !defined HSE_VALUE
#ifdef STM32F10X_CL #ifdef STM32F10X_CL

29
cpu/stm32f1/periph/cpuid.c Normal file
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@ -0,0 +1,29 @@
/*
* Copyright (C) 2014 FU Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup driver_periph
* @{
*
* @file cpuid.c
* @brief Implementation
*
* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*/
#include <string.h>
#include "cpu-conf.h"
#include "periph/cpuid.h"
void cpuid_get(void *id)
{
memcpy(id, (void *)(0x1ffff7e8), CPU_ID_LEN);
}
/** @} */

2
cpu/stm32f1/periph/uart.c
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@ -179,7 +179,6 @@ void uart_tx_begin(uart_t uart)
UART_1_DEV->CR1 |= USART_CR1_TXEIE; UART_1_DEV->CR1 |= USART_CR1_TXEIE;
break; break;
#endif #endif
break;
} }
} }
@ -196,7 +195,6 @@ void uart_tx_end(uart_t uart)
UART_1_DEV->CR1 &= ~USART_CR1_TXEIE; UART_1_DEV->CR1 &= ~USART_CR1_TXEIE;
break; break;
#endif #endif
break;
} }
} }