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https://github.com/RIOT-OS/RIOT.git
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stm32f1: implement new cpuid_get
This commit is contained in:
Thomas Eichinger
parent
c28aebf105
commit
6b43b3f587
@ -26,7 +26,7 @@
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#include "arch/thread_arch.h"
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#include "periph/gpio.h"
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#include "spi.h"
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#include "periph/spi.h"
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#include "periph_conf.h"
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#include "at86rf231.h"
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@ -105,7 +105,7 @@ void at86rf231_gpio_spi_interrupts_init(void)
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gpio_init_in(SPI_0_MISO_GPIO, GPIO_NOPULL);
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/* SPI init */
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spi_init_master(SPI_0, SPI_CONF_FIRST_RISING, 4500000);
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spi_init_master(SPI_0, SPI_CONF_FIRST_RISING, SPI_SPEED_5MHZ);
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spi_poweron(SPI_0);
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@ -1,38 +0,0 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup board_iot-lab_M3
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* @{
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*
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* @file at86rf231_spi1.c
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* @brief Board specific implementations for the at86rf231 SPI interface
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*
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* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "spi.h"
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/*
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SPI1
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SCLK : PA5
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MISO : PA6
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MOSI : PA7
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CS : PA4
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GPIO
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IRQ0 : PC4 : Frame buff empty indicator
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DIG2 : ? : RX Frame Time stamping XXX : NOT USED
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Reset : PC1 : active low, enable chip
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SLEEP : PA2 : control sleep, tx & rx state
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*/
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@ -52,9 +52,9 @@
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/** @} */
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/**
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* @name Macro for reading CPU_ID
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* @name Length for reading CPU_ID
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*/
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#define GET_CPU_ID(id) memcpy(&id, (void *)(0x1ffff7e8), CPU_ID_LEN)
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#define CPU_ID_LEN (12)
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/**
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* @name Definition of different panic modes
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@ -1,176 +0,0 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup driver_periph
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* @brief Low-level SPI peripheral driver
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* @{
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*
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* @file
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* @brief Low-level SPI peripheral driver interface definitions
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*
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* TODO: optimize interface for master AND slave usage, interface is focused on master mode so far...
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef __SPI_H
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#define __SPI_H
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#include "periph_conf.h"
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/**
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* @brief Definition available SPI devices
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*/
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typedef enum {
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#if SPI_0_EN
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SPI_0 = 0, /**< SPI device 0 */
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#endif
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#if SPI_1_EN
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SPI_1, /**< SPI device 1 */
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#endif
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#if SPI_2_EN
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SPI_2, /**< SPI device 2 */
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#endif
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#if SPI_3_EN
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SPI_3, /**< SPI device 3 */
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#endif
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SPI_UNDEFINED
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} spi_t;
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/**
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* @brief The SPI mode is defined by the four possible combinations of clock polarity and
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* clock phase.
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*/
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typedef enum {
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SPI_CONF_FIRST_RISING = 0, /**< first data bit is transacted on the first rising SCK edge */
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SPI_CONF_SECOND_RISING, /**< first data bit is transacted on the second rising SCK edge */
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SPI_CONF_FIRST_FALLING, /**< first data bit is transacted on the first falling SCK edge */
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SPI_CONF_SECOND_FALLING /**< first data bit is transacted on the second falling SCK edge */
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} spi_conf_t;
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/**
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* @brief Initialize the given SPI device to work in master mode
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*
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* In master mode the SPI device is configured to control the SPI bus. This means the device
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* will start and end all communication on the bus and control the CLK line. For transferring
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* data on the bus the below defined transfer functions should be used.
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*
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* @param[in] dev SPI device to initialize
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* @param[in] conf Mode of clock phase and clock polarity
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* @param[in] speed SPI bus speed in Hz
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*
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* @return 0 on success
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* @return -1 on undefined SPI device
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* @return -2 on unavailable speed value
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*/
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int spi_init_master(spi_t dev, spi_conf_t conf, uint32_t speed);
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/**
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* @brief Initialize the given SPI device to work in slave mode
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*
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* In slave mode the SPI device is purely reacting to the bus. Transaction will be started and
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* ended by a connected SPI master. When a byte is received, the callback is called in interrupt
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* context with this byte as argument. The return byte of the callback is transferred to the
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* master in the next transmission cycle. This interface enables easy implementation of a register
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* based access paradigm for the SPI slave.
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*
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* @param[in] dev The SPI device to initialize as SPI slave
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* @param[in] conf Mode of clock phase and polarity
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* @param[in] cb callback on received byte
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*
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* @return 0 on success
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* @return -1 on undefined SPI device
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* @return -2 on unavailable speed value
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*/
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int spi_init_slave(spi_t dev, spi_conf_t conf, char (*cb)(char));
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/**
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* @brief Transfer one byte on the given SPI bus
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*
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* @param[in] dev SPI device to use
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* @param[in] out Byte to send out, set NULL if only receiving
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* @param[out] in Byte to read, set NULL if only sending
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*
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* @return Number of bytes that were transfered
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* @return -1 on error
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*/
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int spi_transfer_byte(spi_t dev, char out, char *in);
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/**
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* @brief Transfer a number bytes on the given SPI bus
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*
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* @param[in] dev SPI device to use
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* @param[in] out Array of bytes to send, set NULL if only receiving
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* @param[out] in Buffer to receive bytes to, set NULL if only sending
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* @param[in] length Number of bytes to transfer
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*
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* @return Number of bytes that were transfered
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* @return -1 on error
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*/
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int spi_transfer_bytes(spi_t dev, char *out, char *in, int length);
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/**
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* @brief Transfer one byte to/from a given register address
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*
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* This function is a shortcut function for easier handling of register based SPI devices. As
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* many SPI devices use a register based addressing scheme, this function is a convenient short-
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* cut for interfacing with such devices.
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*
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* @param[in] dev SPI device to use
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* @param[in] reg Register address to transfer data to/from
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* @param[in] out Byte to send, set NULL if only receiving data
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* @param[out] in Byte to read, set NULL if only sending
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*
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* @return Number of bytes that were transfered
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* @return -1 on error
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*/
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int spi_transfer_reg(spi_t dev, uint8_t reg, char *out, char *in);
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/**
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* @brief Transfer a number of bytes from/to a given register address
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*
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* This function is a shortcut function for easier handling of register based SPI devices. As
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* many SPI devices use a register based addressing scheme, this function is a convenient short-
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* cut for interfacing with such devices.
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*
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* @param[in] dev SPI device to use
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* @param[in] reg Register address to transfer data to/from
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* @param[in] out Byte array to send data from, set NULL if only receiving
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* @param[out] in Byte buffer to read into, set NULL if only sending
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* @param[in] length Number of bytes to transfer
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*
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* @return Number of bytes that were transfered
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* @return -1 on error
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*/
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int spi_transfer_regs(spi_t dev, uint8_t reg, char *out, char *in, int length);
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/**
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* @brief Power on the given SPI device
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*
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* @param[in] dev SPI device to power on
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*
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* @return 0 on success
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* @return -1 on undefined device
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*/
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int spi_poweron(spi_t dev);
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/**
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* @brief Power off the given SPI device
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*
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* @param[in] dev SPI device to power off
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*
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* @return 0 on success
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* @return -1 on undefined device
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*/
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int spi_poweroff(spi_t dev);
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#endif /* __SPI_H */
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/** @} */
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@ -15,15 +15,15 @@
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* is using in the C source code, usually in main.c. This file contains:
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* - Configuration section that allows to select:
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* - The device used in the target application
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* - To use or not the peripheral’s drivers in application code(i.e.
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* code will be based on direct access to peripheral’s registers
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* - To use or not the peripheral’s drivers in application code(i.e.
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* code will be based on direct access to peripheral’s registers
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* rather than drivers API), this option is controlled by
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* "#define USE_STDPERIPH_DRIVER"
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* - To change few application-specific parameters such as the HSE
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* crystal frequency
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* - Data structures and the address mapping for all peripherals
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* - Peripheral's registers declarations and bits definition
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* - Macros to access peripheral’s registers hardware
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* - Macros to access peripheral’s registers hardware
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*
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******************************************************************************
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* @attention
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@ -112,7 +112,7 @@
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Tip: To avoid modifying this file each time you need to use different HSE, you
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can define the HSE value in your toolchain compiler preprocessor.
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*/
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#define HSE_VALUE ((uint32_t)16000000) // NOTE : agilefox
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#define HSE_VALUE ((uint32_t)16000000) /*!< NOTE : agilefox */
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#if !defined HSE_VALUE
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#ifdef STM32F10X_CL
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29
cpu/stm32f1/periph/cpuid.c
Normal file
29
cpu/stm32f1/periph/cpuid.c
Normal file
@ -0,0 +1,29 @@
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/*
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* Copyright (C) 2014 FU Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup driver_periph
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* @{
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*
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* @file cpuid.c
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* @brief Implementation
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*
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* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
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*/
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#include <string.h>
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#include "cpu-conf.h"
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#include "periph/cpuid.h"
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void cpuid_get(void *id)
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{
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memcpy(id, (void *)(0x1ffff7e8), CPU_ID_LEN);
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}
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/** @} */
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@ -179,7 +179,6 @@ void uart_tx_begin(uart_t uart)
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UART_1_DEV->CR1 |= USART_CR1_TXEIE;
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break;
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#endif
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break;
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}
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}
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@ -196,7 +195,6 @@ void uart_tx_end(uart_t uart)
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UART_1_DEV->CR1 &= ~USART_CR1_TXEIE;
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break;
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#endif
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break;
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}
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}
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