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Merge pull request #16802 from fjmolinas/pr_stm32_periph_rtc_mem
cpu/stm32: add rtc_mem
This commit is contained in:
commit
69b7db2d94
@ -35,4 +35,9 @@ ifneq (,$(filter periph_eth periph_ptp,$(USEMODULE)))
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USEMODULE += periph_eth_common
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endif
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# periph_rtc_mem is currently tied to the peripg_rtc
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ifneq (,$(filter periph_rtc_mem,$(USEMODULE)))
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FEATURES_REQUIRED += periph_rtc
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endif
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include $(RIOTCPU)/cortexm_common/Makefile.dep
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@ -17,6 +17,13 @@ ifneq (,$(filter $(CPU_FAM),f0 f1 f3 g0 g4 l0 l1 l4 l5 wb wl))
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FEATURES_PROVIDED += periph_flashpage_pagewise
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endif
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ifneq (,$(filter $(CPU_FAM),f0 f2 f3 f4 f7 l0 l1 l4 l5 wb wl))
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CPU_MODELS_WITHOUT_RTC_BKPR += stm32f030% stm32f070%
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ifeq (,$(filter $(CPU_MODELS_WITHOUT_RTC_BKPR),$(CPU_MODEL)))
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FEATURES_PROVIDED += periph_rtc_mem
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endif
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endif
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# The f2, f4 and f7 do not support the pagewise api
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ifneq (,$(filter $(CPU_FAM),f2 f4 f7))
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FEATURES_PROVIDED += periph_flashpage
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@ -26,28 +26,34 @@ config CPU_LINE_STM32F030XC
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config CPU_LINE_STM32F031X6
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F038XX
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F042X6
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F048XX
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F051X8
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bool
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select CPU_FAM_F0
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select CLOCK_HAS_NO_MCO_PRE
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F058XX
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bool
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select CPU_FAM_F0
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select CLOCK_HAS_NO_MCO_PRE
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F070X6
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bool
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@ -60,19 +66,24 @@ config CPU_LINE_STM32F070XB
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config CPU_LINE_STM32F071XB
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F072XB
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F078XX
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F091XC
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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config CPU_LINE_STM32F098XX
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bool
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select CPU_FAM_F0
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select HAS_PERIPH_RTC_MEM
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@ -13,6 +13,7 @@ config CPU_FAM_F2
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select HAS_CORTEXM_MPU
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_HWRNG
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -13,6 +13,7 @@ config CPU_FAM_F3
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_FLASHPAGE_RAW
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -12,6 +12,7 @@ config CPU_FAM_F4
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select HAS_CPU_STM32F4
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select HAS_CORTEXM_MPU
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -13,6 +13,7 @@ config CPU_FAM_F7
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select HAS_CORTEXM_MPU
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_HWRNG
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -13,6 +13,7 @@ config CPU_FAM_L0
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_EEPROM
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -14,6 +14,7 @@ config CPU_FAM_L1
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_EEPROM
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -14,6 +14,7 @@ config CPU_FAM_L4
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_HWRNG
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -13,6 +13,7 @@ config CPU_FAM_L5
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_HWRNG
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -13,6 +13,7 @@ config CPU_FAM_WB
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_HWRNG
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -13,6 +13,7 @@ config CPU_FAM_WL
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select HAS_CPU_STM32WL
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_RTC_MEM
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select HAS_PERIPH_WDT
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select HAS_BOOTLOADER_STM32
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@ -209,7 +209,7 @@ static int bcd2val(uint32_t val, int shift, uint32_t mask)
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return (((tmp >> 4) * 10) + (tmp & 0x0f));
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}
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static inline void rtc_unlock(void)
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void rtc_unlock(void)
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{
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/* enable backup clock domain */
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stmclk_dbp_unlock();
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@ -221,7 +221,7 @@ static inline void rtc_unlock(void)
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while (!(RTC_REG_ISR & RTC_ISR_INITF)) {}
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}
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static inline void rtc_lock(void)
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void rtc_lock(void)
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{
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/* exit RTC init mode */
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RTC_REG_ISR &= ~RTC_ISR_INIT;
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148
cpu/stm32/periph/rtc_mem.c
Normal file
148
cpu/stm32/periph/rtc_mem.c
Normal file
@ -0,0 +1,148 @@
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/*
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* Copyright (C) 2021 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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* @file
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* @brief Low-level RTC backup memory implementation
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*
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* @author Kaspar Schleiser <kaspar@schleiser.de>
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* @author Francisco Molina <francois-xavier.molina@inria.fr>
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* @}
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*/
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#include <string.h>
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#include "cpu.h"
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#include "periph/rtc_mem.h"
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#if defined(RTC_BKP31R)
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#define RTC_MEM_SIZE 32
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#elif defined(RTC_BKP30R)
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#define RTC_MEM_SIZE 31
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#elif defined(RTC_BKP29R)
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#define RTC_MEM_SIZE 30
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#elif defined(RTC_BKP28R)
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#define RTC_MEM_SIZE 29
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#elif defined(RTC_BKP27R)
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#define RTC_MEM_SIZE 28
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#elif defined(RTC_BKP26R)
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#define RTC_MEM_SIZE 27
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#elif defined(RTC_BKP25R)
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#define RTC_MEM_SIZE 26
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#elif defined(RTC_BKP24R)
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#define RTC_MEM_SIZE 25
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#elif defined(RTC_BKP23R)
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#define RTC_MEM_SIZE 24
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#elif defined(RTC_BKP22R)
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#define RTC_MEM_SIZE 23
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#elif defined(RTC_BKP21R)
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#define RTC_MEM_SIZE 22
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#elif defined(RTC_BKP20R)
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#define RTC_MEM_SIZE 21
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#elif defined(RTC_BKP19R)
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#define RTC_MEM_SIZE 20
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#elif defined(RTC_BKP18R)
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#define RTC_MEM_SIZE 19
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#elif defined(RTC_BKP17R)
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#define RTC_MEM_SIZE 18
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#elif defined(RTC_BKP16R)
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#define RTC_MEM_SIZE 17
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#elif defined(RTC_BKP15R)
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#define RTC_MEM_SIZE 16
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#elif defined(RTC_BKP14R)
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#define RTC_MEM_SIZE 15
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#elif defined(RTC_BKP13R)
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#define RTC_MEM_SIZE 14
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#elif defined(RTC_BKP12R)
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#define RTC_MEM_SIZE 13
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#elif defined(RTC_BKP11R)
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#define RTC_MEM_SIZE 12
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#elif defined(RTC_BKP10R)
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#define RTC_MEM_SIZE 11
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#elif defined(RTC_BKP9R)
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#define RTC_MEM_SIZE 10
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#elif defined(RTC_BKP8R)
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#define RTC_MEM_SIZE 9
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#elif defined(RTC_BKP7R)
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#define RTC_MEM_SIZE 8
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#elif defined(RTC_BKP6R)
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#define RTC_MEM_SIZE 8
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#elif defined(RTC_BKP5R)
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#define RTC_MEM_SIZE 6
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#elif defined(RTC_BKP4R)
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#define RTC_MEM_SIZE 5
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#elif defined(RTC_BKP3R)
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#define RTC_MEM_SIZE 4
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#elif defined(RTC_BKP2R)
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#define RTC_MEM_SIZE 3
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#elif defined(RTC_BKP1R)
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#define RTC_MEM_SIZE 2
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#elif defined(RTC_BKP0R)
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#define RTC_MEM_SIZE 1
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#else
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#define RTC_MEM_SIZE 0
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#endif
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extern void rtc_lock(void);
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extern void rtc_unlock(void);
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size_t rtc_mem_size(void)
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{
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return RTC_MEM_SIZE * __SIZEOF_POINTER__;
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}
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void rtc_mem_write(unsigned offset, const void *data, size_t len)
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{
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if (offset + len > rtc_mem_size()) {
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return;
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}
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const uint8_t *in = data;
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volatile uint32_t *rtc_regs = &RTC->BKP0R + (offset / __SIZEOF_POINTER__);
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offset %= __SIZEOF_POINTER__;
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rtc_unlock();
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while (len) {
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unsigned to_copy = (len >= __SIZEOF_POINTER__) ?
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__SIZEOF_POINTER__ - offset : len;
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uint32_t tmp = *rtc_regs;
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memcpy(((uint8_t *)&tmp) + offset, in, to_copy);
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offset = 0;
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*rtc_regs++ = tmp;
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len -= to_copy;
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in += to_copy;
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}
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rtc_lock();
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}
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void rtc_mem_read(unsigned offset, void *data, size_t len)
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{
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if (offset + len > rtc_mem_size()) {
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return;
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}
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uint8_t *out = (uint8_t *)data;
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volatile uint32_t *rtc_regs = &RTC->BKP0R + (offset / __SIZEOF_POINTER__);
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offset %= __SIZEOF_POINTER__;
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while (len) {
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unsigned to_copy = (len >= __SIZEOF_POINTER__) ?
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__SIZEOF_POINTER__ - offset : len;
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uint32_t tmp = *rtc_regs++;
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memcpy(out, ((uint8_t *)&tmp) + offset, to_copy);
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offset = 0;
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len -= to_copy;
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out += to_copy;
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}
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}
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