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drivers/mtd_spi_nor: implement mtd_spi_nor_write_page()
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@ -56,6 +56,8 @@
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#define MBIT_AS_BYTES ((1024 * 1024) / 8)
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#define MIN(a, b) ((a) > (b) ? (b) : (a))
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/**
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* @brief JEDEC memory manufacturer ID codes.
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*
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@ -75,14 +77,6 @@ static int mtd_spi_nor_write(mtd_dev_t *mtd, const void *src, uint32_t addr, uin
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static int mtd_spi_nor_erase(mtd_dev_t *mtd, uint32_t addr, uint32_t size);
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static int mtd_spi_nor_power(mtd_dev_t *mtd, enum mtd_power_state power);
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const mtd_desc_t mtd_spi_nor_driver = {
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.init = mtd_spi_nor_init,
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.read = mtd_spi_nor_read,
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.write = mtd_spi_nor_write,
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.erase = mtd_spi_nor_erase,
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.power = mtd_spi_nor_power,
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};
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static void mtd_spi_acquire(const mtd_spi_nor_t *dev)
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{
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spi_acquire(dev->params->spi, dev->params->cs,
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@ -464,7 +458,7 @@ static int mtd_spi_nor_read(mtd_dev_t *mtd, void *dest, uint32_t addr, uint32_t
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DEBUG("mtd_spi_nor_read: %p, %p, 0x%" PRIx32 ", 0x%" PRIx32 "\n",
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(void *)mtd, dest, addr, size);
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const mtd_spi_nor_t *dev = (mtd_spi_nor_t *)mtd;
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size_t chipsize = mtd->page_size * mtd->pages_per_sector * mtd->sector_count;
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uint32_t chipsize = mtd->page_size * mtd->pages_per_sector * mtd->sector_count;
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if (addr > chipsize) {
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return -EOVERFLOW;
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}
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@ -521,6 +515,35 @@ static int mtd_spi_nor_write(mtd_dev_t *mtd, const void *src, uint32_t addr, uin
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return 0;
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}
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static int mtd_spi_nor_write_page(mtd_dev_t *mtd, const void *src, uint32_t page, uint32_t offset,
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uint32_t size)
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{
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const mtd_spi_nor_t *dev = (mtd_spi_nor_t *)mtd;
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DEBUG("mtd_spi_nor_write_page: %p, %p, 0x%" PRIx32 ", 0x%" PRIx32 ", 0x%" PRIx32 "\n",
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(void *)mtd, src, page, offset, size);
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uint32_t remaining = mtd->page_size - offset;
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size = MIN(remaining, size);
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be_uint32_t addr_be = byteorder_htonl(page * mtd->page_size + offset);
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mtd_spi_acquire(dev);
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/* write enable */
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mtd_spi_cmd(dev, dev->params->opcode->wren);
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/* Page program */
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mtd_spi_cmd_addr_write(dev, dev->params->opcode->page_program, addr_be, src, size);
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/* waiting for the command to complete before returning */
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wait_for_write_complete(dev, 0);
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mtd_spi_release(dev);
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return size;
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}
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static int mtd_spi_nor_erase(mtd_dev_t *mtd, uint32_t addr, uint32_t size)
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{
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DEBUG("mtd_spi_nor_erase: %p, 0x%" PRIx32 ", 0x%" PRIx32 "\n",
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@ -619,3 +642,12 @@ static int mtd_spi_nor_power(mtd_dev_t *mtd, enum mtd_power_state power)
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return 0;
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}
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const mtd_desc_t mtd_spi_nor_driver = {
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.init = mtd_spi_nor_init,
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.read = mtd_spi_nor_read,
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.write = mtd_spi_nor_write,
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.write_page = mtd_spi_nor_write_page,
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.erase = mtd_spi_nor_erase,
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.power = mtd_spi_nor_power,
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};
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