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cpu/stm32f4: Corrected wrong spi baud rate control settings
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9a365b0647
commit
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@ -42,6 +42,19 @@ static inline void irq_handler_transfer(SPI_TypeDef *spi, spi_t dev);
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static spi_state_t spi_config[SPI_NUMOF];
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static spi_state_t spi_config[SPI_NUMOF];
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/* static bus div mapping */
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static const uint8_t spi_bus_div_map[SPI_NUMOF] = {
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#if SPI_0_EN
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[SPI_0] = SPI_0_BUS_DIV,
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#endif
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#if SPI_1_EN
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[SPI_1] = SPI_1_BUS_DIV,
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#endif
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#if SPI_2_EN
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[SPI_2] = SPI_2_BUS_DIV,
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#endif
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};
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int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
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int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
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{
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{
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uint8_t speed_devider;
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uint8_t speed_devider;
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@ -49,19 +62,19 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
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switch (speed) {
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switch (speed) {
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case SPI_SPEED_100KHZ:
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case SPI_SPEED_100KHZ:
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return -2; /* not possible for stm32f4 */
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return -2; /* not possible for stm32f4, APB2 minimum is 328 kHz */
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break;
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break;
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case SPI_SPEED_400KHZ:
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case SPI_SPEED_400KHZ:
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speed_devider = 7; /* makes 656 kHz */
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speed_devider = 0x05 + spi_bus_div_map[dev]; /* makes 656 kHz */
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break;
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break;
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case SPI_SPEED_1MHZ:
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case SPI_SPEED_1MHZ:
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speed_devider = 6; /* makes 1.3 MHz */
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speed_devider = 0x04 + spi_bus_div_map[dev]; /* makes 1.3 MHz */
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break;
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break;
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case SPI_SPEED_5MHZ:
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case SPI_SPEED_5MHZ:
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speed_devider = 4; /* makes 5.3 MHz */
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speed_devider = 0x02 + spi_bus_div_map[dev]; /* makes 5.3 MHz */
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break;
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break;
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case SPI_SPEED_10MHZ:
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case SPI_SPEED_10MHZ:
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speed_devider = 3; /* makes 10.5 MHz */
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speed_devider = 0x01 + spi_bus_div_map[dev]; /* makes 10.5 MHz */
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break;
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break;
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default:
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default:
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return -1;
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return -1;
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