diff --git a/cpu/esp32/bootloader/Makefile b/cpu/esp32/bootloader/Makefile
index ae579e1902..dfb4a5df06 100644
--- a/cpu/esp32/bootloader/Makefile
+++ b/cpu/esp32/bootloader/Makefile
@@ -113,6 +113,11 @@ endif
 ifneq (,$(filter esp32,$(CPU_FAM)))
   ESP_SDK_BOOTLOADER_SRCS += components/efuse/src/esp_efuse_api_key_esp32.c
   ESP_SDK_BOOTLOADER_ASMSRC = components/esp_rom/patches/esp_rom_longjmp.S
+else ifneq (,$(filter esp32s2,$(CPU_FAM)))
+  ESP_SDK_BOOTLOADER_SRCS += components/efuse/src/esp_efuse_api_key_esp32xx.c
+  ESP_SDK_BOOTLOADER_SRCS += components/esp_hw_support/port/$(CPU_FAM)/regi2c_ctrl.c
+  ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/dedic_gpio_periph.c
+  ESP_SDK_BOOTLOADER_SRCS += components/soc/soc_include_legacy_warn.c
 else
   ESP_SDK_BOOTLOADER_SRCS += components/efuse/src/esp_efuse_api_key_esp32xx.c
   ESP_SDK_BOOTLOADER_SRCS += components/soc/$(CPU_FAM)/dedic_gpio_periph.c
diff --git a/cpu/esp32/bootloader/sdkconfig.h b/cpu/esp32/bootloader/sdkconfig.h
index 329f6c6a5a..536a5c7163 100644
--- a/cpu/esp32/bootloader/sdkconfig.h
+++ b/cpu/esp32/bootloader/sdkconfig.h
@@ -35,6 +35,8 @@
 #include "sdkconfig_default_esp32.h"
 #elif defined(CPU_FAM_ESP32C3)
 #include "sdkconfig_default_esp32c3.h"
+#elif defined(CPU_FAM_ESP32S2)
+#include "sdkconfig_default_esp32s2.h"
 #elif defined(CPU_FAM_ESP32S3)
 #include "sdkconfig_default_esp32s3.h"
 #else
diff --git a/cpu/esp32/bootloader/sdkconfig_default_esp32s2.h b/cpu/esp32/bootloader/sdkconfig_default_esp32s2.h
new file mode 100644
index 0000000000..982e12ea4e
--- /dev/null
+++ b/cpu/esp32/bootloader/sdkconfig_default_esp32s2.h
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2022 Gunar Schorcht
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     cpu_esp32
+ * @{
+ *
+ * @file
+ * @brief       Default SDK configuration for the ESP32-S2 SoC bootloader
+ *
+ * @author      Gunar Schorcht <gunar@schorcht.net>
+ */
+
+#ifndef SDKCONFIG_DEFAULT_ESP32S2_H
+#define SDKCONFIG_DEFAULT_ESP32S2_H
+
+#ifndef DOXYGEN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
+#define CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ 160
+#endif
+
+#define CONFIG_ESP32S2_DEBUG_OCDAWARE 1
+
+#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000
+#define CONFIG_EFUSE_MAX_BLK_LEN 256
+#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0002
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* DOXYGEN */
+#endif /* SDKCONFIG_DEFAULT_ESP32S2_H */
+/** @} */