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board/hifive1: minor changes for FE310_G000 CPU

Minor changes to support both HiFive1 and HiFive1B boards and their respective CPUs
This commit is contained in:
kenrabold 2019-06-25 10:15:14 -07:00
parent 97d1dc0821
commit 6391913a15
4 changed files with 4 additions and 4 deletions

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@ -1,6 +1,6 @@
# define the cpu used by the HiFive1 board
export CPU = fe310
export CPU_MODEL = fe310
export CPU_MODEL = fe310_g000
# Uses UART0 for stdio input/output (comment out to disable)
USEMODULE += stdio_uart

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@ -7,7 +7,7 @@
*/
/**
* @ingroup boards_hifive
* @ingroup boards_hifive1
* @{
*
* @file

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@ -7,7 +7,7 @@
*/
/**
* @defgroup boards_hifive SiFive HiFive1 RISC-V board
* @defgroup boards_hifive1 SiFive HiFive1 RISC-V board
* @ingroup boards
* @brief Support for the SiFive HiFive1 RISC-V board
* @{

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@ -7,7 +7,7 @@
*/
/**
* @ingroup boards_hifive
* @ingroup boards_hifive1
* @{
*
* @file