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https://github.com/RIOT-OS/RIOT.git
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cpu/stm32_common: various improvements in i2c_1 driver
- dont send stop if bus is busy and before any action is done on bus - and bus check that looks for bus error, arbitration and nack events - check for ACK (TXIS) before writing bytes on bus and not between each write
This commit is contained in:
dylad
parent
11356f602f
commit
5f1d5e0d83
@ -57,10 +57,11 @@
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/* static function definitions */
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static inline void _i2c_init(I2C_TypeDef *i2c, uint32_t timing);
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static inline int _start(I2C_TypeDef *dev, uint16_t address, size_t length,
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uint8_t rw_flag, uint8_t flags);
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uint8_t rw_flag, uint8_t flags);
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static inline int _read(I2C_TypeDef *dev, uint8_t *data, size_t length);
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static inline int _write(I2C_TypeDef *i2c, const uint8_t *data, size_t length);
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static inline int _stop(I2C_TypeDef *i2c);
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static inline int _check_bus(I2C_TypeDef *i2c);
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/**
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* @brief Array holding one pre-initialized mutex for each I2C device
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@ -169,10 +170,11 @@ int i2c_read_bytes(i2c_t dev, uint16_t address, void *data,
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int ret = 0;
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if (!(flags & I2C_NOSTART)) {
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DEBUG("[i2c] read_bytes: start transmission\n");
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DEBUG("[i2c] read_bytes: send start condition\n");
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/* start reception and send slave address */
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ret = _start(i2c, address, length, I2C_FLAG_READ, flags);
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if (ret < 0) {
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_stop(i2c);
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return ret;
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}
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}
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@ -181,6 +183,7 @@ int i2c_read_bytes(i2c_t dev, uint16_t address, void *data,
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/* read the data bytes */
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ret = _read(i2c, data, length);
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if (ret < 0) {
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_stop(i2c);
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DEBUG("[i2c] read_bytes: error while reading\n");
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return ret;
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}
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@ -212,20 +215,17 @@ int i2c_read_regs(i2c_t dev, uint16_t address, uint16_t reg, void *data,
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I2C_TypeDef *i2c = i2c_config[dev].dev;
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/* Check to see if the bus is busy */
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while ((i2c->ISR & I2C_ISR_BUSY) && tick--) {
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if ((i2c->ISR & ERROR_FLAG) || !tick) {
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/* end transmission */
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_stop(i2c);
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return -ETIMEDOUT;
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}
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while ((i2c->ISR & I2C_ISR_BUSY) && tick--) {}
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if ((i2c->ISR & ERROR_FLAG) || !tick) {
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return -ETIMEDOUT;
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}
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DEBUG("[i2c] read_regs: send start sequence\n");
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if (!(flags & I2C_NOSTART)) {
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DEBUG("[i2c] read_regs: send start sequence\n");
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/* send start sequence and slave address */
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int ret = _start(i2c, address, 1, 0, flags);
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if (ret < 0) {
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_stop(i2c);
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return ret;
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}
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}
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@ -236,7 +236,7 @@ int i2c_read_regs(i2c_t dev, uint16_t address, uint16_t reg, void *data,
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if ((i2c->ISR & ERROR_FLAG) || !tick) {
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/* end transmission */
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_stop(i2c);
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return -ETIMEDOUT;
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return -ENXIO;
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}
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}
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@ -266,14 +266,16 @@ int i2c_write_bytes(i2c_t dev, uint16_t address, const void *data,
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/* start transmission and send slave address */
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ret = _start(i2c, address, length, I2C_FLAG_WRITE, flags);
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if (ret < 0) {
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_stop(i2c);
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return ret;
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}
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}
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DEBUG("[i2c] write_bytes: write the data\n");
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DEBUG("[i2c] write_bytes: write the data (%d bytes)\n", length);
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/* send out data bytes */
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ret = _write(i2c, data, length);
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if (ret < 0) {
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_stop(i2c);
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DEBUG("[i2c] write_bytes: nothing was written\n");
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return ret;
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}
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@ -305,10 +307,9 @@ int i2c_write_regs(i2c_t dev, uint16_t address, uint16_t reg, const void *data,
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}
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/* Check to see if the bus is busy */
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while ((i2c->ISR & I2C_ISR_BUSY) && tick--) {
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if ((i2c->ISR & ERROR_FLAG) || !tick) {
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return -ETIMEDOUT;
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}
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while ((i2c->ISR & I2C_ISR_BUSY) && tick--) {}
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if ((i2c->ISR & ERROR_FLAG) || !tick) {
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return -ETIMEDOUT;
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}
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if (!(flags & I2C_NOSTART)) {
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@ -316,6 +317,7 @@ int i2c_write_regs(i2c_t dev, uint16_t address, uint16_t reg, const void *data,
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/* increase length because our data is register+data */
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ret = _start(i2c, address, length + 1, I2C_FLAG_WRITE, flags);
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if (ret < 0) {
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_stop(i2c);
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return ret;
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}
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}
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@ -327,6 +329,7 @@ int i2c_write_regs(i2c_t dev, uint16_t address, uint16_t reg, const void *data,
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/* write out data bytes */
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ret = _write(i2c, data, length);
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if (ret < 0) {
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_stop(i2c);
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return ret;
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}
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@ -342,7 +345,7 @@ int i2c_write_regs(i2c_t dev, uint16_t address, uint16_t reg, const void *data,
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}
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static inline int _start(I2C_TypeDef *i2c, uint16_t address,
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size_t length, uint8_t rw_flag, uint8_t flags)
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size_t length, uint8_t rw_flag, uint8_t flags)
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{
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/* 10 bit address not supported for now */
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if (flags & I2C_ADDR10) {
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@ -351,8 +354,6 @@ static inline int _start(I2C_TypeDef *i2c, uint16_t address,
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assert(i2c != NULL);
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uint16_t tick = TICK_TIMEOUT;
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i2c->CR2 = 0;
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DEBUG("[i2c] start: set address mode\n");
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@ -385,10 +386,15 @@ static inline int _start(I2C_TypeDef *i2c, uint16_t address,
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i2c->CR2 |= I2C_CR2_START;
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/* Wait for the start followed by the address to be sent */
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while (!(i2c->CR2 & I2C_CR2_START) && tick--) {
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if (!tick) {
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return -ETIMEDOUT;
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}
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uint16_t tick = TICK_TIMEOUT;
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while (!(i2c->CR2 & I2C_CR2_START) && tick--) {}
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if (!tick) {
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return -ETIMEDOUT;
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}
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int ret = _check_bus(i2c);
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if (ret < 0) {
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return ret;
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}
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return 0;
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@ -402,10 +408,9 @@ static inline int _read(I2C_TypeDef *i2c, uint8_t *data, size_t length)
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/* wait for transfer to finish */
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DEBUG("[i2c] read: Waiting for DR to be full\n");
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uint16_t tick = TICK_TIMEOUT;
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while (!(i2c->ISR & I2C_ISR_RXNE) && tick--) {
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if (i2c->ISR & ERROR_FLAG || !tick) {
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return -ETIMEDOUT;
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}
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while (!(i2c->ISR & I2C_ISR_RXNE) && tick--) {}
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if (i2c->ISR & ERROR_FLAG || !tick) {
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return -ETIMEDOUT;
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}
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DEBUG("[i2c] read: DR is now full\n");
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@ -415,6 +420,11 @@ static inline int _read(I2C_TypeDef *i2c, uint8_t *data, size_t length)
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DEBUG("[i2c] read: Read byte %i from DR\n", i);
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}
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int ret = _check_bus(i2c);
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if (ret < 0) {
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return ret;
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}
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return 0;
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}
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@ -426,16 +436,28 @@ static inline int _write(I2C_TypeDef *i2c, const uint8_t *data, size_t length)
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/* wait for ack */
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DEBUG("[i2c] write: Waiting for ACK\n");
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uint16_t tick = TICK_TIMEOUT;
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while (!(i2c->ISR & I2C_ISR_TXIS) && tick--) {
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if (i2c->ISR & ERROR_FLAG || !tick) {
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return -ETIMEDOUT;
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}
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while (!(i2c->ISR & I2C_ISR_TXIS) && tick--) {}
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if (i2c->ISR & ERROR_FLAG || !tick) {
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DEBUG("[i2c] write: TXIS timeout\n");
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return -ENXIO;
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}
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/* write data to data register */
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DEBUG("[i2c] write: Write byte %i to DR\n", i);
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DEBUG("[i2c] write: Write byte %02X to DR\n", data[i]);
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i2c->TXDR = data[i];
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DEBUG("[i2c] write: Sending data\n");
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int ret = _check_bus(i2c);
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if (ret < 0) {
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return ret;
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}
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}
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DEBUG("[i2c] write: Waiting for write to complete\n");
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uint16_t tick = TICK_TIMEOUT;
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while (!(i2c->ISR & I2C_ISR_TC) && tick--) {}
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if (i2c->ISR & ERROR_FLAG || !tick) {
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DEBUG("[i2c] write: write didn't complete\n");
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return -ENXIO;
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}
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return 0;
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@ -449,19 +471,53 @@ static inline int _stop(I2C_TypeDef *i2c)
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/* make sure transfer is complete */
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DEBUG("[i2c] stop: Wait for transfer to be complete\n");
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while (!(i2c->ISR & I2C_ISR_TC) && tick--) {
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if (i2c->ISR & ERROR_FLAG || !tick) {
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return -ETIMEDOUT;
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}
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while (!(i2c->ISR & I2C_ISR_TC) && tick--) {}
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if (i2c->ISR & ERROR_FLAG || !tick) {
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return -EIO;
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}
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/* send STOP condition */
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DEBUG("[i2c] stop: Generate stop condition\n");
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i2c->CR2 |= I2C_CR2_STOP;
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/* Wait for the stop to complete */
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tick = TICK_TIMEOUT;
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while (!(i2c->CR2 & I2C_CR2_STOP) && tick--) {}
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if (!tick) {
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return -ETIMEDOUT;
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}
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return 0;
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}
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static inline int _check_bus(I2C_TypeDef *i2c)
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{
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assert(i2c != NULL);
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int ret = 0;
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/* wait a bit for any potential error to arrive */
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uint16_t tick = TICK_TIMEOUT;
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while (tick--) {}
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if (i2c->ISR & I2C_ISR_NACKF) {
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DEBUG("[i2c] check_bus: NACK received\n");
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return -ENXIO;
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}
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if (i2c->ISR & I2C_ISR_ARLO) {
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DEBUG("[i2c] check_bus: arbitration lost\n");
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return -EAGAIN;
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}
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if (i2c->ISR & I2C_ISR_BERR) {
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DEBUG("[i2c] check_bus: bus error\n");
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return -EIO;
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}
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return ret;
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}
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static inline void irq_handler(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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