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Merge pull request #5590 from mali/atmega_common
cpu/atmega_common: improve to add smaller atmega MCUs.
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commit
5e3747ea8b
@ -97,6 +97,7 @@ extern "C" {
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*/
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#define SPI_NUMOF 1 /* set to 0 to disable SPI */
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#define SPI_0_EN 1 /* remove once SPI rework is done */
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#define MEGA_PRR PRR0 /* Power Reduction Register is PRR0 */
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/** @} */
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#ifdef __cplusplus
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@ -104,6 +104,7 @@ extern "C" {
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*/
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#define SPI_NUMOF 1 /* set to 0 to disable SPI */
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#define SPI_0_EN 1 /* remove once SPI rework is done */
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#define MEGA_PRR PRR0 /* Power Reduction Resgister */
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/** @} */
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#ifdef __cplusplus
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@ -17,6 +17,7 @@
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*
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* @author René Herthel <rene-herthel@outlook.de>
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* @author Francisco Acosta <francisco.acosta@inria.fr>
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* @author Laurent Navet <laurent.navet@gmail.com>
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*
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* @}
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*/
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@ -84,10 +85,11 @@ static inline uint16_t _port_addr(gpio_t pin)
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port_addr += GPIO_BASE_PORT_A;
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port_addr += GPIO_OFFSET_PIN_PORT;
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#if defined (PORTG)
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if (port_num > PORT_G) {
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port_addr += GPIO_OFFSET_PORT_H;
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}
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#endif
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return port_addr;
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}
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@ -133,7 +135,9 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
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uint8_t pin_num = _pin_num(pin);
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if ((_port_num(pin) == PORT_D && pin_num > 3)
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#if defined (PORTE)
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|| (_port_num(pin) == PORT_E && pin_num < 4)
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#endif
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|| ((mode != GPIO_IN) && (mode != GPIO_IN_PU))) {
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return -1;
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}
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@ -151,25 +155,31 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
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if (pin_num < 4) {
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EICRA |= (3 << pin_num * 2);
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}
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#if defined(EICRB)
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else {
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EICRB |= (3 << (pin_num * 2) % 4);
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}
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#endif
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break;
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case GPIO_FALLING:
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if (pin_num < 4) {
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EICRA |= (2 << pin_num * 2);
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}
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#if defined(EICRB)
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else {
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EICRB |= (2 << (pin_num * 2) % 4);
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}
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#endif
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break;
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case GPIO_BOTH:
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if (pin_num < 4) {
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EICRA |= (1 << pin_num * 2);
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}
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#if defined(EICRB)
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else {
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EICRB |= (1 << (pin_num * 2) % 4);
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}
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#endif
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break;
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default:
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return -1;
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@ -61,7 +61,7 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
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DDRB |= ((1 << DDB2) | (1 << DDB1) | (1 << DDB0));
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/* make sure the SPI is not powered off */
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PRR0 &= ~(1 << PRSPI);
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MEGA_PRR &= ~(1 << PRSPI);
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/* configure as master, with given mode and clock */
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SPSR = (speed >> S2X_SHIFT);
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@ -208,10 +208,12 @@ ISR(TIMER_0_ISRB, ISR_BLOCK)
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_isr(0, 1);
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}
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#ifdef TIMER_0_ISRC
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ISR(TIMER_0_ISRC, ISR_BLOCK)
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{
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_isr(0, 2);
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}
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#endif /* TIMER_0_ISRC */
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#endif /* TIMER_0 */
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#ifdef TIMER_1
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