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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

cpu/esp32: deduplication in Kconfig

The commit defines a new common CPU symbol `CPU_COMMON_ESP32X` in Kconfig that is used by all `CPU_FAM_ESP32x` symbols which selects features, modules and packages that are common for all ESP32x SoC variants. This avoids the selection of features, modules and packages again and again for each ESP32x SoC variant.
This commit is contained in:
Gunar Schorcht 2023-03-30 07:34:02 +02:00
parent 198aadfc0a
commit 5a4759cfc0
6 changed files with 43 additions and 91 deletions

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@ -89,6 +89,7 @@ config CPU_CORE
default "xtensa-lx7" if CPU_CORE_XTENSA_LX7
default "rv32imc" if CPU_CORE_RV32IMC
rsource "Kconfig.esp32x"
rsource "Kconfig.esp32"
rsource "Kconfig.esp32c3"
rsource "Kconfig.esp32s3"

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@ -7,35 +7,14 @@
config CPU_FAM_ESP32
bool
select CPU_COMMON_ESP
select CPU_COMMON_ESP32X
select CPU_CORE_XTENSA_LX6
select HAS_ARCH_ESP32
select HAS_CPU_ESP32
select HAS_BLE_NIMBLE
select HAS_BLE_NIMBLE_NETIF
select HAS_ESP_BLE
select HAS_ESP_BLE_ESP32
select HAS_ESP_HW_COUNTER
select HAS_ESP_RMT
select HAS_ESP_WIFI_ENTERPRISE
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO_LL
select HAS_PERIPH_GPIO_LL_IRQ
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
select HAS_PERIPH_SPI_RECONFIGURE
select HAS_PUF_SRAM
select PACKAGE_ESP32_SDK if TEST_KCONFIG
select MODULE_PERIPH_RTT if HAS_PERIPH_RTT && MODULE_PM_LAYERED
select MODULE_PS if MODULE_SHELL
select MODULE_PTHREAD if MODULE_CPP
select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
imply MODULE_NEWLIB_NANO
config CPU_FAM
default "esp32" if CPU_FAM_ESP32

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@ -7,35 +7,14 @@
config CPU_FAM_ESP32C3
bool
select CPU_COMMON_ESP
select CPU_COMMON_ESP32X
select CPU_CORE_RV32IMC
select HAS_ARCH_ESP32
select HAS_CPU_ESP32
select HAS_BLE_ADV_EXT
select HAS_BLE_NIMBLE
select HAS_BLE_NIMBLE_NETIF
select HAS_BLE_PHY_2MBIT
select HAS_ESP_BLE
select HAS_ESP_BLE_ESP32C3
select HAS_ESP_RMT
select HAS_ESP_WIFI_ENTERPRISE
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO_LL
select HAS_PERIPH_GPIO_LL_IRQ
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
select HAS_PERIPH_SPI_RECONFIGURE
select HAS_PUF_SRAM
select PACKAGE_ESP32_SDK if TEST_KCONFIG
select MODULE_PERIPH_RTT if HAS_PERIPH_RTT && MODULE_PM_LAYERED
select MODULE_PS if MODULE_SHELL
select MODULE_PTHREAD if MODULE_CPP
select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
imply MODULE_NEWLIB_NANO
config CPU_FAM
default "esp32c3" if CPU_FAM_ESP32C3

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@ -7,32 +7,10 @@
config CPU_FAM_ESP32S2
bool
select CPU_COMMON_ESP
select CPU_COMMON_ESP32X
select CPU_CORE_XTENSA_LX7
select HAS_ARCH_ESP32
select HAS_CPU_ESP32
select HAS_ESP_HW_COUNTER
select HAS_ESP_RMT
select HAS_ESP_WIFI_ENTERPRISE
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO_LL
select HAS_PERIPH_GPIO_LL_IRQ
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
select HAS_PERIPH_SPI_RECONFIGURE
select HAS_PUF_SRAM
select PACKAGE_ESP32_SDK if TEST_KCONFIG
select MODULE_PERIPH_RTT if HAS_PERIPH_RTT && MODULE_PM_LAYERED
select MODULE_PS if MODULE_SHELL
select MODULE_PTHREAD if MODULE_CPP
select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
select MODULE_USBDEV_SYNOPSYS_DWC2 if MODULE_PERIPH_USBDEV
select MODULE_USB_BOARD_RESET if MODULE_USBUS_CDC_ACM || MODULE_TINYUSB_CLASS_CDC
imply MODULE_NEWLIB_NANO
config CPU_FAM
default "esp32s2" if CPU_FAM_ESP32S2

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@ -7,39 +7,16 @@
config CPU_FAM_ESP32S3
bool
select CPU_COMMON_ESP
select CPU_COMMON_ESP32X
select CPU_CORE_XTENSA_LX7
select HAS_ARCH_ESP32
select HAS_CPU_ESP32
select HAS_BLE_ADV_EXT
select HAS_BLE_NIMBLE
select HAS_BLE_NIMBLE_NETIF
select HAS_BLE_PHY_2MBIT
select HAS_ESP_BLE
select HAS_ESP_BLE_ESP32C3
select HAS_ESP_RMT
select HAS_ESP_HW_COUNTER
select HAS_ESP_WIFI_ENTERPRISE
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO_LL
select HAS_PERIPH_GPIO_LL_IRQ
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
select HAS_PERIPH_SPI_RECONFIGURE
select HAS_PUF_SRAM
select HAS_TINYUSB_DEVICE
select PACKAGE_ESP32_SDK if TEST_KCONFIG
select MODULE_PERIPH_RTT if HAS_PERIPH_RTT && MODULE_PM_LAYERED
select MODULE_PS if MODULE_SHELL
select MODULE_PTHREAD if MODULE_CPP
select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
select MODULE_USBDEV_SYNOPSYS_DWC2 if MODULE_PERIPH_USBDEV
select MODULE_USB_BOARD_RESET if MODULE_USBUS_CDC_ACM || MODULE_TINYUSB_CLASS_CDC
imply MODULE_NEWLIB_NANO
config CPU_FAM
default "esp32s3" if CPU_FAM_ESP32S3

38
cpu/esp32/Kconfig.esp32x Normal file
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@ -0,0 +1,38 @@
# Copyright (c) 2023 Gunar Schorcht
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
# define a CPU configurationthat common is common for all ESP32x SoC variants
config CPU_COMMON_ESP32X
bool
select CPU_COMMON_ESP
select HAS_ARCH_ESP32
select HAS_CPU_ESP32
select HAS_ESP_HW_COUNTER if CPU_ARCH_XTENSA
select HAS_ESP_RMT
select HAS_ESP_WIFI_ENTERPRISE
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_GPIO_LL
select HAS_PERIPH_GPIO_LL_IRQ
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
select HAS_PERIPH_SPI_RECONFIGURE
select HAS_PUF_SRAM
select PACKAGE_ESP32_SDK if TEST_KCONFIG
select MODULE_PERIPH_RTT if HAS_PERIPH_RTT && MODULE_PM_LAYERED
select MODULE_PS if MODULE_SHELL
select MODULE_PTHREAD if MODULE_CPP
select MODULE_RTT_RTC if HAS_PERIPH_RTT && MODULE_PERIPH_RTC
imply MODULE_NEWLIB_NANO
help
Selects all features, modules and packages that are common for
all ESP32x SoC variants.