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boards/nucleo-f303k8: remove custom pll prediv/mul defines
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@ -19,15 +19,6 @@
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* Adjust PLL factors:
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- On nucleo-f303k8, there's no HSE and PREDIV is hard-wired to 2
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- to reach the maximum possible system clock (64MHz) set PLL_MUL to 16
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so system clock = (HSI8 / 2) * 16 = 64MHz */
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#define CONFIG_CLOCK_PLL_PREDIV (2)
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#ifndef CONFIG_CLOCK_PLL_MUL
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#define CONFIG_CLOCK_PLL_MUL (16)
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#endif
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_timer_tim2.h"
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