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drivers/cc2420: adapted to SPI API changes
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commit
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@ -42,7 +42,6 @@ void cc2420_setup(cc2420_t * dev, const cc2420_params_t *params)
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dev->state = CC2420_STATE_IDLE;
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/* reset device descriptor fields */
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dev->options = 0;
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spi_init_master(dev->params.spi, SPI_CONF_FIRST_RISING, dev->params.spi_clk);
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}
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int cc2420_init(cc2420_t *dev)
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@ -27,15 +27,19 @@
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#include "cc2420_internal.h"
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#include "cc2420_registers.h"
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#define SPI_BUS (dev->params.spi)
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#define SPI_CS (dev->params.pin_cs)
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#define SPI_MODE (SPI_MODE_0)
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#define SPI_CLK (dev->params.spi_clk)
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uint8_t cc2420_strobe(const cc2420_t *dev, const uint8_t command)
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{
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char res;
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uint8_t res;
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.pin_cs);
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spi_transfer_byte(dev->params.spi, (char)command, (char *)&res);
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gpio_set(dev->params.pin_cs);
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spi_release(dev->params.spi);
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spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
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res = spi_transfer_byte(SPI_BUS, SPI_CS, false, command);
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spi_release(SPI_BUS);
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return res;
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}
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@ -46,24 +50,18 @@ void cc2420_reg_write(const cc2420_t *dev,
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{
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uint16_t tmp = byteorder_htons(value).u16;
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.pin_cs);
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spi_transfer_regs(dev->params.spi, CC2420_REG_WRITE | addr,
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(char *)&tmp, NULL, 2);
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gpio_set(dev->params.pin_cs);
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spi_release(dev->params.spi);
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spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
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spi_transfer_regs(SPI_BUS, SPI_CS, (CC2420_REG_WRITE | addr), &tmp, NULL, 2);
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spi_release(SPI_BUS);
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}
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uint16_t cc2420_reg_read(const cc2420_t *dev, const uint8_t addr)
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{
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network_uint16_t tmp;
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.pin_cs);
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spi_transfer_regs(dev->params.spi, CC2420_REG_READ | addr,
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NULL, (char *)&tmp, 2);
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gpio_set(dev->params.pin_cs);
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spi_release(dev->params.spi);
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spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
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spi_transfer_regs(SPI_BUS, SPI_CS, (CC2420_REG_READ | addr),NULL, &tmp, 2);
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spi_release(SPI_BUS);
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return byteorder_ntohs(tmp);
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}
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@ -71,49 +69,40 @@ uint16_t cc2420_reg_read(const cc2420_t *dev, const uint8_t addr)
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void cc2420_ram_read(const cc2420_t *dev, const uint16_t addr,
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uint8_t *data, const size_t len)
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{
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char tmp[] = { (CC2420_RAM | (addr & 0x7f)),
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(CC2420_RAM_READ | ((addr >> 1) & 0xc0)) };
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uint8_t tmp[] = { (CC2420_RAM | (addr & 0x7f)),
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(CC2420_RAM_READ | ((addr >> 1) & 0xc0)) };
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.pin_cs);
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spi_transfer_bytes(dev->params.spi, tmp, NULL, 2);
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spi_transfer_bytes(dev->params.spi, NULL, (char*)data, len);
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gpio_set(dev->params.pin_cs);
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spi_release(dev->params.spi);
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spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
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spi_transfer_bytes(SPI_BUS, SPI_CS, true, tmp, NULL, 2);
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spi_transfer_bytes(SPI_BUS, SPI_CS, false, NULL, data, len);
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spi_release(SPI_BUS);
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}
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void cc2420_ram_write(const cc2420_t *dev, const uint16_t addr,
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const uint8_t *data, const size_t len)
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{
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char tmp[] = { (CC2420_RAM | (addr & 0x7f)),
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(CC2420_RAM_WRITE | ((addr >> 1) & 0xc0)) };
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uint8_t tmp[] = { (CC2420_RAM | (addr & 0x7f)),
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(CC2420_RAM_WRITE | ((addr >> 1) & 0xc0)) };
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.pin_cs);
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spi_transfer_bytes(dev->params.spi, tmp, NULL, 2);
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spi_transfer_bytes(dev->params.spi, (char*)data, NULL, len);
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gpio_set(dev->params.pin_cs);
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spi_release(dev->params.spi);
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spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
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spi_transfer_bytes(SPI_BUS, SPI_CS, true, tmp, NULL, 2);
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spi_transfer_bytes(SPI_BUS, SPI_CS, false, data, NULL, len);
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spi_release(SPI_BUS);
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}
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void cc2420_fifo_read(const cc2420_t *dev, uint8_t *data, const size_t len)
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{
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.pin_cs);
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spi_transfer_regs(dev->params.spi, CC2420_FIFO_READ,
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NULL, (char *)data, len);
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gpio_set(dev->params.pin_cs);
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spi_release(dev->params.spi);
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spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
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spi_transfer_regs(SPI_BUS, SPI_CS, CC2420_FIFO_READ, NULL, data, len);
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spi_release(SPI_BUS);
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}
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void cc2420_fifo_write(const cc2420_t *dev, uint8_t *data, const size_t len)
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{
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spi_acquire(dev->params.spi);
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gpio_clear(dev->params.pin_cs);
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spi_transfer_regs(dev->params.spi, CC2420_FIFO_WRITE,
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(char *)data, NULL, len);
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spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
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spi_transfer_regs(SPI_BUS, SPI_CS, CC2420_FIFO_WRITE, data, NULL, len);
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gpio_set(dev->params.pin_cs);
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spi_release(dev->params.spi);
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spi_release(SPI_BUS);
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}
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uint8_t cc2420_status(cc2420_t *dev)
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@ -116,8 +116,7 @@ static int _init(netdev2_t *netdev)
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gpio_init_int(dev->params.pin_fifop, GPIO_IN, GPIO_RISING, _irq_handler, dev);
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/* initialize the chip select line and the SPI bus */
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gpio_init(dev->params.pin_cs, GPIO_OUT);
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gpio_set(dev->params.pin_cs);
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spi_init_cs(dev->params.spi, dev->params.pin_cs);
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/* power on and toggle reset */
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gpio_set(dev->params.pin_vrefen);
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@ -30,10 +30,10 @@ extern "C" {
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* @{
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*/
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#ifndef CC2420_PARAM_SPI
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#define CC2420_PARAM_SPI (SPI_0)
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#define CC2420_PARAM_SPI (SPI_DEV(0))
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#endif
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#ifndef CC2420_PARAM_SPI_CLK
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#define CC2420_PARAM_SPI_CLK (SPI_SPEED_5MHZ)
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#define CC2420_PARAM_SPI_CLK (SPI_CLK_5MHZ)
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#endif
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#ifndef CC2420_PARAM_CS
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#define CC2420_PARAM_CS (GPIO_PIN(0, 0))
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@ -74,7 +74,7 @@ enum {
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*/
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typedef struct cc2420_params {
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spi_t spi; /**< SPI bus the device is connected to */
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spi_speed_t spi_clk; /**< SPI speed to use */
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spi_clk_t spi_clk; /**< SPI speed to use */
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gpio_t pin_cs; /**< pin connected to chip select */
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gpio_t pin_fifo; /**< pin connected to the FIFO interrupt pin */
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gpio_t pin_fifop; /**< pin connected to the FIFOP interrupt pin */
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