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boards/sodaq-*: use common code
This commit is contained in:
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@ -1,3 +1,5 @@
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MODULE = board
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MODULE = board
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DIRS += $(RIOTBOARD)/common/sodaq
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include $(RIOTBASE)/Makefile.base
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include $(RIOTBASE)/Makefile.base
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@ -1,3 +1,3 @@
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ifneq (,$(filter saul_default,$(USEMODULE)))
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USEMODULE += boards_common_sodaq
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USEMODULE += saul_gpio
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endif
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include $(RIOTBOARD)/common/sodaq/Makefile.dep
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@ -1,16 +1,5 @@
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CPU = samd21
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CPU_MODEL = samd21j18a
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CPU_MODEL = samd21j18a
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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FEATURES_PROVIDED += periph_usbdev
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# Various other features (if any)
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include $(RIOTBOARD)/common/sodaq/Makefile.features
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FEATURES_PROVIDED += arduino
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@ -1,14 +1 @@
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PORT_LINUX ?= /dev/ttyACM0
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include $(RIOTBOARD)/common/sodaq/Makefile.include
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
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# setup serial terminal
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include $(RIOTMAKE)/tools/serial.inc.mk
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# setup the flash tool used
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# we use BOSSA to flash this board since there's an Arduino bootloader
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# preflashed on it. ROM_OFFSET skips the space taken by such bootloader.
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ROM_OFFSET ?= 0x2000
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include $(RIOTMAKE)/tools/bossa.inc.mk
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# setup the boards dependencies
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include $(RIOTBOARD)/$(BOARD)/Makefile.dep
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@ -1,32 +0,0 @@
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/*
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* Copyright (C) 2016 Kees Bakker, SODAQ
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_sodaq-autonomo
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* @{
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*
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* @file
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* @brief Board specific implementations for the SODAQ Autonomo
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* Pro board
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*
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* @author Kees Bakker <kees@sodaq.com>
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*
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* @}
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*/
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#include "board.h"
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#include "periph/gpio.h"
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void board_init(void)
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{
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/* initialize the on-board LED */
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gpio_init(LED0_PIN, GPIO_OUT);
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/* initialize the CPU */
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cpu_init();
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}
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@ -20,8 +20,7 @@
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#define BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#include "cpu.h"
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#include "periph_conf.h"
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#include "board_common.h"
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#include "periph_cpu.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@ -49,11 +48,6 @@ extern "C" {
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
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/** @} */
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/** @} */
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO
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*/
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void board_init(void);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -23,102 +23,17 @@
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#include "cpu.h"
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#include "cpu.h"
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#include "periph_cpu.h"
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#include "periph_cpu.h"
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#include "cfg_clock_default.h"
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#include "cfg_rtc_default.h"
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#include "cfg_rtt_default.h"
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#include "cfg_spi_default.h"
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#include "cfg_timer_default.h"
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#include "cfg_usbdev_default.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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/**
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* @name External oscillator and clock configuration
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*
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* For selection of the used CORECLOCK, we have implemented two choices:
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*
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* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
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* - usage of the internal 8MHz oscillator directly, divided by N if needed
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*
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*
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* The PLL option allows for the usage of a wider frequency range and a more
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* stable clock with less jitter. This is why we use this option as default.
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*
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* The target frequency is computed from the PLL multiplier and the PLL divisor.
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* Use the following formula to compute your values:
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*
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* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
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*
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* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
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* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
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*
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*
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* The internal Oscillator used directly can lead to a slightly better power
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* efficiency to the cost of a less stable clock. Use this option when you know
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* what you are doing! The actual core frequency is adjusted as follows:
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*
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* CORECLOCK = 8MHz / DIV
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*
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* NOTE: A core clock frequency below 1MHz is not recommended
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*
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* @{
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*/
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#define CLOCK_USE_PLL (1)
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#if CLOCK_USE_PLL
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/* edit these values to adjust the PLL output frequency */
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#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
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#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
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/* generate the actual used core clock frequency */
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#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
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#else
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/* edit this value to your needs */
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#define CLOCK_DIV (1U)
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/* generate the actual core clock frequency */
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#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
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#endif
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/** @} */
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/**
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* @name Timer peripheral configuration
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* @{
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*/
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static const tc32_conf_t timer_config[] = {
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{ /* Timer 0 - System Clock */
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.dev = TC3,
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.irq = TC3_IRQn,
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.pm_mask = PM_APBCMASK_TC3,
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.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = GCLK_CLKCTRL_GEN(1),
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = GCLK_CLKCTRL_GEN(0),
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT16,
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},
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{ /* Timer 1 */
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.dev = TC4,
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.irq = TC4_IRQn,
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.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
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.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
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#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
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.gclk_src = GCLK_CLKCTRL_GEN(1),
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.prescaler = TC_CTRLA_PRESCALER_DIV1,
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#else
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.gclk_src = GCLK_CLKCTRL_GEN(0),
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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#endif
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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#define TIMER_0_MAX_VALUE 0xffff
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/* interrupt function name mapping */
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#define TIMER_0_ISR isr_tc3
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#define TIMER_1_ISR isr_tc4
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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/**
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/**
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* @name UART configuration
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* @name UART configuration
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* @{
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* @{
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@ -247,27 +162,6 @@ static const pwm_conf_t pwm_config[] = {
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#define PWM_NUMOF (2U)
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#define PWM_NUMOF (2U)
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/** @} */
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = &SERCOM3->SPI,
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.miso_pin = GPIO_PIN(PA, 22),
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.mosi_pin = GPIO_PIN(PA, 20),
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.clk_pin = GPIO_PIN(PA, 21),
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.miso_mux = GPIO_MUX_C,
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.mosi_mux = GPIO_MUX_D,
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.clk_mux = GPIO_MUX_D,
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.miso_pad = SPI_PAD_MISO_0,
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.mosi_pad = SPI_PAD_MOSI_2_SCK_3,
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},
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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/**
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* @name I2C configuration
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* @name I2C configuration
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* @{
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* @{
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@ -286,42 +180,6 @@ static const i2c_conf_t i2c_config[] = {
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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/** @} */
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/** @} */
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/**
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* @name RTC configuration
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* @{
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*/
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#define RTC_NUMOF (1U)
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#define RTC_DEV RTC->MODE2
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/** @} */
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/**
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* @name RTT configuration
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* @{
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*/
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#define RTT_NUMOF (1U)
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#define RTT_DEV RTC->MODE0
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#define RTT_IRQ RTC_IRQn
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#define RTT_IRQ_PRIO 10
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#define RTT_ISR isr_rtc
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#define RTT_MAX_VALUE (0xffffffff)
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#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
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#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
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/** @} */
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/**
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* @name USB peripheral configuration
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* @{
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*/
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static const sam0_common_usb_config_t sam_usbdev_config[] = {
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{
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.dm = GPIO_PIN(PA, 24),
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.dp = GPIO_PIN(PA, 25),
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.d_mux = GPIO_MUX_G,
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.device = &USB->DEVICE,
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}
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};
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/** @} */
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -1,3 +1,5 @@
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MODULE = board
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MODULE = board
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DIRS += $(RIOTBOARD)/common/sodaq
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include $(RIOTBASE)/Makefile.base
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include $(RIOTBASE)/Makefile.base
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@ -1,3 +1,3 @@
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ifneq (,$(filter saul_default,$(USEMODULE)))
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USEMODULE += boards_common_sodaq
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USEMODULE += saul_gpio
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endif
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include $(RIOTBOARD)/common/sodaq/Makefile.dep
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@ -1,15 +1,3 @@
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CPU = samd21
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CPU_MODEL = samd21j18a
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CPU_MODEL = samd21j18a
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# Put defined MCU peripherals here (in alphabetical order)
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include $(RIOTBOARD)/common/sodaq/Makefile.features
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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FEATURES_PROVIDED += periph_usbdev
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# Various other features (if any)
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FEATURES_PROVIDED += arduino
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@ -1,14 +1 @@
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PORT_LINUX ?= /dev/ttyACM0
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include $(RIOTBOARD)/common/sodaq/Makefile.include
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
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# setup serial terminal
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include $(RIOTMAKE)/tools/serial.inc.mk
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# setup the flash tool used
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# we use BOSSA to flash this board since there's an Arduino bootloader
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# preflashed on it
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export LINKER_SCRIPT ?= $(RIOTCPU)/sam0_common/ldscripts/$(CPU_MODEL)_arduino_bootloader.ld
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include $(RIOTMAKE)/tools/bossa.inc.mk
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# setup the boards dependencies
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include $(RIOTBOARD)/$(BOARD)/Makefile.dep
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@ -1,29 +0,0 @@
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/*
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* Copyright (C) 2017 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_sodaq-explorer
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*
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* @file
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* @brief Board common implementations for the SODAQ ExpLoRer board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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* @}
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*/
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#include "cpu.h"
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#include "board.h"
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#include "periph/gpio.h"
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void board_init(void)
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{
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/* initialize the CPU */
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cpu_init();
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/* initialize the on-board LED */
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gpio_init(LED0_PIN, GPIO_OUT);
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}
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@ -20,7 +20,7 @@
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#define BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#include "cpu.h"
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#include "periph_conf.h"
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#include "board_common.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@ -55,11 +55,6 @@ extern "C" {
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#define RN2XX3_PARAM_PIN_RESET GPIO_PIN(PA, 7)
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#define RN2XX3_PARAM_PIN_RESET GPIO_PIN(PA, 7)
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/** @} */
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/** @} */
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO
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*/
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void board_init(void);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -20,102 +20,17 @@
|
|||||||
#define PERIPH_CONF_H
|
#define PERIPH_CONF_H
|
||||||
|
|
||||||
#include "periph_cpu.h"
|
#include "periph_cpu.h"
|
||||||
|
#include "cfg_clock_default.h"
|
||||||
|
#include "cfg_rtc_default.h"
|
||||||
|
#include "cfg_rtt_default.h"
|
||||||
|
#include "cfg_spi_default.h"
|
||||||
|
#include "cfg_timer_default.h"
|
||||||
|
#include "cfg_usbdev_default.h"
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
|
||||||
* @name External oscillator and clock configuration
|
|
||||||
*
|
|
||||||
* For selection of the used CORECLOCK, we have implemented two choices:
|
|
||||||
*
|
|
||||||
* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
|
|
||||||
* - usage of the internal 8MHz oscillator directly, divided by N if needed
|
|
||||||
*
|
|
||||||
*
|
|
||||||
* The PLL option allows for the usage of a wider frequency range and a more
|
|
||||||
* stable clock with less jitter. This is why we use this option as default.
|
|
||||||
*
|
|
||||||
* The target frequency is computed from the PLL multiplier and the PLL divisor.
|
|
||||||
* Use the following formula to compute your values:
|
|
||||||
*
|
|
||||||
* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
|
|
||||||
*
|
|
||||||
* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
|
|
||||||
* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
|
|
||||||
*
|
|
||||||
*
|
|
||||||
* The internal Oscillator used directly can lead to a slightly better power
|
|
||||||
* efficiency to the cost of a less stable clock. Use this option when you know
|
|
||||||
* what you are doing! The actual core frequency is adjusted as follows:
|
|
||||||
*
|
|
||||||
* CORECLOCK = 8MHz / DIV
|
|
||||||
*
|
|
||||||
* NOTE: A core clock frequency below 1MHz is not recommended
|
|
||||||
*
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define CLOCK_USE_PLL (1)
|
|
||||||
|
|
||||||
#if CLOCK_USE_PLL
|
|
||||||
/* edit these values to adjust the PLL output frequency */
|
|
||||||
#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
|
|
||||||
#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
|
|
||||||
/* generate the actual used core clock frequency */
|
|
||||||
#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
|
|
||||||
#else
|
|
||||||
/* edit this value to your needs */
|
|
||||||
#define CLOCK_DIV (1U)
|
|
||||||
/* generate the actual core clock frequency */
|
|
||||||
#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
|
|
||||||
#endif
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name Timer peripheral configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const tc32_conf_t timer_config[] = {
|
|
||||||
{ /* Timer 0 - System Clock */
|
|
||||||
.dev = TC3,
|
|
||||||
.irq = TC3_IRQn,
|
|
||||||
.pm_mask = PM_APBCMASK_TC3,
|
|
||||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
|
|
||||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
|
||||||
#else
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
|
||||||
#endif
|
|
||||||
.flags = TC_CTRLA_MODE_COUNT16,
|
|
||||||
},
|
|
||||||
{ /* Timer 1 */
|
|
||||||
.dev = TC4,
|
|
||||||
.irq = TC4_IRQn,
|
|
||||||
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
|
|
||||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
|
|
||||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
|
||||||
#else
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
|
||||||
#endif
|
|
||||||
.flags = TC_CTRLA_MODE_COUNT32,
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#define TIMER_0_MAX_VALUE 0xffff
|
|
||||||
|
|
||||||
/* interrupt function name mapping */
|
|
||||||
#define TIMER_0_ISR isr_tc3
|
|
||||||
#define TIMER_1_ISR isr_tc4
|
|
||||||
|
|
||||||
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @name UART configuration
|
* @name UART configuration
|
||||||
* @{
|
* @{
|
||||||
@ -190,27 +105,6 @@ static const adc_conf_chan_t adc_channels[] = {
|
|||||||
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
|
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
/**
|
|
||||||
* @name SPI configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const spi_conf_t spi_config[] = {
|
|
||||||
{
|
|
||||||
.dev = &SERCOM3->SPI,
|
|
||||||
.miso_pin = GPIO_PIN(PA, 22),
|
|
||||||
.mosi_pin = GPIO_PIN(PA, 20),
|
|
||||||
.clk_pin = GPIO_PIN(PA, 21),
|
|
||||||
.miso_mux = GPIO_MUX_C,
|
|
||||||
.mosi_mux = GPIO_MUX_C,
|
|
||||||
.clk_mux = GPIO_MUX_C,
|
|
||||||
.miso_pad = SPI_PAD_MISO_0,
|
|
||||||
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#define SPI_NUMOF ARRAY_SIZE(spi_config)
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @name I2C configuration
|
* @name I2C configuration
|
||||||
* @{
|
* @{
|
||||||
@ -236,43 +130,6 @@ static const i2c_conf_t i2c_config[] = {
|
|||||||
}
|
}
|
||||||
};
|
};
|
||||||
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
||||||
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name RTC configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define RTC_NUMOF (1U)
|
|
||||||
#define RTC_DEV RTC->MODE2
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name RTT configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define RTT_NUMOF (1U)
|
|
||||||
#define RTT_DEV RTC->MODE0
|
|
||||||
#define RTT_IRQ RTC_IRQn
|
|
||||||
#define RTT_IRQ_PRIO 10
|
|
||||||
#define RTT_ISR isr_rtc
|
|
||||||
#define RTT_MAX_VALUE (0xffffffff)
|
|
||||||
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
|
|
||||||
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name USB peripheral configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const sam0_common_usb_config_t sam_usbdev_config[] = {
|
|
||||||
{
|
|
||||||
.dm = GPIO_PIN(PA, 24),
|
|
||||||
.dp = GPIO_PIN(PA, 25),
|
|
||||||
.d_mux = GPIO_MUX_G,
|
|
||||||
.device = &USB->DEVICE,
|
|
||||||
}
|
|
||||||
};
|
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
|||||||
@ -1,3 +1 @@
|
|||||||
ifneq (,$(filter saul_default,$(USEMODULE)))
|
include $(RIOTBOARD)/common/sodaq/Makefile.dep
|
||||||
USEMODULE += saul_gpio
|
|
||||||
endif
|
|
||||||
|
|||||||
@ -1,15 +1,3 @@
|
|||||||
CPU = samd21
|
|
||||||
CPU_MODEL = samd21g18a
|
CPU_MODEL = samd21g18a
|
||||||
|
|
||||||
# Put defined MCU peripherals here (in alphabetical order)
|
include $(RIOTBOARD)/common/sodaq/Makefile.features
|
||||||
FEATURES_PROVIDED += periph_adc
|
|
||||||
FEATURES_PROVIDED += periph_i2c
|
|
||||||
FEATURES_PROVIDED += periph_rtc
|
|
||||||
FEATURES_PROVIDED += periph_rtt
|
|
||||||
FEATURES_PROVIDED += periph_spi
|
|
||||||
FEATURES_PROVIDED += periph_timer
|
|
||||||
FEATURES_PROVIDED += periph_uart
|
|
||||||
FEATURES_PROVIDED += periph_usbdev
|
|
||||||
|
|
||||||
# Various other features (if any)
|
|
||||||
FEATURES_PROVIDED += arduino
|
|
||||||
|
|||||||
@ -1,14 +1 @@
|
|||||||
PORT_LINUX ?= /dev/ttyACM0
|
include $(RIOTBOARD)/common/sodaq/Makefile.include
|
||||||
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
|
|
||||||
|
|
||||||
# setup serial terminal
|
|
||||||
include $(RIOTMAKE)/tools/serial.inc.mk
|
|
||||||
|
|
||||||
# setup the flash tool used
|
|
||||||
# we use BOSSA to flash this board since there's an Arduino bootloader
|
|
||||||
# preflashed on it. ROM_OFFSET skips the space taken by such bootloader.
|
|
||||||
ROM_OFFSET ?= 0x2000
|
|
||||||
include $(RIOTMAKE)/tools/bossa.inc.mk
|
|
||||||
|
|
||||||
# setup the boards dependencies
|
|
||||||
include $(RIOTBOARD)/$(BOARD)/Makefile.dep
|
|
||||||
|
|||||||
@ -20,7 +20,7 @@
|
|||||||
#define BOARD_H
|
#define BOARD_H
|
||||||
|
|
||||||
#include "cpu.h"
|
#include "cpu.h"
|
||||||
#include "periph_conf.h"
|
#include "board_common.h"
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
@ -106,11 +106,6 @@ extern "C" {
|
|||||||
#define LORA_RESET_TOGGLE (LORA_RESET_PORT.OUTTGL.reg = LORA_RESET_MASK)
|
#define LORA_RESET_TOGGLE (LORA_RESET_PORT.OUTTGL.reg = LORA_RESET_MASK)
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
|
|
||||||
*/
|
|
||||||
void board_init(void);
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -23,102 +23,16 @@
|
|||||||
|
|
||||||
#include "cpu.h"
|
#include "cpu.h"
|
||||||
#include "periph_cpu.h"
|
#include "periph_cpu.h"
|
||||||
|
#include "cfg_clock_default.h"
|
||||||
|
#include "cfg_rtc_default.h"
|
||||||
|
#include "cfg_rtt_default.h"
|
||||||
|
#include "cfg_timer_default.h"
|
||||||
|
#include "cfg_usbdev_default.h"
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
|
||||||
* @name External oscillator and clock configuration
|
|
||||||
*
|
|
||||||
* For selection of the used CORECLOCK, we have implemented two choices:
|
|
||||||
*
|
|
||||||
* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
|
|
||||||
* - usage of the internal 8MHz oscillator directly, divided by N if needed
|
|
||||||
*
|
|
||||||
*
|
|
||||||
* The PLL option allows for the usage of a wider frequency range and a more
|
|
||||||
* stable clock with less jitter. This is why we use this option as default.
|
|
||||||
*
|
|
||||||
* The target frequency is computed from the PLL multiplier and the PLL divisor.
|
|
||||||
* Use the following formula to compute your values:
|
|
||||||
*
|
|
||||||
* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
|
|
||||||
*
|
|
||||||
* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
|
|
||||||
* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
|
|
||||||
*
|
|
||||||
*
|
|
||||||
* The internal Oscillator used directly can lead to a slightly better power
|
|
||||||
* efficiency to the cost of a less stable clock. Use this option when you know
|
|
||||||
* what you are doing! The actual core frequency is adjusted as follows:
|
|
||||||
*
|
|
||||||
* CORECLOCK = 8MHz / DIV
|
|
||||||
*
|
|
||||||
* NOTE: A core clock frequency below 1MHz is not recommended
|
|
||||||
*
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define CLOCK_USE_PLL (1)
|
|
||||||
|
|
||||||
#if CLOCK_USE_PLL
|
|
||||||
/* edit these values to adjust the PLL output frequency */
|
|
||||||
#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
|
|
||||||
#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
|
|
||||||
/* generate the actual used core clock frequency */
|
|
||||||
#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
|
|
||||||
#else
|
|
||||||
/* edit this value to your needs */
|
|
||||||
#define CLOCK_DIV (1U)
|
|
||||||
/* generate the actual core clock frequency */
|
|
||||||
#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
|
|
||||||
#endif
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name Timer peripheral configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const tc32_conf_t timer_config[] = {
|
|
||||||
{ /* Timer 0 - System Clock */
|
|
||||||
.dev = TC3,
|
|
||||||
.irq = TC3_IRQn,
|
|
||||||
.pm_mask = PM_APBCMASK_TC3,
|
|
||||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
|
|
||||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
|
||||||
#else
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
|
||||||
#endif
|
|
||||||
.flags = TC_CTRLA_MODE_COUNT16,
|
|
||||||
},
|
|
||||||
{ /* Timer 1 */
|
|
||||||
.dev = TC4,
|
|
||||||
.irq = TC4_IRQn,
|
|
||||||
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
|
|
||||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
|
|
||||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
|
||||||
#else
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
|
||||||
#endif
|
|
||||||
.flags = TC_CTRLA_MODE_COUNT32,
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#define TIMER_0_MAX_VALUE 0xffff
|
|
||||||
|
|
||||||
/* interrupt function name mapping */
|
|
||||||
#define TIMER_0_ISR isr_tc3
|
|
||||||
#define TIMER_1_ISR isr_tc4
|
|
||||||
|
|
||||||
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @name UART configuration
|
* @name UART configuration
|
||||||
* @{
|
* @{
|
||||||
@ -227,43 +141,6 @@ static const i2c_conf_t i2c_config[] = {
|
|||||||
}
|
}
|
||||||
};
|
};
|
||||||
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
||||||
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name RTC configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define RTC_NUMOF (1U)
|
|
||||||
#define RTC_DEV RTC->MODE2
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name RTT configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define RTT_NUMOF (1U)
|
|
||||||
#define RTT_DEV RTC->MODE0
|
|
||||||
#define RTT_IRQ RTC_IRQn
|
|
||||||
#define RTT_IRQ_PRIO 10
|
|
||||||
#define RTT_ISR isr_rtc
|
|
||||||
#define RTT_MAX_VALUE (0xffffffff)
|
|
||||||
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
|
|
||||||
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name USB peripheral configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const sam0_common_usb_config_t sam_usbdev_config[] = {
|
|
||||||
{
|
|
||||||
.dm = GPIO_PIN(PA, 24),
|
|
||||||
.dp = GPIO_PIN(PA, 25),
|
|
||||||
.d_mux = GPIO_MUX_G,
|
|
||||||
.device = &USB->DEVICE,
|
|
||||||
}
|
|
||||||
};
|
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
|||||||
@ -1,3 +1 @@
|
|||||||
ifneq (,$(filter saul_default,$(USEMODULE)))
|
include $(RIOTBOARD)/common/sodaq/Makefile.dep
|
||||||
USEMODULE += saul_gpio
|
|
||||||
endif
|
|
||||||
|
|||||||
@ -1,15 +1,3 @@
|
|||||||
CPU = samd21
|
|
||||||
CPU_MODEL = samd21j18a
|
CPU_MODEL = samd21j18a
|
||||||
|
|
||||||
# Put defined MCU peripherals here (in alphabetical order)
|
include $(RIOTBOARD)/common/sodaq/Makefile.features
|
||||||
FEATURES_PROVIDED += periph_adc
|
|
||||||
FEATURES_PROVIDED += periph_i2c
|
|
||||||
FEATURES_PROVIDED += periph_rtc
|
|
||||||
FEATURES_PROVIDED += periph_rtt
|
|
||||||
FEATURES_PROVIDED += periph_spi
|
|
||||||
FEATURES_PROVIDED += periph_timer
|
|
||||||
FEATURES_PROVIDED += periph_uart
|
|
||||||
FEATURES_PROVIDED += periph_usbdev
|
|
||||||
|
|
||||||
# Various other features (if any)
|
|
||||||
FEATURES_PROVIDED += arduino
|
|
||||||
|
|||||||
@ -1,14 +1 @@
|
|||||||
PORT_LINUX ?= /dev/ttyACM0
|
include $(RIOTBOARD)/common/sodaq/Makefile.include
|
||||||
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
|
|
||||||
|
|
||||||
# setup serial terminal
|
|
||||||
include $(RIOTMAKE)/tools/serial.inc.mk
|
|
||||||
|
|
||||||
# setup the flash tool used
|
|
||||||
# we use BOSSA to flash this board since there's an Arduino bootloader
|
|
||||||
# preflashed on it. ROM_OFFSET skips the space taken by such bootloader.
|
|
||||||
ROM_OFFSET ?= 0x2000
|
|
||||||
include $(RIOTMAKE)/tools/bossa.inc.mk
|
|
||||||
|
|
||||||
# setup the boards dependencies
|
|
||||||
include $(RIOTBOARD)/$(BOARD)/Makefile.dep
|
|
||||||
|
|||||||
@ -20,7 +20,7 @@
|
|||||||
#define BOARD_H
|
#define BOARD_H
|
||||||
|
|
||||||
#include "cpu.h"
|
#include "cpu.h"
|
||||||
#include "periph_conf.h"
|
#include "board_common.h"
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
@ -155,11 +155,6 @@ extern "C" {
|
|||||||
#define NB_IOT_TOGGLE_OFF (NB_IOT_TOGGLE_PORT.OUTCLR.reg = NB_IOT_TOGGLE_MASK)
|
#define NB_IOT_TOGGLE_OFF (NB_IOT_TOGGLE_PORT.OUTCLR.reg = NB_IOT_TOGGLE_MASK)
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
|
|
||||||
*/
|
|
||||||
void board_init(void);
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -25,102 +25,17 @@
|
|||||||
|
|
||||||
#include "cpu.h"
|
#include "cpu.h"
|
||||||
#include "periph_cpu.h"
|
#include "periph_cpu.h"
|
||||||
|
#include "cfg_clock_default.h"
|
||||||
|
#include "cfg_rtc_default.h"
|
||||||
|
#include "cfg_rtt_default.h"
|
||||||
|
#include "cfg_spi_default.h"
|
||||||
|
#include "cfg_timer_default.h"
|
||||||
|
#include "cfg_usbdev_default.h"
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
|
||||||
* @name External oscillator and clock configuration
|
|
||||||
*
|
|
||||||
* For selection of the used CORECLOCK, we have implemented two choices:
|
|
||||||
*
|
|
||||||
* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
|
|
||||||
* - usage of the internal 8MHz oscillator directly, divided by N if needed
|
|
||||||
*
|
|
||||||
*
|
|
||||||
* The PLL option allows for the usage of a wider frequency range and a more
|
|
||||||
* stable clock with less jitter. This is why we use this option as default.
|
|
||||||
*
|
|
||||||
* The target frequency is computed from the PLL multiplier and the PLL divisor.
|
|
||||||
* Use the following formula to compute your values:
|
|
||||||
*
|
|
||||||
* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
|
|
||||||
*
|
|
||||||
* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
|
|
||||||
* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
|
|
||||||
*
|
|
||||||
*
|
|
||||||
* The internal Oscillator used directly can lead to a slightly better power
|
|
||||||
* efficiency to the cost of a less stable clock. Use this option when you know
|
|
||||||
* what you are doing! The actual core frequency is adjusted as follows:
|
|
||||||
*
|
|
||||||
* CORECLOCK = 8MHz / DIV
|
|
||||||
*
|
|
||||||
* NOTE: A core clock frequency below 1MHz is not recommended
|
|
||||||
*
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define CLOCK_USE_PLL (1)
|
|
||||||
|
|
||||||
#if CLOCK_USE_PLL
|
|
||||||
/* edit these values to adjust the PLL output frequency */
|
|
||||||
#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
|
|
||||||
#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
|
|
||||||
/* generate the actual used core clock frequency */
|
|
||||||
#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
|
|
||||||
#else
|
|
||||||
/* edit this value to your needs */
|
|
||||||
#define CLOCK_DIV (1U)
|
|
||||||
/* generate the actual core clock frequency */
|
|
||||||
#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
|
|
||||||
#endif
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name Timer peripheral configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const tc32_conf_t timer_config[] = {
|
|
||||||
{ /* Timer 0 - System Clock */
|
|
||||||
.dev = TC3,
|
|
||||||
.irq = TC3_IRQn,
|
|
||||||
.pm_mask = PM_APBCMASK_TC3,
|
|
||||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
|
|
||||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
|
||||||
#else
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
|
||||||
#endif
|
|
||||||
.flags = TC_CTRLA_MODE_COUNT16,
|
|
||||||
},
|
|
||||||
{ /* Timer 1 */
|
|
||||||
.dev = TC4,
|
|
||||||
.irq = TC4_IRQn,
|
|
||||||
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
|
|
||||||
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
|
|
||||||
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(1),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV1,
|
|
||||||
#else
|
|
||||||
.gclk_src = GCLK_CLKCTRL_GEN(0),
|
|
||||||
.prescaler = TC_CTRLA_PRESCALER_DIV8,
|
|
||||||
#endif
|
|
||||||
.flags = TC_CTRLA_MODE_COUNT32,
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#define TIMER_0_MAX_VALUE 0xffff
|
|
||||||
|
|
||||||
/* interrupt function name mapping */
|
|
||||||
#define TIMER_0_ISR isr_tc3
|
|
||||||
#define TIMER_1_ISR isr_tc4
|
|
||||||
|
|
||||||
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @name UART configuration
|
* @name UART configuration
|
||||||
* @{
|
* @{
|
||||||
@ -186,27 +101,6 @@ static const adc_conf_chan_t adc_channels[] = {
|
|||||||
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
|
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
/**
|
|
||||||
* @name SPI configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const spi_conf_t spi_config[] = {
|
|
||||||
{
|
|
||||||
.dev = &SERCOM3->SPI,
|
|
||||||
.miso_pin = GPIO_PIN(PA, 22),
|
|
||||||
.mosi_pin = GPIO_PIN(PA, 20),
|
|
||||||
.clk_pin = GPIO_PIN(PA, 21),
|
|
||||||
.miso_mux = GPIO_MUX_C,
|
|
||||||
.mosi_mux = GPIO_MUX_D,
|
|
||||||
.clk_mux = GPIO_MUX_D,
|
|
||||||
.miso_pad = SPI_PAD_MISO_0,
|
|
||||||
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
#define SPI_NUMOF ARRAY_SIZE(spi_config)
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @name I2C configuration
|
* @name I2C configuration
|
||||||
* @{
|
* @{
|
||||||
@ -223,43 +117,6 @@ static const i2c_conf_t i2c_config[] = {
|
|||||||
}
|
}
|
||||||
};
|
};
|
||||||
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
#define I2C_NUMOF ARRAY_SIZE(i2c_config)
|
||||||
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name RTC configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define RTC_NUMOF (1U)
|
|
||||||
#define RTC_DEV RTC->MODE2
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name RTT configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#define RTT_NUMOF (1U)
|
|
||||||
#define RTT_DEV RTC->MODE0
|
|
||||||
#define RTT_IRQ RTC_IRQn
|
|
||||||
#define RTT_IRQ_PRIO 10
|
|
||||||
#define RTT_ISR isr_rtc
|
|
||||||
#define RTT_MAX_VALUE (0xffffffff)
|
|
||||||
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
|
|
||||||
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
|
|
||||||
/** @} */
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @name USB peripheral configuration
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
static const sam0_common_usb_config_t sam_usbdev_config[] = {
|
|
||||||
{
|
|
||||||
.dm = GPIO_PIN(PA, 24),
|
|
||||||
.dp = GPIO_PIN(PA, 25),
|
|
||||||
.d_mux = GPIO_MUX_G,
|
|
||||||
.device = &USB->DEVICE,
|
|
||||||
}
|
|
||||||
};
|
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user