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drivers/at86rf2xx: simplify channel-page logic

This commit is contained in:
Jose Alamos 2022-11-28 15:35:36 +01:00
parent 2965419028
commit 5207a82e03
No known key found for this signature in database
GPG Key ID: F483EB800EF89DD9
6 changed files with 18 additions and 57 deletions

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@ -188,8 +188,8 @@ void at86rf2xx_reset(at86rf2xx_t *dev)
at86rf2xx_set_addr_long(dev, (eui64_t *)dev->netdev.long_addr);
at86rf2xx_set_addr_short(dev, (network_uint16_t *)dev->netdev.short_addr);
/* set default channel */
at86rf2xx_set_chan(dev, AT86RF2XX_DEFAULT_CHANNEL);
/* set default channel and page */
at86rf2xx_configure_phy(dev, AT86RF2XX_DEFAULT_CHANNEL, AT86RF2XX_DEFAULT_PAGE);
/* set default TX power */
at86rf2xx_set_txpower(dev, AT86RF2XX_DEFAULT_TXPOWER);
/* set default options */
@ -206,9 +206,6 @@ void at86rf2xx_reset(at86rf2xx_t *dev)
/* enable safe mode (protect RX FIFO until reading data starts) */
at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2,
AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE);
#if AT86RF2XX_HAVE_SUBGHZ
at86rf2xx_set_page(dev, AT86RF2XX_DEFAULT_PAGE);
#endif
#if !AT86RF2XX_IS_PERIPH
/* don't populate masked interrupt flags to IRQ_STATUS register */

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@ -112,34 +112,6 @@ void at86rf2xx_set_addr_long(at86rf2xx_t *dev, const eui64_t *addr)
}
}
void at86rf2xx_set_chan(at86rf2xx_t *dev, uint8_t channel)
{
if ((channel > AT86RF2XX_MAX_CHANNEL)
#if AT86RF2XX_MIN_CHANNEL /* is zero for sub-GHz */
|| (channel < AT86RF2XX_MIN_CHANNEL)
#endif
) {
return;
}
dev->netdev.chan = channel;
at86rf2xx_configure_phy(dev);
}
void at86rf2xx_set_page(at86rf2xx_t *dev, uint8_t page)
{
#if AT86RF2XX_HAVE_SUBGHZ
if ((page == 0) || (page == 2)) {
dev->page = page;
at86rf2xx_configure_phy(dev);
}
#else
(void) dev;
(void) page;
#endif
}
uint8_t at86rf2xx_get_phy_mode(at86rf2xx_t *dev)
{
#if AT86RF2XX_HAVE_SUBGHZ

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@ -164,10 +164,11 @@ void at86rf2xx_hardware_reset(at86rf2xx_t *dev)
&& (dev->state != AT86RF2XX_STATE_P_ON));
}
void at86rf2xx_configure_phy(at86rf2xx_t *dev)
void at86rf2xx_configure_phy(at86rf2xx_t *dev, uint8_t chan, uint8_t page)
{
/* we must be in TRX_OFF before changing the PHY configuration */
uint8_t prev_state = at86rf2xx_set_state(dev, AT86RF2XX_STATE_TRX_OFF);
(void) page;
#if AT86RF2XX_HAVE_SUBGHZ
/* The TX power register must be updated after changing the channel if
@ -182,17 +183,17 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev)
/* Clear previous configuration for GC_TX_OFFS */
rf_ctrl0 &= ~AT86RF2XX_RF_CTRL_0_MASK__GC_TX_OFFS;
if (dev->netdev.chan != 0) {
if (chan != 0) {
/* Set sub mode bit on 915 MHz as recommended by the data sheet */
trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__SUB_MODE;
}
if (dev->page == 0) {
if (page == 0) {
/* BPSK coding */
/* Data sheet recommends using a +2 dB setting for BPSK */
rf_ctrl0 |= AT86RF2XX_RF_CTRL_0_GC_TX_OFFS__2DB;
}
else if (dev->page == 2) {
else if (page == 2) {
/* O-QPSK coding */
trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__BPSK_OQPSK;
/* Data sheet recommends using a +1 dB setting for O-QPSK */
@ -208,7 +209,7 @@ void at86rf2xx_configure_phy(at86rf2xx_t *dev)
phy_cc_cca &= ~(AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);
/* Update the channel register */
phy_cc_cca |= (dev->netdev.chan & AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);
phy_cc_cca |= (chan & AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);
at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_CC_CCA, phy_cc_cca);
#if AT86RF2XX_HAVE_SUBGHZ

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@ -517,7 +517,12 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len)
res = -EINVAL;
break;
}
at86rf2xx_set_chan(dev, chan);
dev->netdev.chan = chan;
#if AT86RF2XX_HAVE_SUBGHZ
at86rf2xx_configure_phy(dev, chan, dev->page);
#else
at86rf2xx_configure_phy(dev, chan, 0);
#endif
/* don't set res to set netdev_ieee802154_t::chan */
break;
@ -529,7 +534,8 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len)
res = -EINVAL;
}
else {
at86rf2xx_set_page(dev, page);
dev->page = page;
at86rf2xx_configure_phy(dev, dev->netdev.chan, page);
res = sizeof(uint16_t);
}
#else

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@ -221,7 +221,7 @@ void at86rf2xx_hardware_reset(at86rf2xx_t *dev);
*
* @param[in,out] dev device to configure
*/
void at86rf2xx_configure_phy(at86rf2xx_t *dev);
void at86rf2xx_configure_phy(at86rf2xx_t *dev, uint8_t chan, uint8_t page);
#if AT86RF2XX_RANDOM_NUMBER_GENERATOR || defined(DOXYGEN)
/**

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@ -68,6 +68,7 @@ extern "C" {
#define AT86RF2XX_MIN_CHANNEL (IEEE802154_CHANNEL_MIN)
#define AT86RF2XX_MAX_CHANNEL (IEEE802154_CHANNEL_MAX)
#define AT86RF2XX_DEFAULT_CHANNEL (CONFIG_IEEE802154_DEFAULT_CHANNEL)
#define AT86RF2XX_DEFAULT_PAGE (0)
/* Only page 0 is supported in the 2.4 GHz band */
#endif
/** @} */
@ -344,22 +345,6 @@ void at86rf2xx_set_addr_short(at86rf2xx_t *dev, const network_uint16_t *addr);
*/
void at86rf2xx_set_addr_long(at86rf2xx_t *dev, const eui64_t *addr);
/**
* @brief Set the channel number of the given device
*
* @param[in,out] dev device to write to
* @param[in] chan channel number to set
*/
void at86rf2xx_set_chan(at86rf2xx_t *dev, uint8_t chan);
/**
* @brief Set the channel page of the given device
*
* @param[in,out] dev device to write to
* @param[in] page channel page to set
*/
void at86rf2xx_set_page(at86rf2xx_t *dev, uint8_t page);
/**
* @brief Get the PHY mode of the given device
*