diff --git a/cpu/fe310/Kconfig b/cpu/fe310/Kconfig
index 1dc1554eac..d1be703e52 100644
--- a/cpu/fe310/Kconfig
+++ b/cpu/fe310/Kconfig
@@ -8,7 +8,7 @@
 config CPU_ARCH_RISCV
     bool
     select HAS_ARCH_RISCV
-    select HAS_PICOLIBC
+    select HAS_PICOLIBC if '$(RIOT_CI_BUILD)' != '1'
 
 config CPU_CORE_RV32M
     bool
diff --git a/cpu/fe310/Makefile.features b/cpu/fe310/Makefile.features
index b60d9bd97e..5830696231 100644
--- a/cpu/fe310/Makefile.features
+++ b/cpu/fe310/Makefile.features
@@ -7,5 +7,9 @@ FEATURES_PROVIDED += periph_gpio periph_gpio_irq
 FEATURES_PROVIDED += periph_plic
 FEATURES_PROVIDED += periph_pm
 FEATURES_PROVIDED += periph_wdt
-FEATURES_PROVIDED += picolibc
 FEATURES_PROVIDED += ssp
+
+# RISC-V toolchain on CI does not work properly with picolibc yet
+ifeq (,$(RIOT_CI_BUILD))
+  FEATURES_PROVIDED += picolibc
+endif