RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

treewide: Remove excessive newlines

Browse Source
This commit is contained in:
Jan Romann 2021-08-13 18:48:57 +02:00
parent 1fd645ebcd
commit 4384795cb9
No known key found for this signature in database
GPG Key ID: 9D6F0ED2C06FDDB0
522 changed files with 0 additions and 788 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
boards/6lowpan-clicker/include/board.h
View File

@ -78,6 +78,5 @@ void board_init(void);
}
#endif
#endif /* BOARD_H */
/** @} */

1
boards/6lowpan-clicker/include/periph_conf.h
View File

@ -29,7 +29,6 @@
extern "C" {
#endif
/**
* @name Clock configurations
* @{

3
boards/6lowpan-clicker/pic32_config_settings.c
View File

@ -31,8 +31,6 @@ volatile uint32_t _DEVCFG3 __attribute__((used, section(".devcfg3"))) =
| (_DEVCFG3_FUSBIDIO_MASK & 0 << _DEVCFG3_FUSBIDIO_POSITION)
| (_DEVCFG3_FVBUSONIO_MASK & 1 << _DEVCFG3_FVBUSONIO_POSITION);
/* Note this sets the PLL to 96MHz (8/2 * 24) which is only supported by 3xx
* and 4xx parts and assumes an 8MHz XTAL.
*
@ -86,7 +84,6 @@ volatile uint32_t _DEVCFG1 __attribute__ ((used, section(".devcfg1"))) =
& (~_DEVCFG1_FWDTEN_MASK | 0 << _DEVCFG1_FWDTEN_POSITION)
& (~_DEVCFG1_FWDTWINSZ_MASK | 3 << _DEVCFG1_FWDTWINSZ_POSITION);
/*
* DEVCFG0 @ 0x1FC02FFC
*

1
boards/acd52832/include/gpio_params.h
View File

@ -46,7 +46,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
}
};
#ifdef __cplusplus
}
#endif

2
boards/avr-rss2/include/board.h
View File

@ -58,7 +58,6 @@ extern "C" {
#define LED1_ON (LED_PORT &= ~LED1_MASK)
#define LED1_TOGGLE (LED_PORT ^= LED1_MASK)
/**
* @name Usage of LED to turn on when a kernel panic occurs.
* @{
@ -66,7 +65,6 @@ extern "C" {
#define LED_PANIC LED0_ON
/** @} */
/**
* @name DS18 pins OW_BUS_0
* @{

1
boards/avr-rss2/include/eui_provider_params.h
View File

@ -42,7 +42,6 @@ static inline int _at24mac_get_eui64(uint8_t index, eui64_t *addr)
#define EUI64_PROVIDER_INDEX 0
/** @} */
#ifdef __cplusplus
}
#endif

1
boards/avsextrem/board_init.c
View File

@ -7,7 +7,6 @@
* directory for more details.
*/
/**
* @file
* @brief avsextrem board initialization

2
boards/avsextrem/include/board.h
View File

@ -7,7 +7,6 @@
*
*/
/**
* @ingroup boards_avsextrem
* @{
@ -19,7 +18,6 @@
* @author Zakaria Kasmi
*/
#ifndef BOARD_H
#define BOARD_H

1
boards/b-l072z-lrwan1/board.c
View File

@ -21,7 +21,6 @@
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the CPU */

1
boards/blackpill-128kib/include/board.h
View File

@ -27,7 +27,6 @@
#ifndef BOARD_H
#define BOARD_H
#ifdef __cplusplus
extern "C" {
#endif

1
boards/blackpill/include/board.h
View File

@ -27,7 +27,6 @@
#ifndef BOARD_H
#define BOARD_H
#ifdef __cplusplus
extern "C" {
#endif

1
boards/common/arduino-mkr/include/periph_conf_common.h
View File

@ -31,7 +31,6 @@
extern "C" {
#endif
/**
* @name External oscillator and clock configuration
*

1
boards/common/atmega/include/periph_conf_atmega_common.h
View File

@ -89,7 +89,6 @@ extern "C" {
#endif /* UART_NUMOF */
/** @} */
/**
* @name SPI configuration
*

4
boards/common/esp32/include/board_common.h
View File

@ -90,7 +90,6 @@ extern "C" {
#endif
/** @} */
/**
* @name STDIO configuration
* @{
@ -101,7 +100,6 @@ extern "C" {
#endif
/** @} */
#if MODULE_MTD || DOXYGEN
/**
* @name MTD system drive configuration
@ -134,7 +132,6 @@ extern mtd_dev_t *mtd0;
/** @} */
#endif /* MODULE_MTD || DOXYGEN */
#if MODULE_SPIFFS || DOXYGEN
/**
* @name SPIFFS configuration for the system MTD device
@ -150,7 +147,6 @@ extern mtd_dev_t *mtd0;
/** @} */
#endif /* MODULE_SPIFFS || DOXYGEN */
/**
* @brief Initialize the hardware that is common for all ESP32 boards.
*

5
boards/common/esp8266/include/board_common.h
View File

@ -57,7 +57,6 @@ extern "C" {
#endif
/** @} */
/**
* @name STDIO configuration
* @{
@ -67,7 +66,6 @@ extern "C" {
#endif
/** @} */
#ifndef DOXYGEN
/**
* @name XTimer configuration
@ -81,7 +79,6 @@ extern "C" {
/** @} */
#endif /* DOXYGEN */
#if defined(MODULE_MTD) || defined(DOXYGEN)
/**
* @name MTD device configuration
@ -101,7 +98,6 @@ extern mtd_dev_t *mtd0;
/** @} */
#endif /* defined(MODULE_MTD) || defined(DOXYGEN) */
#if defined(MODULE_SPIFFS) || defined(DOXYGEN)
/**
* @name SPIFFS configuration
@ -117,7 +113,6 @@ extern mtd_dev_t *mtd0;
/** @} */
#endif /* defined(MODULE_SPIFFS) || defined(DOXYGEN) */
/**
* @brief Initialize board specific hardware
*

3
boards/common/esp8266/include/periph_conf_common.h
View File

@ -39,7 +39,6 @@ extern "C" {
#define ADC_NUMOF (1) /**< number of ADC channels */
/** @} */
/**
* @name DAC configuration
*
@ -49,7 +48,6 @@ extern "C" {
#define DAC_NUMOF (0) /**< number of DAC channels */
/** @} */
/**
* @name I2C configuration
* @{
@ -204,7 +202,6 @@ static const spi_conf_t spi_config[] = {
#endif /* MODULE_ESP_SW_TIMER */
/** @} */
/**
* @name UART configuration
*

1
boards/common/kw41z/include/cfg_i2c_default.h
View File

@ -26,7 +26,6 @@ extern "C"
{
#endif
/**
* @name I2C configuration
* @{

1
boards/common/msb-430/board_init.c
View File

@ -153,7 +153,6 @@ void msp430_init_dco(void)
CCTL2 = CCIS0 + CM0 + CAP; /* Define CCR2, CAP, ACLK */
TACTL = TASSEL1 + TACLR + MC1; /* SMCLK, continuous mode */
while (1) {
unsigned int compare;

1
boards/common/nrf51/include/cfg_rtt_default.h
View File

@ -43,7 +43,6 @@ extern "C" {
#endif
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

1
boards/common/nrf52xxxdk/include/gpio_params.h
View File

@ -96,7 +96,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
#endif
};
#ifdef __cplusplus
}
#endif

1
boards/common/particle-mesh/include/gpio_params.h
View File

@ -39,7 +39,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
},
};
#ifdef __cplusplus
}
#endif

1
boards/esp32-ethernet-kit-v1_0/include/periph_conf.h
View File

@ -125,7 +125,6 @@
#define UART0_RXD GPIO3 /**< direct I/O pin for UART_DEV(0) RxD, can't be changed */
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

3
boards/esp32-heltec-lora32-v2/include/periph_conf.h
View File

@ -68,7 +68,6 @@
#endif
/** @} */
/**
* @name I2C configuration
*
@ -91,7 +90,6 @@
#endif
/** @} */
/**
* @name PWM channel configuration
*
@ -167,7 +165,6 @@
#endif
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

3
boards/esp32-mh-et-live-minikit/include/periph_conf.h
View File

@ -65,7 +65,6 @@
#endif
/** @} */
/**
* @name I2C configuration
*
@ -88,7 +87,6 @@
#endif
/** @} */
/**
* @name PWM channel configuration
*
@ -164,7 +162,6 @@
#endif
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

3
boards/esp32-ttgo-t-beam/include/periph_conf.h
View File

@ -73,7 +73,6 @@
#endif
/** @} */
/**
* @name I2C configuration
*
@ -96,7 +95,6 @@
#endif
/** @} */
/**
* @name PWM channel configuration
*
@ -170,7 +168,6 @@
#endif
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

6
boards/esp32-wemos-lolin-d32-pro/include/periph_conf.h
View File

@ -83,7 +83,6 @@
#endif
/** @} */
/**
* @name I2C configuration
*
@ -106,7 +105,6 @@
#endif
/** @} */
/**
* @name PWM channel configuration
*
@ -127,8 +125,6 @@
#endif
/** @} */
/**
* @name SPI configuration
*
@ -166,7 +162,6 @@
#endif
/** @} */
/**
* @name UART configuration
*
@ -182,7 +177,6 @@
#define UART0_RXD GPIO3 /**< direct I/O pin for UART_DEV(0) RxD, can't be changed */
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

1
boards/esp32-wroom-32/include/periph_conf.h
View File

@ -195,7 +195,6 @@ extern "C" {
#endif
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

1
boards/esp32-wrover-kit/include/board.h
View File

@ -122,7 +122,6 @@
#endif
/** @} */
/* include common board definitions as last step */
#include "board_common.h"

3
boards/esp32-wrover-kit/include/periph_conf.h
View File

@ -84,7 +84,6 @@
#endif
/** @} */
/**
* @name I2C configuration
*
@ -134,7 +133,6 @@
#endif
/** @} */
/**
* @name SPI configuration
*
@ -207,7 +205,6 @@
#define UART0_RXD GPIO3 /**< direct I/O pin for UART_DEV(0) RxD, can't be changed */
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

1
boards/esp8266-sparkfun-thing/include/board.h
View File

@ -49,7 +49,6 @@ extern "C" {
#endif /* defined(MODULE_PERIPH_SPI) || defined(DOXYGEN) */
/** @} */
#ifdef __cplusplus
} /* end extern "C" */
#endif

1
boards/fox/board.c
View File

@ -21,7 +21,6 @@
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the CPU */

2
boards/frdm-k22f/include/periph_conf.h
View File

@ -189,7 +189,6 @@ static const pwm_conf_t pwm_config[] = {
#define PWM_NUMOF ARRAY_SIZE(pwm_config)
/** @} */
/**
* @name SPI configuration
*
@ -254,7 +253,6 @@ static const spi_conf_t spi_config[] = {
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
/**
* @name I2C configuration
* @{

2
boards/frdm-k64f/include/periph_conf.h
View File

@ -186,7 +186,6 @@ static const pwm_conf_t pwm_config[] = {
#define PWM_NUMOF ARRAY_SIZE(pwm_config)
/** @} */
/**
* @name SPI configuration
*
@ -251,7 +250,6 @@ static const spi_conf_t spi_config[] = {
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
/**
* @name I2C configuration
* @{

1
boards/hamilton/include/periph_conf.h
View File

@ -182,7 +182,6 @@ static const pwm_conf_chan_t pwm_chan1_config[] = {
};
#endif
/* PWM device configuration */
static const pwm_conf_t pwm_config[] = {
#if PWM_0_EN

1
boards/i-nucleo-lrwan1/board.c
View File

@ -21,7 +21,6 @@
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the CPU */

1
boards/im880b/include/board.h
View File

@ -56,7 +56,6 @@ extern "C" {
#define SX127X_PARAM_TX_SWITCH GPIO_PIN(PORT_A, 4)
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/

1
boards/limifrog-v1/board.c
View File

@ -21,7 +21,6 @@
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the CPU */

1
boards/lsn50/board.c
View File

@ -21,7 +21,6 @@
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the CPU */

1
boards/msba2/include/periph_conf.h
View File

@ -68,7 +68,6 @@ extern "C" {
#define PWM_FUNC (1)
/** @} */
/**
* @name UART configuration
* @{

1
boards/mulle/include/periph_conf.h
View File

@ -7,7 +7,6 @@
* details.
*/
/**
* @ingroup boards_mulle
* @{

1
boards/nrf52832-mdk/include/gpio_params.h
View File

@ -51,7 +51,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
},
};
#ifdef __cplusplus
}
#endif

1
boards/nrf52840-mdk-dongle/include/gpio_params.h
View File

@ -59,7 +59,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
},
};
#ifdef __cplusplus
}
#endif

1
boards/nrf52840-mdk/include/gpio_params.h
View File

@ -57,7 +57,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
},
};
#ifdef __cplusplus
}
#endif

1
boards/nrf52840dongle/include/gpio_params.h
View File

@ -39,7 +39,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
},
};
#ifdef __cplusplus
}
#endif

1
boards/nucleo-f070rb/include/periph_conf.h
View File

@ -55,7 +55,6 @@ static const timer_conf_t timer_config[] = {
#define TIMER_0_ISR isr_tim1_cc
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */

1
boards/nucleo-f091rc/include/periph_conf.h
View File

@ -127,7 +127,6 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
/**
* @name SPI configuration
* @{

1
boards/nucleo-l152re/include/periph_conf.h
View File

@ -227,7 +227,6 @@ static const dac_conf_t dac_config[] = {
#define DAC_NUMOF ARRAY_SIZE(dac_config)
/** @} */
#ifdef __cplusplus
}
#endif

1
boards/nucleo-l412kb/include/periph_conf.h
View File

@ -34,7 +34,6 @@
#include "cfg_timer_tim2.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
extern "C" {
#endif

1
boards/nucleo-l476rg/include/periph_conf.h
View File

@ -56,7 +56,6 @@ static const dma_conf_t dma_config[] = {
#define DMA_NUMOF ARRAY_SIZE(dma_config)
/** @} */
/**
* @name Timer configuration
* @{

1
boards/nz32-sc151/include/periph_conf.h
View File

@ -193,7 +193,6 @@ static const dac_conf_t dac_config[] = {
#define DAC_NUMOF ARRAY_SIZE(dac_config)
/** @} */
#ifdef __cplusplus
}
#endif

1
boards/p-nucleo-wb55/include/periph_conf.h
View File

@ -16,7 +16,6 @@
* @author Francisco Molina <francois-xavier.molina@inria.fr>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

2
boards/pba-d-01-kw2x/include/periph_conf.h
View File

@ -172,7 +172,6 @@ static const pwm_conf_t pwm_config[] = {
#define PWM_NUMOF ARRAY_SIZE(pwm_config)
/** @} */
/**
* @name SPI device configuration
*
@ -252,7 +251,6 @@ static const spi_conf_t spi_config[] = {
#define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */
/**
* @name I2C configuration
* @{

1
boards/phynode-kw41z/include/board.h
View File

@ -43,7 +43,6 @@ extern "C"
#define LED0_OFF (GPIOB->PSOR = LED0_MASK)
#define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
#define LED1_PIN GPIO_PIN(PORT_B, 1)
#define LED1_MASK (1 << 1)
#define LED1_ON (GPIOB->PCOR = LED1_MASK)

5
boards/pic32-wifire/pic32_config_settings.c
View File

@ -26,7 +26,6 @@
* place them at different addresses.
*/
/*
* DEVCFG3_LA @ 0x1FC0FFC0 (lower alias)
* ADEVFGC3_LA @ 0x1FC0FF40 (alternate devcfg3 in lower alias)
@ -149,7 +148,6 @@ volatile uint32_t ADEVCFG2_B1 __attribute__ ((used, section(".adevcfg2_b1"))) =
/* uint32_t DEVCFG2_B2 __attribute__ ((section(".devcfg2_b2"))) = DEVCFG2_LA; */
/* uint32_t ADEVCFG2_B2 __attribute__ ((section(".adevcfg2_b2"))) = DEVCFG2_LA; */
/*
* DEVCFG1_LA @ 0x1FC0FFC8 (lower alias)
* ADEVFGC1_LA @ 0x1FC0FF48 (alternate devcfg1 in lower alias)
@ -346,7 +344,6 @@ volatile uint32_t ADEVCFG0_B1 __attribute__ ((used, section(".adevcfg0_b1")))=
*
*/
/*
* DEVCP0_LA @ 0x1FC0FFDC (lower alias)
* ADEVCP0_LA @ 0x1FC0FF5C (alternate devcp0 in lower alias)
@ -388,7 +385,6 @@ volatile uint32_t SEQ_B1[4] __attribute__ ((used, section(".seq_b1"))) =
* {0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF};
*/
/*
* STUPIDLY Microchip has hard coded the MSB bit of devsign to 0, So even if
* you erase the whole device, everything returns 0xFFFFFFF except this 1
@ -408,7 +404,6 @@ volatile uint32_t ADEVSIGN_B1 __attribute__ ((used, section(".adevsign_b1"))) =
volatile uint32_t DEVSIGN_B2 __attribute__ ((used, section(".devsign_b2"))) = 0x7FFFFFFF;
volatile uint32_t ADEVSIGN_B2 __attribute__ ((used, section(".adevsign_b2"))) = 0x7FFFFFFF;
/*
* Without a reference to this function from elsewhere LD throws the whole
* compile unit away even though the data is 'volatile' and 'used' !!!

1
boards/reel/include/gpio_params.h
View File

@ -63,7 +63,6 @@ static const saul_gpio_params_t saul_gpio_params[] =
},
};
#ifdef __cplusplus
}
#endif

1
boards/saml21-xpro/board.c
View File

@ -38,7 +38,6 @@ void board_init(void)
led_init();
}
/**
* @brief Initialize the boards on-board LED
*/

1
boards/saml21-xpro/include/board.h
View File

@ -49,7 +49,6 @@ extern "C" {
#define BTN0_MODE GPIO_IN_PU
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/

1
boards/samr30-xpro/board.c
View File

@ -55,7 +55,6 @@ void board_init(void)
board_antenna_config(RFCTL_ANTENNA_DEFAULT);
}
/**
* @brief Initialize the boards on-board LED
*/

1
boards/samr30-xpro/include/periph_conf.h
View File

@ -158,7 +158,6 @@ static const i2c_conf_t i2c_config[] = {
#endif
/** @} */
/**
* @name ADC Configuration
* @{

1
boards/samr34-xpro/board.c
View File

@ -48,7 +48,6 @@ void board_init(void)
#endif /* USEMODULE_SX127X */
}
/**
* @brief Initialize the boards on-board LED
*/

2
boards/samr34-xpro/include/periph_conf.h
View File

@ -59,7 +59,6 @@ static const tc32_conf_t timer_config[] = {
#define TIMER_NUMOF (sizeof(timer_config)/sizeof(timer_config[0]))
/** @} */
/**
* @name UART configuration
* @{
@ -166,7 +165,6 @@ static const adc_conf_chan_t adc_channels[] = {
{GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN7)}
};
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
/** @} */

1
boards/serpente/include/periph_conf.h
View File

@ -281,7 +281,6 @@ static const adc_conf_chan_t adc_channels[] = {
#define ADC_NUMOF ARRAY_SIZE(adc_channels)
/** @} */
/**
* @name USB peripheral configuration
* @{

1
boards/stm32f429i-disc1/include/board.h
View File

@ -53,7 +53,6 @@ extern "C" {
#define BTN0_MODE GPIO_IN
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/

1
boards/stm32f4discovery/include/board.h
View File

@ -80,7 +80,6 @@ extern "C" {
#define BTN0_MODE GPIO_IN
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/

1
boards/stm32f723e-disco/include/board.h
View File

@ -60,7 +60,6 @@ extern "C" {
#define BTN0_MODE GPIO_IN
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/

1
boards/stm32f769i-disco/include/board.h
View File

@ -70,7 +70,6 @@ extern "C" {
#define BTN0_MODE GPIO_IN
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/

2
boards/telosb/board.c
View File

@ -39,7 +39,6 @@ static void telosb_ports_init(void)
P5OUT = 0x70; /* Port5 Output: 01110000 = 0x70 */
P5DIR = 0x70; /* Port5 Direction: 01110000 = 0x70 */
P6SEL = 0xFF; /* Port6 Select: 11111111 = 0xFF */
P6OUT = 0x00; /* Port6 Output: 00000000 = 0x00 */
P6DIR = 0xFF; /* Port6 Direction: 11111000 = 0xFF */
@ -109,7 +108,6 @@ void msp430_init_dco(void)
BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
}
//=========================== public ==========================================
void board_init(void)

2
boards/z1/board.c
View File

@ -21,7 +21,6 @@
* @}
*/
#include "cpu.h"
#include "board.h"
@ -197,7 +196,6 @@ void msp430_init_dco(void)
BCSCTL3 = XCAP_1; /* default value for LFXT1 capacitor and frequency */
}
/* "public" specific initialization function for the Zolertia Z1 hardware */
void board_init(void)

1
bootloaders/riotboot_dfu/bootloader_selection.h
View File

@ -30,7 +30,6 @@ extern "C" {
* if no BTN0_PIN is defined we don't define anything either */
#include <board.h>
/** @brief Button pin for bootloader selection
*
* This pin (typically connected to a button) is checked by the riotboot_dfu

1
core/include/cond.h
View File

@ -185,7 +185,6 @@ void cond_init(cond_t *cond);
*/
void cond_wait(cond_t *cond, mutex_t *mutex);
/**
* @brief Wakes up one thread waiting on the condition variable.
*

3
core/include/msg.h
View File

@ -192,7 +192,6 @@ typedef struct {
} content; /**< Content of the message. */
} msg_t;
/**
* @brief Send a message (blocking).
*
@ -213,7 +212,6 @@ typedef struct {
*/
int msg_send(msg_t *m, kernel_pid_t target_pid);
/**
* @brief Send a message (non-blocking).
*
@ -232,7 +230,6 @@ int msg_send(msg_t *m, kernel_pid_t target_pid);
*/
int msg_try_send(msg_t *m, kernel_pid_t target_pid);
/**
* @brief Send a message to the current thread.
* @details Will work only if the thread has a message queue.

2
cpu/arm7_common/include/VIC.h
View File

@ -26,7 +26,6 @@ extern "C" {
#define INTMode (FIQ32Mode | IRQ32Mode)
/**
* @name IRQ Priority Mapping
*/
@ -41,7 +40,6 @@ extern "C" {
#define LOWEST_PRIORITY 0x0F
/** @} */
#define WDT_INT 0
#define SWI_INT 1
#define ARM_CORE0_INT 2

1
cpu/arm7_common/include/iap.h
View File

@ -63,5 +63,4 @@ uint8_t iap_get_sector(uint32_t addr);
}
#endif
#endif /* IAP_H */

2
cpu/atmega_common/include/atmega_regs_common.h
View File

@ -113,7 +113,6 @@ typedef struct {
#endif
/** @} */
/**
* @brief Peripheral register definitions and instances
* @{
@ -139,7 +138,6 @@ typedef struct {
#endif
/** @} */
#ifdef __cplusplus
}
#endif

1
cpu/atmega_common/include/cpu_conf.h
View File

@ -80,6 +80,5 @@ extern "C" {
}
#endif
#endif /* CPU_CONF_H */
/** @} */

2
cpu/atmega_common/periph/i2c.c
View File

@ -42,7 +42,6 @@
#define ATMEGA_I2C_FLAG_WRITE 0
#define ATMEGA_I2C_FLAG_READ 1
/* static function definitions */
static int _start(uint8_t address, uint8_t rw_flag);
static int _write(const uint8_t *data, int length);
@ -267,7 +266,6 @@ static int _start(uint8_t address, uint8_t rw_flag)
return -1;
}
/* Load ADDRESS and R/W Flag into TWDR Register.
* Clear TWINT bit in TWCR to start transmission of ADDRESS */
TWDR = (address << 1) | rw_flag;

1
cpu/atmega_common/periph/uart.c
View File

@ -212,7 +212,6 @@ static inline void _tx_isr_handler(int num)
avr8_exit_isr();
}
#ifdef UART_0_ISR
ISR(UART_0_ISR, ISR_BLOCK)
{

1
cpu/cc2538/cpu.c
View File

@ -42,7 +42,6 @@ void cpu_init(void)
periph_init();
}
/**
* @brief Configure the controllers clock system
*/

1
cpu/cc2538/include/cc2538.h
View File

@ -804,7 +804,6 @@ typedef volatile uint32_t cc2538_reg_t; /**< Least-significant 32 bits of the IE
#define XOSC32K_FREQ 32768U /**< 32 KHz external oscillator/clock frequency */
#define RCOSC32K_FREQ 32753U /**< 32 KHz internal RC oscillator frequency */
#define CC2538_VTOR_ALIGN 512 /**< CC2538 Vector Table alignment */
#ifdef __cplusplus

1
cpu/cc2538/periph/timer.c
View File

@ -290,7 +290,6 @@ int timer_set_absolute(tim_t tim, int channel, unsigned int value)
return 0;
}
int timer_clear(tim_t tim, int channel)
{
DEBUG("%s(%u, %u)\n", __FUNCTION__, tim, channel);

1
cpu/cc2538/radio/cc2538_rf.c
View File

@ -85,7 +85,6 @@ static void _cc2538_observable_signals(void)
}
}
bool cc2538_channel_clear(void)
{
if (RFCORE->XREG_FSMSTAT0bits.FSM_FFCTRL_STATE == FSM_STATE_IDLE) {

9
cpu/cc26x0_cc13x0/include/cc26x0_cc13x0_aux.h
View File

@ -24,7 +24,6 @@
extern "C" {
#endif
/**
* AUX_AIODIO registers
*/
@ -48,7 +47,6 @@ typedef struct {
#define AUX_AIODIO0 ((aux_aiodio_regs_t *) (AUX_AIODIO0_BASE)) /**< AUX_AIODIO0 register bank */
#define AUX_AIODIO1 ((aux_aiodio_regs_t *) (AUX_AIODIO1_BASE)) /**< AUX_AIODIO1 register bank */
/**
* AUX_TDC registers
*/
@ -73,7 +71,6 @@ typedef struct {
#define AUX_TDC ((aux_tdc_regs_t *) (AUX_TDC_BASE)) /**< AUX_TDC register bank */
/**
* AUX_EVCTL registers
*/
@ -105,7 +102,6 @@ typedef struct {
#define AUX_EVCTL ((aux_evctl_regs_t *) (AUX_EVCTL_BASE)) /**< AUX_EVCTL register bank */
/**
* AUX_WUC registers
*/
@ -154,7 +150,6 @@ typedef struct {
#define AUX_WUC ((aux_wuc_regs_t *) (AUX_WUC_BASE)) /**< AUX_WUC register bank */
/**
* AUX_TIMER registers
*/
@ -175,7 +170,6 @@ typedef struct {
#define AUX_TIMER ((aux_timer_regs_t *) (AUX_TIMER_BASE)) /**< AUX_TIMER register bank */
/**
* AUX_SMPH registers
*/
@ -199,7 +193,6 @@ typedef struct {
#define AUX_SMPH ((aux_smph_regs_t *) (AUX_SMPH_BASE)) /**< AUX_SMPH register bank */
/**
* AUX_ANAIF registers
*/
@ -220,7 +213,6 @@ typedef struct {
#define AUX_ANAIF ((aux_anaif_regs_t *) (AUX_ANAIF_BASE)) /**< AUX_ANAIF register bank */
/**
* ADI_4_AUX registers
*/
@ -246,7 +238,6 @@ typedef struct {
#define ADI_4_AUX ((adi_4_aux_regs_t *) (ADI_4_AUX_BASE)) /**< ADI_4_AUX register bank */
#define ADDI_SEM AUX_SMPH->SMPH0 /**< the semamphore used for ADDI */
#ifdef __cplusplus

4
cpu/cc26x0_cc13x0/include/cc26x0_cc13x0_prcm.h
View File

@ -23,7 +23,6 @@
extern "C" {
#endif
/**
* DDI_0_OSC registers
*/
@ -78,7 +77,6 @@ typedef struct {
#define DDI_0_OSC ((ddi0_osc_regs_t *) (DDI0_OSC_BASE)) /**< DDI_0_OSC register bank */
/**
* AON_SYSCTL registers
*/
@ -96,7 +94,6 @@ typedef struct {
#define AON_SYSCTL ((aon_sysctl_regs_t *) (AON_SYSCTL_BASE)) /**< AON_SYSCTL register bank */
/**
* AON_WUC registers
*/
@ -226,7 +223,6 @@ typedef struct {
#define AON_RTC ((aon_rtc_regs_t *) (AON_RTC_BASE)) /**< AON_RTC register bank */
/**
* PRCM registers
*/

1
cpu/cc26x0_cc13x0/include/periph_cpu.h
View File

@ -31,6 +31,5 @@ extern "C" {
}
#endif
#endif /* PERIPH_CPU_H */
/** @} */

1
cpu/cc26x2_cc13x2/include/cc26x2_cc13x2_aux.h
View File

@ -217,7 +217,6 @@ typedef struct {
reg32_t SWPWRPROF; /**< Software Power Profiler */
} aux_sysif_regs_t;
/**
* @brief AUX_SYSIF register values
* @{

2
cpu/cc26xx_cc13xx/include/cc26xx_cc13xx_i2c.h
View File

@ -25,7 +25,6 @@
extern "C" {
#endif
/**
* I2C registers
*/
@ -102,7 +101,6 @@ typedef struct {
*/
#define MSTAT_IDLE 0x00000020
/**
* @brief Arbitration lost
* @details 0: The I2C controller won arbitration.

1
cpu/cc26xx_cc13xx/include/cc26xx_cc13xx_ioc.h
View File

@ -31,7 +31,6 @@ extern "C" {
#define MCU_IOC_BASE (0x40081000) /**< IOC (MCU) base address */
/** @} */
/**
* @brief obtain IOCFG-register for a DIO
*

1
cpu/cc26xx_cc13xx/include/cc26xx_cc13xx_wdt.h
View File

@ -23,7 +23,6 @@
extern "C" {
#endif
/**
* WDT registers
*/

1
cpu/cc26xx_cc13xx/periph/uart.c
View File

@ -132,7 +132,6 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
return UART_OK;
}
#ifdef MODULE_PERIPH_UART_MODECFG
int uart_mode(uart_t uart, uart_data_bits_t data_bits, uart_parity_t parity,
uart_stop_bits_t stop_bits)

1
cpu/cortexm_common/include/atomic_utils_arch.h
View File

@ -181,7 +181,6 @@ static inline void atomic_clear_bit_u64(atomic_bit_u64_t bit)
_bit_barrier_post();
}
#endif /* CPU_HAS_BITBAND */
#ifdef __cplusplus

1
cpu/cortexm_common/include/cpu_conf_common.h
View File

@ -165,7 +165,6 @@ extern "C" {
#define BACKUP_RAM_DATA __attribute__((section(".backup.data")))
#endif /* CPU_HAS_BACKUP_RAM */
/**
* @brief This arch uses the inlined irq API.
*/

1
cpu/cortexm_common/include/irq_arch.h
View File

@ -18,7 +18,6 @@
* @}
*/
#ifndef IRQ_ARCH_H
#define IRQ_ARCH_H

3
cpu/cortexm_common/thread_arch.c
View File

@ -116,8 +116,6 @@ extern uint32_t _sstack;
#define CPU_CORE_CORTEXM_FULL_THUMB 1
#endif
/**
* @brief Noticeable marker marking the beginning of a stack segment
*
@ -226,7 +224,6 @@ char *thread_stack_init(thread_task_func_t task_func,
}
#endif
/* The returned stack pointer will be aligned on a 32 bit boundary not on a
* 64 bit boundary because of the odd number of registers above (8+9).
* This is not a problem since the initial stack pointer upon process entry

2
cpu/efm32/include/periph_cpu.h
View File

@ -385,7 +385,6 @@ typedef struct {
} timer_conf_t;
/** @} */
/**
* @brief Use LETIMER as the base timer for XTIMER
*/
@ -393,7 +392,6 @@ typedef struct {
#define CONFIG_EFM32_XTIMER_USE_LETIMER 0
#endif
/**
* @brief UART device configuration.
*/

1
cpu/esp32/include/periph_cpu.h
View File

@ -496,7 +496,6 @@ typedef struct {
#define PERIPH_SPI_NEEDS_TRANSFER_REGS /**< requires function spi_transfer_regs */
/** @} */
/**
* @name Timer configuration depending on which implementation is used
*

1
cpu/esp32/periph/adc.c
View File

@ -148,7 +148,6 @@ int adc_init(adc_t line)
return 0;
}
int32_t adc_sample(adc_t line, adc_res_t res)
{
CHECK_PARAM_RET (line < ADC_NUMOF, -1)

2
cpu/esp32/periph/gpio.c
View File

@ -249,7 +249,6 @@ const char* _gpio_pin_usage_str[] =
"GPIO", "ADC", "CAN", "DAC", "EMAC", "I2C", "PWM", "SPI", "SPI Flash", "UART", "N/A"
};
#define FUN_GPIO 2 /* the function number for all GPIOs */
#define GPIO_PIN_SET(b) if (b < 32) GPIO.out_w1ts = BIT(b); else GPIO.out1_w1ts.val = BIT(b-32)
@ -530,7 +529,6 @@ const char* gpio_get_pin_usage_str(gpio_t pin)
return _gpio_pin_usage_str[_gpio_pin_usage[((pin < GPIO_PIN_NUMOF) ? pin : _NOT_EXIST)]];
}
void gpio_pullup_dis (gpio_t pin)
{
CHECK_PARAM(pin < GPIO_PIN_NUMOF);

2
cpu/esp32/periph/timer.c
View File

@ -142,7 +142,6 @@ static const struct hw_timer_hw_t timers_hw[HW_TIMER_NUMOF] =
}
};
/** Latches the current counter value and return only the low part */
static inline uint32_t timer_get_counter_lo(tim_t dev)
{
@ -566,7 +565,6 @@ void IRAM timer_stop(tim_t dev)
irq_restore (state);
}
static void IRAM __timer_channel_start (struct hw_timer_t* timer, struct hw_channel_t* channel)
{
if (!timer->started || !channel->used) {

1
cpu/esp8266/periph/adc.c
View File

@ -41,7 +41,6 @@ int adc_init(adc_t line)
return 0;
}
int32_t adc_sample(adc_t line, adc_res_t res)
{
CHECK_PARAM_RET (line < ADC_NUMOF, -1)

2
cpu/esp8266/periph/timer.c
View File

@ -244,7 +244,6 @@ void IRAM timer_stop(tim_t dev)
irq_restore (state);
}
static void IRAM __timer_channel_start (struct hw_timer_t* timer, struct hw_channel_t* channel)
{
if (!timer->started || !channel->used) {
@ -506,7 +505,6 @@ void IRAM timer_stop(tim_t dev)
irq_restore (state);
}
static void IRAM __timer_channel_start (struct phy_timer_t* timer, struct phy_channel_t* channel)
{
if (!timer->started || !channel->used) {

Some files were not shown because too many files have changed in this diff Show More