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Merge pull request #1494 from fnack/msbiot_reworked

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Initial import of MSB-IoT board
This commit is contained in:
Hauke Petersen 2014-09-02 17:02:44 +02:00
commit 4287188f26
20 changed files with 8408 additions and 7 deletions
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4
boards/msbiot/Makefile Normal file
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# tell the Makefile.base which module to build
MODULE = $(BOARD)_base
include $(RIOTBASE)/Makefile.base

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boards/msbiot/Makefile.include Normal file
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# define the cpu used by the msb-iot board
export CPU = stm32f4
export CPU_MODEL = stm32f415rg
#define the default port depending on the host OS
OS := $(shell uname)
ifeq ($(OS),Linux)
PORT ?= /dev/ttyUSB0
else ifeq ($(OS),Darwin)
PORT ?= $(shell ls -1 /dev/tty.SLAB_USBtoUART* | head -n 1)
else
$(info CAUTION: No flash tool for your host system found!)
# TODO: add support for windows as host platform
endif
export PORT
# define tools used for building the project
export PREFIX = arm-none-eabi-
export CC = $(PREFIX)gcc
export AR = $(PREFIX)ar
export AS = $(PREFIX)as
export LINK = $(PREFIX)gcc
export SIZE = $(PREFIX)size
export OBJCOPY = $(PREFIX)objcopy
export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm
export FLASHER = st-flash
export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh
export DEBUGSERVER = st-util
# define build specific options
CPU_USAGE = -mcpu=cortex-m4
FPU_USAGE = -mfloat-abi=hard -mfpu=fpv4-sp-d16
export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin
export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian
export LINKFLAGS += -g3 -ggdb -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles
export LINKFLAGS += -T$(LINKERSCRIPT)
export OFLAGS = -O binary
export FFLAGS = write bin/$(BOARD)/$(APPLICATION).hex 0x8000000
export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(BINDIR)/$(APPLICATION).elf
export TERMFLAGS += -p "$(PORT)"
# use newLib nano-specs if available
ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null </dev/null ; echo $$?),0)
export LINKFLAGS += -specs=nano.specs -lc -lnosys
endif
# export board specific includes to the global includes-listing
export INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include

63
boards/msbiot/board.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup board_msbiot
* @{
*
* @file
* @brief Board specific implementations for the MSB-IoT board
*
* @author Fabian Nack <nack@inf.fu-berlin.de>
*
* @}
*/
#include "board.h"
static void leds_init(void);
void board_init(void)
{
/* initialize the CPU */
cpu_init();
/* initialize the boards LEDs */
leds_init();
}
/**
* @brief Initialize the boards standard LEDs (RED, YELLOW, GREEN)
*
* The LED initialization is hard-coded in this function. As the LEDs are soldered
* onto the board they are fixed to their CPU pins.
*
* The LEDs are connected to the following pins:
* - LED RED: PB8
* - LED YELLOW: PB14
* - LED GREEN: PB15
*/
static void leds_init(void)
{
/* enable clock for port GPIOB */
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
/* set output speed to 50MHz */
LED_PORT->OSPEEDR &= ~(0xF0030000);
LED_PORT->OSPEEDR |= 0xA0020000;
/* set output type to push-pull */
LED_PORT->OTYPER &= ~(0x0000C100);
/* configure pins as general outputs */
LED_PORT->MODER &= ~(0xF0030000);
LED_PORT->MODER |= 0x50010000;
/* disable pull resistors */
LED_PORT->PUPDR &= ~(0xF0030000);
/* turn all LEDs off */
LED_PORT->BSRRL = 0xC100;
}

4
boards/msbiot/dist/debug.sh vendored Executable file
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#!/bin/sh
echo "Debugging $1"
arm-none-eabi-gdb -tui -command=$1 $2

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boards/msbiot/dist/gdb.conf vendored Normal file
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tar extended-remote :4242

76
boards/msbiot/include/board.h Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @defgroup board_msbiot MSB-IoT
* @ingroup boards
* @brief Board specific files for the MSB-IoT board
* @{
*
* @file
* @brief Board specific definitions for the MSB-IoT board
*
* @author Fabian Nack <nack@inf.fu-berlin.de>
*/
#ifndef __BOARD_H
#define __BOARD_H
#include "cpu.h"
#include "periph_conf.h"
/**
* Define the nominal CPU core clock in this board
*/
#define F_CPU CLOCK_CORECLOCK
/**
* @name Assign the hardware timer
*/
#define HW_TIMER TIMER_0
/**
* @name Define UART device and baudrate for stdio
* @{
*/
#define STDIO UART_0
#define STDIO_BAUDRATE (115200U)
/** @} */
/**
* @name LED pin definitions
* @{
*/
#define LED_PORT GPIOB
#define LED_RED_PIN (1 << 8)
#define LED_YELLOW_PIN (1 << 14)
#define LED_GREEN_PIN (1 << 15)
/** @} */
/**
* @name Macros for controlling the on-board LEDs.
* @{
*/
#define LED_RED_ON (LED_PORT->BSRRH = LED_RED_PIN)
#define LED_RED_OFF (LED_PORT->BSRRL = LED_RED_PIN)
#define LED_RED_TOGGLE (LED_PORT->ODR ^= LED_RED_PIN)
#define LED_YELLOW_ON (LED_PORT->BSRRH = LED_YELLOW_PIN)
#define LED_YELLOW_OFF (LED_PORT->BSRRL = LED_YELLOW_PIN)
#define LED_YELLOW_TOGGLE (LED_PORT->ODR ^= LED_YELLOW_PIN)
#define LED_GREEN_ON (LED_PORT->BSRRH = LED_GREEN_PIN)
#define LED_GREEN_OFF (LED_PORT->BSRRL = LED_GREEN_PIN)
#define LED_GREEN_TOGGLE (LED_PORT->ODR ^= LED_GREEN_PIN)
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#endif /** __BOARD_H */
/** @} */

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boards/msbiot/include/periph_conf.h Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup board_msbiot
* @{
*
* @file
* @name Peripheral MCU configuration for the MSB-IoT board
*
* @author Fabian Nack <nack@inf.fu-berlin.de>
*/
#ifndef __PERIPH_CONF_H
#define __PERIPH_CONF_H
/**
* @name Clock system configuration
* @{
*/
#define CLOCK_HSE (16000000U) /* external oscillator */
#define CLOCK_CORECLOCK (168000000U) /* desired core clock frequency */
/* the actual PLL values are automatically generated */
#define CLOCK_PLL_M (CLOCK_HSE / 1000000)
#define CLOCK_PLL_N ((CLOCK_CORECLOCK / 1000000) * 2)
#define CLOCK_PLL_P (2U)
#define CLOCK_PLL_Q (CLOCK_PLL_N / 48)
#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2
#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4
#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
/** @} */
/**
* @name Timer configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_PRESCALER (83U)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
/* Timer 1 configuration */
#define TIMER_1_DEV TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_PRESCALER (83U)
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
#define TIMER_1_ISR isr_tim5
#define TIMER_1_IRQ_CHAN TIM5_IRQn
/** @} */
/**
* @name UART configuration
* @{
*/
#define UART_NUMOF (3U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_2_EN 1
#define UART_IRQ_PRIO 1
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
#define UART_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_USART2EN))
#define UART_0_CLK (42000000) /* UART clock runs with 42MHz (F_CPU / 4) */
#define UART_0_IRQ_CHAN USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define UART_0_PORT GPIOA
#define UART_0_TX_PIN 2
#define UART_0_RX_PIN 3
#define UART_0_AF 7
/* UART 1 device configuration */
#define UART_1_DEV USART1
#define UART_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART1EN)
#define UART_1_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))
#define UART_1_CLK (84000000) /* UART clock runs with 84MHz (F_CPU / 2) */
#define UART_1_IRQ_CHAN USART1_IRQn
#define UART_1_ISR isr_usart1
/* UART 1 pin configuration */
#define UART_1_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define UART_1_PORT GPIOA
#define UART_1_TX_PIN 9
#define UART_1_RX_PIN 10
#define UART_1_AF 7
/* UART 2 device configuration */
#define UART_2_DEV USART3
#define UART_2_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART3EN)
#define UART_2_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))
#define UART_2_CLK (42000000) /* UART clock runs with 42MHz (F_CPU / 4) */
#define UART_2_IRQ_CHAN USART3_IRQn
#define UART_2_ISR isr_usart3
/* UART 2 pin configuration */
#define UART_2_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
#define UART_2_PORT GPIOD
#define UART_2_TX_PIN 8
#define UART_2_RX_PIN 9
#define UART_2_AF 7
/** @} */
/**
* @name GPIO configuration
* @{
*/
#define GPIO_NUMOF 16
#define GPIO_0_EN 1
#define GPIO_1_EN 1
#define GPIO_2_EN 1
#define GPIO_3_EN 1
#define GPIO_4_EN 1
#define GPIO_5_EN 1
#define GPIO_6_EN 1
#define GPIO_7_EN 1
#define GPIO_8_EN 1
#define GPIO_9_EN 1
#define GPIO_10_EN 1
#define GPIO_11_EN 1
#define GPIO_12_EN 1
#define GPIO_13_EN 1
#define GPIO_14_EN 1
#define GPIO_15_EN 1
#define GPIO_IRQ_PRIO 1
/* IRQ config */
#define GPIO_IRQ_0 GPIO_0 /* alternatively GPIO_4 or GPIO_9 could be used here */
#define GPIO_IRQ_1 GPIO_1 /* alternatively GPIO_10 could be used here */
#define GPIO_IRQ_2 GPIO_15
#define GPIO_IRQ_3 -1/* not configured */
#define GPIO_IRQ_4 GPIO_2 /* alternatively GPIO_11 could be used here */
#define GPIO_IRQ_5 GPIO_12
#define GPIO_IRQ_6 -1/* not configured */
#define GPIO_IRQ_7 -1/* not configured */
#define GPIO_IRQ_8 GPIO_13
#define GPIO_IRQ_9 GPIO_5
#define GPIO_IRQ_10 GPIO_3
#define GPIO_IRQ_11 GPIO_6
#define GPIO_IRQ_12 GPIO_7
#define GPIO_IRQ_13 GPIO_8 /* alternatively GPIO_14 could be used here */
#define GPIO_IRQ_14 -1/* not configured */
#define GPIO_IRQ_15 -1/* not configured */
/* GPIO channel 0 config */
#define GPIO_0_PORT GPIOA /* User Button 2 */
#define GPIO_0_PIN 0
#define GPIO_0_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_0_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PA)
#define GPIO_0_IRQ EXTI0_IRQn
/* GPIO channel 1 config */
#define GPIO_1_PORT GPIOA
#define GPIO_1_PIN 1
#define GPIO_1_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_1_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI1_PA)
#define GPIO_1_IRQ EXTI1_IRQn
/* GPIO channel 2 config */
#define GPIO_2_PORT GPIOA
#define GPIO_2_PIN 4
#define GPIO_2_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_2_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI4_PA)
#define GPIO_2_IRQ EXTI4_IRQn
/* GPIO channel 3 config */
#define GPIO_3_PORT GPIOA /* CC3000 SPI_IRQ */
#define GPIO_3_PIN 10
#define GPIO_3_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
#define GPIO_3_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI10_PA)
#define GPIO_3_IRQ EXTI15_10_IRQn
/* GPIO channel 4 config */
#define GPIO_4_PORT GPIOB
#define GPIO_4_PIN 0
#define GPIO_4_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_4_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PB)
#define GPIO_4_IRQ EXTI0_IRQn
/* GPIO channel 5 config */
#define GPIO_5_PORT GPIOB /* BEEPER Input */
#define GPIO_5_PIN 9
#define GPIO_5_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_5_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI9_PB)
#define GPIO_5_IRQ EXTI9_5_IRQn
/* GPIO channel 6 config */
#define GPIO_6_PORT GPIOB /* IMU-9150 INT */
#define GPIO_6_PIN 11
#define GPIO_6_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_6_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI11_PB)
#define GPIO_6_IRQ EXTI15_10_IRQn
/* GPIO channel 7 config */
#define GPIO_7_PORT GPIOB /* CC1101 CS */
#define GPIO_7_PIN 12
#define GPIO_7_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_7_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI12_PB)
#define GPIO_7_IRQ EXTI15_10_IRQn
/* GPIO channel 8 config */
#define GPIO_8_PORT GPIOB /* User Button 1 */
#define GPIO_8_PIN 13
#define GPIO_8_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define GPIO_8_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI13_PB)
#define GPIO_8_IRQ EXTI15_10_IRQn
/* GPIO channel 9 config */
#define GPIO_9_PORT GPIOC /* TCA6416 Reset */
#define GPIO_9_PIN 0
#define GPIO_9_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_9_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PC)
#define GPIO_9_IRQ EXTI0_IRQn
/* GPIO channel 10 config */
#define GPIO_10_PORT GPIOC /* CC3000 CS */
#define GPIO_10_PIN 1
#define GPIO_10_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_10_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI1_PC)
#define GPIO_10_IRQ EXTI1_IRQn
/* GPIO channel 11 config */
#define GPIO_11_PORT GPIOC /* CC1101 GDO 0 */
#define GPIO_11_PIN 4
#define GPIO_11_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_11_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI4_PC)
#define GPIO_11_IRQ EXTI4_IRQn
/* GPIO channel 12 config */
#define GPIO_12_PORT GPIOC /* CC1101 GDO 2 */
#define GPIO_12_PIN 5
#define GPIO_12_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_12_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI5_PC)
#define GPIO_12_IRQ EXTI9_5_IRQn
/* GPIO channel 13 config */
#define GPIO_13_PORT GPIOC /* TCA6416 INT */
#define GPIO_13_PIN 8
#define GPIO_13_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_13_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI8_PC)
#define GPIO_13_IRQ EXTI9_5_IRQn
/* GPIO channel 14 config */
#define GPIO_14_PORT GPIOC /* CC3000 VBAT_SW_EN */
#define GPIO_14_PIN 13
#define GPIO_14_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
#define GPIO_14_EXTI_CFG() (SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI13_PC)
#define GPIO_14_IRQ EXTI15_10_IRQn
/* GPIO channel 15 config */
#define GPIO_15_PORT GPIOD /* Micro SD Sockel CS */
#define GPIO_15_PIN 2
#define GPIO_15_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
#define GPIO_15_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI2_PD)
#define GPIO_15_IRQ EXTI2_IRQn
/** @} */
#endif /* __PERIPH_CONF_H */
/** @} */

2
cpu/stm32f4/include/cpu-conf.h
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@ -23,6 +23,8 @@
#ifdef CPU_MODEL_STM32F407VG
#include "stm32f407xx.h"
#elif defined CPU_MODEL_STM32F415RG
#include "stm32f415xx.h"
#endif
/**

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cpu/stm32f4/include/stm32f415xx.h Normal file
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193
cpu/stm32f4/periph/gpio.c
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@ -14,6 +14,7 @@
* @brief Low-level GPIO driver implementation
*
* @author Hauke Petersen <mail@haukepetersen.de>
* @author Fabian Nack <nack@inf.fu-berlin.de>
*
* @}
*/
@ -133,6 +134,34 @@ int gpio_init_out(gpio_t dev, gpio_pp_t pullup)
port = GPIO_11_PORT;
pin = GPIO_11_PIN;
break;
#endif
#if GPIO_12_EN
case GPIO_12:
GPIO_12_CLKEN();
port = GPIO_12_PORT;
pin = GPIO_12_PIN;
break;
#endif
#if GPIO_13_EN
case GPIO_13:
GPIO_13_CLKEN();
port = GPIO_13_PORT;
pin = GPIO_13_PIN;
break;
#endif
#if GPIO_14_EN
case GPIO_14:
GPIO_14_CLKEN();
port = GPIO_14_PORT;
pin = GPIO_14_PIN;
break;
#endif
#if GPIO_15_EN
case GPIO_15:
GPIO_15_CLKEN();
port = GPIO_15_PORT;
pin = GPIO_15_PIN;
break;
#endif
}
@ -236,6 +265,34 @@ int gpio_init_in(gpio_t dev, gpio_pp_t pullup)
port = GPIO_11_PORT;
pin = GPIO_11_PIN;
break;
#endif
#if GPIO_12_EN
case GPIO_12:
GPIO_12_CLKEN();
port = GPIO_12_PORT;
pin = GPIO_12_PIN;
break;
#endif
#if GPIO_13_EN
case GPIO_13:
GPIO_13_CLKEN();
port = GPIO_13_PORT;
pin = GPIO_13_PIN;
break;
#endif
#if GPIO_14_EN
case GPIO_14:
GPIO_14_CLKEN();
port = GPIO_14_PORT;
pin = GPIO_14_PIN;
break;
#endif
#if GPIO_15_EN
case GPIO_15:
GPIO_15_CLKEN();
port = GPIO_15_PORT;
pin = GPIO_15_PIN;
break;
#endif
}
@ -355,6 +412,38 @@ int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, gpio_cb_t cb
NVIC_SetPriority(GPIO_11_IRQ, GPIO_IRQ_PRIO);
NVIC_EnableIRQ(GPIO_11_IRQ);
break;
#endif
#if GPIO_12_EN
case GPIO_12:
pin = GPIO_12_PIN;
GPIO_12_EXTI_CFG();
NVIC_SetPriority(GPIO_12_IRQ, GPIO_IRQ_PRIO);
NVIC_EnableIRQ(GPIO_12_IRQ);
break;
#endif
#if GPIO_13_EN
case GPIO_13:
pin = GPIO_13_PIN;
GPIO_13_EXTI_CFG();
NVIC_SetPriority(GPIO_13_IRQ, GPIO_IRQ_PRIO);
NVIC_EnableIRQ(GPIO_13_IRQ);
break;
#endif
#if GPIO_14_EN
case GPIO_14:
pin = GPIO_14_PIN;
GPIO_14_EXTI_CFG();
NVIC_SetPriority(GPIO_14_IRQ, GPIO_IRQ_PRIO);
NVIC_EnableIRQ(GPIO_14_IRQ);
break;
#endif
#if GPIO_15_EN
case GPIO_15:
pin = GPIO_15_PIN;
GPIO_15_EXTI_CFG();
NVIC_SetPriority(GPIO_15_IRQ, GPIO_IRQ_PRIO);
NVIC_EnableIRQ(GPIO_15_IRQ);
break;
#endif
}
@ -448,6 +537,26 @@ void gpio_irq_enable(gpio_t dev)
case GPIO_11:
EXTI->IMR |= (1 << GPIO_11_PIN);
break;
#endif
#if GPIO_12_EN
case GPIO_12:
EXTI->IMR |= (1 << GPIO_12_PIN);
break;
#endif
#if GPIO_13_EN
case GPIO_13:
EXTI->IMR |= (1 << GPIO_13_PIN);
break;
#endif
#if GPIO_14_EN
case GPIO_14:
EXTI->IMR |= (1 << GPIO_14_PIN);
break;
#endif
#if GPIO_15_EN
case GPIO_15:
EXTI->IMR |= (1 << GPIO_15_PIN);
break;
#endif
}
}
@ -514,6 +623,26 @@ void gpio_irq_disable(gpio_t dev)
case GPIO_11:
EXTI->IMR &= ~(1 << GPIO_11_PIN);
break;
#endif
#if GPIO_12_EN
case GPIO_12:
EXTI->IMR &= ~(1 << GPIO_12_PIN);
break;
#endif
#if GPIO_13_EN
case GPIO_13:
EXTI->IMR &= ~(1 << GPIO_13_PIN);
break;
#endif
#if GPIO_14_EN
case GPIO_14:
EXTI->IMR &= ~(1 << GPIO_14_PIN);
break;
#endif
#if GPIO_15_EN
case GPIO_15:
EXTI->IMR &= ~(1 << GPIO_15_PIN);
break;
#endif
}
}
@ -595,6 +724,30 @@ int gpio_read(gpio_t dev)
port = GPIO_11_PORT;
pin = GPIO_11_PIN;
break;
#endif
#if GPIO_12_EN
case GPIO_12:
port = GPIO_12_PORT;
pin = GPIO_12_PIN;
break;
#endif
#if GPIO_13_EN
case GPIO_13:
port = GPIO_13_PORT;
pin = GPIO_13_PIN;
break;
#endif
#if GPIO_14_EN
case GPIO_14:
port = GPIO_14_PORT;
pin = GPIO_14_PIN;
break;
#endif
#if GPIO_15_EN
case GPIO_15:
port = GPIO_15_PORT;
pin = GPIO_15_PIN;
break;
#endif
}
@ -667,6 +820,26 @@ void gpio_set(gpio_t dev)
case GPIO_11:
GPIO_11_PORT->ODR |= (1 << GPIO_11_PIN);
break;
#endif
#if GPIO_12_EN
case GPIO_12:
GPIO_12_PORT->ODR |= (1 << GPIO_12_PIN);
break;
#endif
#if GPIO_13_EN
case GPIO_13:
GPIO_13_PORT->ODR |= (1 << GPIO_13_PIN);
break;
#endif
#if GPIO_14_EN
case GPIO_14:
GPIO_14_PORT->ODR |= (1 << GPIO_14_PIN);
break;
#endif
#if GPIO_15_EN
case GPIO_15:
GPIO_15_PORT->ODR |= (1 << GPIO_15_PIN);
break;
#endif
}
}
@ -733,6 +906,26 @@ void gpio_clear(gpio_t dev)
case GPIO_11:
GPIO_11_PORT->ODR &= ~(1 << GPIO_11_PIN);
break;
#endif
#if GPIO_12_EN
case GPIO_12:
GPIO_12_PORT->ODR &= ~(1 << GPIO_12_PIN);
break;
#endif
#if GPIO_13_EN
case GPIO_13:
GPIO_13_PORT->ODR &= ~(1 << GPIO_13_PIN);
break;
#endif
#if GPIO_14_EN
case GPIO_14:
GPIO_14_PORT->ODR &= ~(1 << GPIO_14_PIN);
break;
#endif
#if GPIO_15_EN
case GPIO_15:
GPIO_15_PORT->ODR &= ~(1 << GPIO_15_PIN);
break;
#endif
}
}

63
cpu/stm32f4/periph/uart.c
View File

@ -14,6 +14,7 @@
* @brief Low-level UART driver implementation
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Fabian Nack <nack@inf.fu-berlin.de>
*
* @}
*/
@ -77,6 +78,13 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t t
NVIC_EnableIRQ(UART_1_IRQ_CHAN);
UART_1_DEV->CR1 |= USART_CR1_RXNEIE;
break;
#endif
#if UART_2_EN
case UART_2:
NVIC_SetPriority(UART_2_IRQ_CHAN, UART_IRQ_PRIO);
NVIC_EnableIRQ(UART_2_IRQ_CHAN);
UART_2_DEV->CR1 |= USART_CR1_RXNEIE;
break;
#endif
}
@ -119,9 +127,25 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_1_CLKEN();
UART_1_PORT_CLKEN();
break;
#endif
#if UART_2_EN
case UART_2:
dev = UART_2_DEV;
port = UART_2_PORT;
clk = UART_2_CLK;
tx_pin = UART_2_TX_PIN;
rx_pin = UART_2_RX_PIN;
af = UART_2_AF;
UART_2_CLKEN();
UART_2_PORT_CLKEN();
break;
#endif
}
/* configure pp mode with no pull for RX and TX pins */
port->OTYPER &= ~(1 << rx_pin | 1 << tx_pin);
port->PUPDR &= ~(3 << (rx_pin * 2) | 3 << (tx_pin * 2));
/* configure RX and TX pins, set pin to use alternative function mode */
port->MODER &= ~(3 << (rx_pin * 2) | 3 << (tx_pin * 2));
port->MODER |= 2 << (rx_pin * 2) | 2 << (tx_pin * 2);
@ -169,6 +193,11 @@ void uart_tx_begin(uart_t uart)
case UART_1:
UART_1_DEV->CR1 |= USART_CR1_TXEIE;
break;
#endif
#if UART_2_EN
case UART_2:
UART_2_DEV->CR1 |= USART_CR1_TXEIE;
break;
#endif
}
}
@ -187,6 +216,11 @@ int uart_write(uart_t uart, char data)
case UART_1:
dev = UART_1_DEV;
break;
#endif
#if UART_2_EN
case UART_2:
dev = UART_2_DEV;
break;
#endif
}
@ -211,6 +245,11 @@ int uart_read_blocking(uart_t uart, char *data)
case UART_1:
dev = UART_1_DEV;
break;
#endif
#if UART_2_EN
case UART_2:
dev = UART_2_DEV;
break;
#endif
}
@ -234,6 +273,11 @@ int uart_write_blocking(uart_t uart, char data)
case UART_1:
dev = UART_1_DEV;
break;
#endif
#if UART_2_EN
case UART_2:
dev = UART_2_DEV;
break;
#endif
}
@ -255,6 +299,11 @@ void uart_poweron(uart_t uart)
case UART_1:
UART_1_CLKEN();
break;
#endif
#if UART_2_EN
case UART_2:
UART_2_CLKEN();
break;
#endif
}
}
@ -271,6 +320,11 @@ void uart_poweroff(uart_t uart)
case UART_1:
UART_1_CLKDIS();
break;
#endif
#if UART_2_EN
case UART_2:
UART_2_CLKDIS();
break;
#endif
}
}
@ -293,6 +347,15 @@ __attribute__((naked)) void UART_1_ISR(void)
}
#endif
#if UART_2_EN
__attribute__((naked)) void UART_2_ISR(void)
{
ISR_ENTER();
irq_handler(UART_2, UART_2_DEV);
ISR_EXIT();
}
#endif
static inline void irq_handler(uint8_t uartnum, USART_TypeDef *dev)
{
if (dev->SR & USART_SR_RXNE) {

144
cpu/stm32f4/stm32f415rg_linkerscript.ld Normal file
View File

@ -0,0 +1,144 @@
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K
}
/* The stack size used by the application. NOTE: you need to adjust */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x2000 ;
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > rom
PROVIDE_HIDDEN (__exidx_end = .);
. = ALIGN(4);
_etext = .;
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
. = ALIGN(4);
_end = . ;
}

1
dist/tools/licenses/patterns/3c-BSD-stm vendored Normal file
View File

@ -0,0 +1 @@
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1\. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer\. 2\. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and or other materials provided with the distribution\. 3\. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission\. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED\. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES \(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION\) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \(INCLUDING NEGLIGENCE OR OTHERWISE\) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE\.

4
examples/ccn-lite-client/Makefile
View File

@ -29,7 +29,8 @@ QUIET ?= 1
BOARD_INSUFFICIENT_RAM := chronos msb-430h telosb wsn430-v1_3b wsn430-v1_4 z1 redbee-econotag
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
stm32f0discovery stm32f3discovery stm32f4discovery pca10000 pca10005 arduino-mega2560
stm32f0discovery stm32f3discovery stm32f4discovery pca10000 pca10005 arduino-mega2560 \
msbiot
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# pttu: see https://github.com/RIOT-OS/RIOT/issues/659
@ -40,6 +41,7 @@ BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
# arduino-mega2560: no transceiver, yet
# msbiot: no transceiver, yet
# Modules to include:

3
examples/ccn-lite-relay/Makefile
View File

@ -30,7 +30,7 @@ QUIET ?= 1
BOARD_INSUFFICIENT_RAM := chronos msb-430h telosb wsn430-v1_3b wsn430-v1_4 z1 redbee-econotag
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
stm32f0discovery stm32f3discovery stm32f4discovery \
pca10000 pca10005 arduino-mega2560
pca10000 pca10005 arduino-mega2560 msbiot
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# pttu: see https://github.com/RIOT-OS/RIOT/issues/659
@ -40,6 +40,7 @@ BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
# stm32f4discovery: no transceiver, yet
# pca10000/5: no transceiver, yet
# arduino-mega2560: no transceiver, yet
# msbiot: no transceiver, yet
# Modules to include:

4
examples/riot_and_cpp/Makefile
View File

@ -30,7 +30,8 @@ QUIET ?= 1
# Blacklist boards
BOARD_BLACKLIST := arduino-due avsextrem chronos mbed_lpc1768 msb-430h msba2 redbee-econotag \
telosb wsn430-v1_3b wsn430-v1_4 msb-430 pttu udoo qemu-i386 z1 stm32f0discovery \
stm32f3discovery stm32f4discovery pca10000 pca10005 iot-lab_M3 arduino-mega2560
stm32f3discovery stm32f4discovery pca10000 pca10005 iot-lab_M3 arduino-mega2560 \
msbiot
# This example only works with native for now.
# msb430-based boards: msp430-g++ is not provided in mspgcc.
@ -43,6 +44,7 @@ BOARD_BLACKLIST := arduino-due avsextrem chronos mbed_lpc1768 msb-430h msba2 red
# pca10005: g++ does not support some used flags (e.g. -mthumb...)
# iot-lab_M3: g++ does not support some used flags (e.g. -mthumb...)
# arduino-mega2560: cstdio header missing from avr-libc
# msbiot g++ does not support some used flags (e.g. -mthumb...)
# others: untested.
# If you want to add some extra flags when compile c++ files, add these flags

4
examples/rpl_udp/Makefile
View File

@ -36,7 +36,8 @@ endif
BOARD_INSUFFICIENT_RAM := chronos msb-430h redbee-econotag telosb wsn430-v1_3b wsn430-v1_4 z1
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 stm32f0discovery \
stm32f3discovery stm32f4discovery pca10000 pca10005 arduino-mega2560
stm32f3discovery stm32f4discovery pca10000 pca10005 arduino-mega2560 \
msbiot
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# pttu: see https://github.com/RIOT-OS/RIOT/issues/659
@ -47,6 +48,7 @@ BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 stm32f0d
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
# arduino-mega2560: time.h missing from avr-libc
# msbiot: no transceiver, yet
# Modules to include:

2
tests/coap/Makefile
View File

@ -3,7 +3,7 @@ include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-due chronos mbed_lpc1768 msb-430 msb-430h qemu-i386 stm32f0discovery \
stm32f3discovery stm32f4discovery telosb wsn430-v1_3b wsn430-v1_4 udoo z1 \
pca10000 pca10005 arduino-mega2560
pca10000 pca10005 arduino-mega2560 msbiot
#arduino-mega2560: missing header sys/types.h
BOARD_INSUFFICIENT_RAM := redbee-econotag

3
tests/net_if/Makefile
View File

@ -1,13 +1,14 @@
APPLICATION = net_if
BOARD_BLACKLIST = mbed_lpc1768 arduino-due udoo qemu-i386 stm32f0discovery stm32f3discovery \
stm32f4discovery pca10000 pca10005 arduino-mega2560
stm32f4discovery pca10000 pca10005 arduino-mega2560 msbiot
# qemu-i386: no transceiver, yet
# stm32f0discovery: no transceiver, yet
# stm32f3discovery: no transceiver, yet
# stm32f4discovery: no transceiver, yet
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
# msbiot: no transceiver, yet
include ../Makefile.tests_common
ifeq ($(BOARD),stm32f4discovery)

4
tests/pnet/Makefile
View File

@ -3,7 +3,8 @@ include ../Makefile.tests_common
BOARD_INSUFFICIENT_RAM := chronos msb-430h redbee-econotag telosb wsn430-v1_3b wsn430-v1_4 z1
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 udoo qemu-i386 stm32f0discovery \
stm32f3discovery stm32f4discovery pca10000 pca10005 arduino-mega2560
stm32f3discovery stm32f4discovery pca10000 pca10005 arduino-mega2560 \
msbiot
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# qemu-i386: no transceiver, yet
@ -13,6 +14,7 @@ BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 udoo qemu-i386 stm32f0discov
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
# arduino-mega2560: unknown type name ‘radio_packet_length_t’
# msbiot: no transceiver, yet
USEMODULE += posix
USEMODULE += pnet