RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

drivers/usbdev_synopsys_dwc2: fix settings for STM32

Browse Source 
The existence of the macros USB_OTG_GUSBCFG_ULPI_UTMI_SEL, USB_OTG_GUSBCFG_PHYIF and USB_OTG_GUSBCFG_DDRSEL depends on a specific STM32 line and not on STM32 itself. Therefore, the settings are made when the macros are defined.
This commit is contained in:
Gunar Schorcht 2022-10-09 13:14:29 +02:00
parent 78e24541e6
commit 41e25c53a3
1 changed files with 11 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
drivers/usbdev_synopsys_dwc2/usbdev_synopsys_dwc2.c
View File

@ -730,16 +730,18 @@ static void _usbdev_init(usbdev_t *dev)
/* enable ULPI clock */
periph_clk_en(conf->ahb, RCC_AHB1ENR_OTGHSULPIEN);
#if !defined(MCU_STM32)
/* TODO following settings are required for DWC2 HS but are not
* defined for STM32 MCUs where these settings correspond to the
* reset value of the GUSBCFG register */
#ifdef USB_OTG_GUSBCFG_ULPI_UTMI_SEL
/* select ULPI PHY */
_global_regs(usbdev->config)->GUSBCFG |= USB_OTG_GUSBCFG_ULPI_UTMI_SEL
/* use the 8-bit interface and single data rate */
_global_regs(usbdev->config)->GUSBCFG &= ~(USB_OTG_GUSBCFG_PHYIF16 |
USB_OTG_GUSBCFG_DDRSEL);
#endif /* !defined(MCU_STM32) */
_global_regs(usbdev->config)->GUSBCFG |= USB_OTG_GUSBCFG_ULPI_UTMI_SEL;
#endif
#ifdef USB_OTG_GUSBCFG_PHYIF
/* use the 8-bit interface */
_global_regs(usbdev->config)->GUSBCFG &= ~USB_OTG_GUSBCFG_PHYIF;
#endif /* USB_OTG_GUSBCFG_PHYIF */
#ifdef USB_OTG_GUSBCFG_DDRSEL
/* use single data rate */
_global_regs(usbdev->config)->GUSBCFG &= ~USB_OTG_GUSBCFG_DDRSEL;
#endif /* USB_OTG_GUSBCFG_DDRSEL */
/* disable the on-chip FS transceiver */
_global_regs(usbdev->config)->GUSBCFG &= ~USB_OTG_GUSBCFG_PHYSEL;