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cpu/stm32f1: fix i2c master read for N>2 bytes

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This fixes reading more than 2 bytes from the slave device.
In the current implementation the last byte was not read from
data register and the termination sequence buggy.
This commit is contained in:
Thomas Eichinger 2014-10-24 14:08:27 +02:00
parent d17b7730f5
commit 414be5257d
1 changed files with 9 additions and 4 deletions
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13
cpu/stm32f1/periph/i2c.c
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@ -192,9 +192,9 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
_start(i2c, address, I2C_FLAG_READ);
_clear_addr(i2c);
while (i < (length - 2)) {
while (i < (length - 3)) {
DEBUG("Wait until byte was received\n");
while (!(i2c->SR1 & I2C_SR1_BTF));
while (!(i2c->SR1 & I2C_SR1_RXNE));
DEBUG("Copy byte from DR\n");
data[i++] = (char)i2c->DR;
}
@ -205,12 +205,17 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
DEBUG("Disable ACK\n");
i2c->CR1 &= ~(I2C_CR1_ACK);
DEBUG("Crit block: set STOP and read second last byte\n");
DEBUG("Crit block: set STOP and read N-2 byte\n");
state = disableIRQ();
i2c->CR1 |= (I2C_CR1_STOP);
data[i++] = (char)i2c->DR;
i2c->CR1 |= (I2C_CR1_STOP);
restoreIRQ(state);
DEBUG("Read N-1 byte\n")
data[i++] = (char)i2c->DR;
while (!(i2c->SR1 & I2C_SR1_RXNE));
DEBUG("Read last byte\n");
data[i++] = (char)i2c->DR;
DEBUG("wait for STOP bit to be cleared again\n");