From 407deabc0fdb940c945b160716a3ba673cc940f4 Mon Sep 17 00:00:00 2001 From: Marian Buschsieweke Date: Thu, 30 Nov 2023 09:44:18 +0100 Subject: [PATCH] boards/olimex-msp430-h1611: uart_stdio @ 9600 Bd --- boards/olimex-msp430-h1611/Makefile.include | 7 +++++++ boards/olimex-msp430-h1611/include/periph_conf.h | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/boards/olimex-msp430-h1611/Makefile.include b/boards/olimex-msp430-h1611/Makefile.include index e2fb1150be..5ff28b6928 100644 --- a/boards/olimex-msp430-h1611/Makefile.include +++ b/boards/olimex-msp430-h1611/Makefile.include @@ -1,3 +1,9 @@ +# UART @ 115200 Bd is not reliable with a CPU clock of ~ 5 MHz, occasionally +# chars get lost. Adding an 8 MHz crystal or an external resistor so that the +# DCO can reach 8 MHz does yield the speed bump needed for a more reliable +# UART connection @ 115200 Bd +BAUD ?= 9600 + # When freshly plugged in the Olimex MSP430-JTAG-Tiny debugger provides a # ttyACM interface, which is only available until the first flashing. A # `make term` or even a `make flash term` may pick the JTAG debugger instead @@ -16,3 +22,4 @@ TTY_SELECT_CMD := $(RIOTTOOLS)/usb-serial/ttys.py \ --format path serial include $(RIOTBOARD)/common/msp430/Makefile.include +CFLAGS += -DSTDIO_UART_BAUDRATE=$(BAUD) diff --git a/boards/olimex-msp430-h1611/include/periph_conf.h b/boards/olimex-msp430-h1611/include/periph_conf.h index aaf928c29a..46875eac80 100644 --- a/boards/olimex-msp430-h1611/include/periph_conf.h +++ b/boards/olimex-msp430-h1611/include/periph_conf.h @@ -35,6 +35,10 @@ extern "C" { * @brief Clock configuration */ static const msp430_clock_params_t clock_params = { + /* Without an external resistor, the DCO frequency typically tops out + * at something like 5 MHz. However, the DCO calibration just picks the + * closet possible value, in this case it will go for the highest frequency + * the silicon at hand can run at. */ .target_dco_frequency = MHZ(8), .lfxt1_frequency = 32768, .main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,