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https://github.com/RIOT-OS/RIOT.git
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drivers: 64 bit compatibility
Fixed compilation errors for pointer casting.
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parent
394cd0e3a8
commit
3feb1a369b
@ -35,7 +35,7 @@
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#define MTD_FLASHPAGE_END_ADDR ((uint32_t) CPU_FLASH_BASE + (FLASHPAGE_NUMOF * FLASHPAGE_SIZE))
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#define MTD_FLASHPAGE_END_ADDR ((uintptr_t) CPU_FLASH_BASE + (FLASHPAGE_NUMOF * FLASHPAGE_SIZE))
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static int _init(mtd_dev_t *dev)
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{
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@ -44,11 +44,14 @@ static int _init(mtd_dev_t *dev)
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assert(dev->pages_per_sector * dev->page_size == FLASHPAGE_SIZE);
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assert(!(super->offset % dev->pages_per_sector));
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assert((int)flashpage_addr(super->offset / dev->pages_per_sector) >= (int)CPU_FLASH_BASE);
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/* Use separate variable to avoid '>= 0 is always true' warning */
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static const uintptr_t cpu_flash_base = CPU_FLASH_BASE;
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assert((uintptr_t)flashpage_addr(super->offset / dev->pages_per_sector) >= cpu_flash_base);
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assert((uintptr_t)flashpage_addr(super->offset / dev->pages_per_sector)
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+ dev->pages_per_sector * dev->page_size * dev->sector_count <= MTD_FLASHPAGE_END_ADDR);
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assert((uintptr_t)flashpage_addr(super->offset / dev->pages_per_sector)
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+ dev->pages_per_sector * dev->page_size * dev->sector_count > CPU_FLASH_BASE);
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+ dev->pages_per_sector * dev->page_size * dev->sector_count > cpu_flash_base);
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return 0;
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}
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@ -65,7 +65,7 @@ struct uart_ctx {
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static void _tx_timer_cb(void *arg, int chan)
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{
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soft_uart_t uart = (soft_uart_t)arg;
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soft_uart_t uart = (soft_uart_t)(uintptr_t)arg;
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const soft_uart_conf_t *cfg = &soft_uart_config[uart];
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struct uart_ctx *ctx = &soft_uart_ctx[uart];
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@ -81,7 +81,7 @@ static void _tx_timer_cb(void *arg, int chan)
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static void _rx_timer_cb(void *arg, int chan)
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{
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soft_uart_t uart = (soft_uart_t)arg;
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soft_uart_t uart = (soft_uart_t)(uintptr_t)arg;
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const soft_uart_conf_t *cfg = &soft_uart_config[uart];
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struct uart_ctx *ctx = &soft_uart_ctx[uart];
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@ -101,7 +101,7 @@ static void _rx_timer_cb(void *arg, int chan)
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static void _rx_gpio_cb(void *arg)
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{
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soft_uart_t uart = (soft_uart_t)arg;
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soft_uart_t uart = (soft_uart_t)(uintptr_t)arg;
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const soft_uart_conf_t *cfg = &soft_uart_config[uart];
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struct uart_ctx *ctx = &soft_uart_ctx[uart];
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@ -166,18 +166,18 @@ int soft_uart_init(soft_uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void
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ctx->state_rx = STATE_RX_IDLE;
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if (gpio_is_valid(cfg->tx_pin)) {
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timer_init(cfg->tx_timer, cfg->timer_freq, _tx_timer_cb, (void *)uart);
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timer_init(cfg->tx_timer, cfg->timer_freq, _tx_timer_cb, (void *)(uintptr_t)uart);
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gpio_write(cfg->tx_pin, !(cfg->flags & SOFT_UART_FLAG_INVERT_TX));
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gpio_init(cfg->tx_pin, GPIO_OUT);
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}
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if (rx_cb) {
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timer_init(cfg->rx_timer, cfg->timer_freq, _rx_timer_cb, (void *)uart);
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timer_init(cfg->rx_timer, cfg->timer_freq, _rx_timer_cb, (void *)(uintptr_t)uart);
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timer_stop(cfg->rx_timer);
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/* timer should fire at the end of the byte */
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timer_set_periodic(cfg->rx_timer, 0, ctx->bit_time * (BITS_DATA(ctx) + BITS_PARITY(ctx) + 1),
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TIM_FLAG_RESET_ON_MATCH | TIM_FLAG_RESET_ON_SET);
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gpio_init_int(cfg->rx_pin, GPIO_IN, GPIO_BOTH, _rx_gpio_cb, (void*) uart);
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gpio_init_int(cfg->rx_pin, GPIO_IN, GPIO_BOTH, _rx_gpio_cb, (void*)(uintptr_t)uart);
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}
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return 0;
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