boards/ublox-c030-u201: use common timer configuration

This also requires to include the STM32 shared include directory

boards/ublox-c030-u201/Makefile.include

@@ -2,6 +2,9 @@
 export CPU = stm32f4
 export CPU_MODEL = stm32f437vg
 
+# we use shared STM32 configuration snippets
+INCLUDES += -I$(RIOTBOARD)/common/stm32/include
+
 # define the default port depending on the host OS
 PORT_LINUX ?= /dev/ttyACM0
 PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))

boards/ublox-c030-u201/include/periph_conf.h

@@ -20,6 +20,7 @@
 #define PERIPH_CONF_H
 
 #include "periph_cpu.h"
+#include "cfg_timer_tim5.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -56,25 +57,6 @@ extern "C" {
 #define CLOCK_PLL_Q          (7)
 /** @} */
 
-/**
- * @name Timer configuration
- * @{
- */
-static const timer_conf_t timer_config[] = {
-    {
-        .dev      = TIM5,
-        .max      = 0xffffffff,
-        .rcc_mask = RCC_APB1ENR_TIM5EN,
-        .bus      = APB1,
-        .irqn     = TIM5_IRQn
-    }
-};
-
-#define TIMER_0_ISR         isr_tim5
-
-#define TIMER_NUMOF         (sizeof(timer_config) / sizeof(timer_config[0]))
-/** @} */
-
 /**
  * @name    UART configuration
  * @{