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drivers/sx127x: uncrustify code

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This commit is contained in:
Alexandre Abadie 2021-03-30 15:06:32 +02:00
parent 680cc67ece
commit 39094d0833
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GPG Key ID: 1C919A403CAE1405
5 changed files with 841 additions and 818 deletions
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120
drivers/include/sx127x.h
View File

@ -86,13 +86,13 @@ extern "C" {
#define SX127X_RX_BUFFER_SIZE (256) /**< RX buffer size */
#define SX127X_RADIO_TX_POWER (14U) /**< Radio power in dBm */
#define SX127X_EVENT_HANDLER_STACK_SIZE (2048U) /**< Stack size event handler */
#define SX127X_IRQ_DIO0 (1<<0) /**< DIO0 IRQ */
#define SX127X_IRQ_DIO1 (1<<1) /**< DIO1 IRQ */
#define SX127X_IRQ_DIO2 (1<<2) /**< DIO2 IRQ */
#define SX127X_IRQ_DIO3 (1<<3) /**< DIO3 IRQ */
#define SX127X_IRQ_DIO4 (1<<4) /**< DIO4 IRQ */
#define SX127X_IRQ_DIO5 (1<<5) /**< DIO5 IRQ */
#define SX127X_EVENT_HANDLER_STACK_SIZE (2048U) /**< Stack size event handler */
#define SX127X_IRQ_DIO0 (1 << 0) /**< DIO0 IRQ */
#define SX127X_IRQ_DIO1 (1 << 1) /**< DIO1 IRQ */
#define SX127X_IRQ_DIO2 (1 << 2) /**< DIO2 IRQ */
#define SX127X_IRQ_DIO3 (1 << 3) /**< DIO3 IRQ */
#define SX127X_IRQ_DIO4 (1 << 4) /**< DIO4 IRQ */
#define SX127X_IRQ_DIO5 (1 << 5) /**< DIO5 IRQ */
/** @} */
/**
@ -112,41 +112,41 @@ extern "C" {
* @brief SX127X initialization result.
*/
enum {
SX127X_INIT_OK = 0, /**< Initialization was successful */
SX127X_ERR_SPI, /**< Failed to initialize SPI bus or CS line */
SX127X_ERR_GPIOS, /**< Failed to initialize GPIOs */
SX127X_ERR_NODEV /**< No valid device version found */
SX127X_INIT_OK = 0, /**< Initialization was successful */
SX127X_ERR_SPI, /**< Failed to initialize SPI bus or CS line */
SX127X_ERR_GPIOS, /**< Failed to initialize GPIOs */
SX127X_ERR_NODEV /**< No valid device version found */
};
/**
* @brief Radio driver supported modems.
*/
enum {
SX127X_MODEM_FSK = 0, /**< FSK modem driver */
SX127X_MODEM_LORA, /**< LoRa modem driver */
SX127X_MODEM_FSK = 0, /**< FSK modem driver */
SX127X_MODEM_LORA, /**< LoRa modem driver */
};
/**
* @brief Radio driver internal state machine states definition.
*/
enum {
SX127X_RF_IDLE = 0, /**< Idle state */
SX127X_RF_RX_RUNNING, /**< Sending state */
SX127X_RF_TX_RUNNING, /**< Receiving state */
SX127X_RF_CAD, /**< Channel activity detection state */
SX127X_RF_IDLE = 0, /**< Idle state */
SX127X_RF_RX_RUNNING, /**< Sending state */
SX127X_RF_TX_RUNNING, /**< Receiving state */
SX127X_RF_CAD, /**< Channel activity detection state */
};
/**
* @brief Event types.
*/
enum {
SX127X_RX_DONE = 0, /**< Receiving complete */
SX127X_TX_DONE, /**< Sending complete*/
SX127X_RX_TIMEOUT, /**< Receiving timeout */
SX127X_TX_TIMEOUT, /**< Sending timeout */
SX127X_RX_ERROR_CRC, /**< Receiving CRC error */
SX127X_FHSS_CHANGE_CHANNEL, /**< Channel change */
SX127X_CAD_DONE, /**< Channel activity detection complete */
SX127X_RX_DONE = 0, /**< Receiving complete */
SX127X_TX_DONE, /**< Sending complete*/
SX127X_RX_TIMEOUT, /**< Receiving timeout */
SX127X_TX_TIMEOUT, /**< Sending timeout */
SX127X_RX_ERROR_CRC, /**< Receiving CRC error */
SX127X_FHSS_CHANGE_CHANNEL, /**< Channel change */
SX127X_CAD_DONE, /**< Channel activity detection complete */
};
/**
@ -157,8 +157,8 @@ enum {
* The power amplifier mode depends on the module hardware configuration.
*/
enum {
SX127X_PA_RFO = 0, /**< RFO HF or RFO LF */
SX127X_PA_BOOST, /**< Power amplifier boost (high power) */
SX127X_PA_RFO = 0, /**< RFO HF or RFO LF */
SX127X_PA_BOOST, /**< Power amplifier boost (high power) */
};
/**
@ -177,25 +177,25 @@ enum {
* @brief LoRa configuration structure.
*/
typedef struct {
uint16_t preamble_len; /**< Length of preamble header */
int8_t power; /**< Signal power */
uint8_t bandwidth; /**< Signal bandwidth */
uint8_t datarate; /**< Spreading factor rate, e.g datarate */
uint8_t coderate; /**< Error coding rate */
uint8_t freq_hop_period; /**< Frequency hop period */
uint8_t flags; /**< Boolean flags */
uint32_t rx_timeout; /**< RX timeout in milliseconds */
uint32_t tx_timeout; /**< TX timeout in milliseconds */
uint16_t preamble_len; /**< Length of preamble header */
int8_t power; /**< Signal power */
uint8_t bandwidth; /**< Signal bandwidth */
uint8_t datarate; /**< Spreading factor rate, e.g datarate */
uint8_t coderate; /**< Error coding rate */
uint8_t freq_hop_period; /**< Frequency hop period */
uint8_t flags; /**< Boolean flags */
uint32_t rx_timeout; /**< RX timeout in milliseconds */
uint32_t tx_timeout; /**< TX timeout in milliseconds */
} sx127x_lora_settings_t;
/**
* @brief Radio settings.
*/
typedef struct {
uint32_t channel; /**< Radio channel */
uint8_t state; /**< Radio state */
uint8_t modem; /**< Driver model (FSK or LoRa) */
sx127x_lora_settings_t lora; /**< LoRa settings */
uint32_t channel; /**< Radio channel */
uint8_t state; /**< Radio state */
uint8_t modem; /**< Driver model (FSK or LoRa) */
sx127x_lora_settings_t lora; /**< LoRa settings */
} sx127x_radio_settings_t;
/**
@ -203,30 +203,30 @@ typedef struct {
*/
typedef struct {
/* Data that will be passed to events handler in application */
ztimer_t tx_timeout_timer; /**< TX operation timeout timer */
ztimer_t rx_timeout_timer; /**< RX operation timeout timer */
uint32_t last_channel; /**< Last channel in frequency hopping sequence */
bool is_last_cad_success; /**< Sign of success of last CAD operation (activity detected) */
ztimer_t tx_timeout_timer; /**< TX operation timeout timer */
ztimer_t rx_timeout_timer; /**< RX operation timeout timer */
uint32_t last_channel; /**< Last channel in frequency hopping sequence */
bool is_last_cad_success; /**< Sign of success of last CAD operation (activity detected) */
} sx127x_internal_t;
/**
* @brief SX127X hardware and global parameters.
*/
typedef struct {
spi_t spi; /**< SPI device */
gpio_t nss_pin; /**< SPI NSS pin */
gpio_t reset_pin; /**< Reset pin */
gpio_t dio0_pin; /**< Interrupt line DIO0 (Tx done) */
gpio_t dio1_pin; /**< Interrupt line DIO1 (Rx timeout) */
gpio_t dio2_pin; /**< Interrupt line DIO2 (FHSS channel change) */
gpio_t dio3_pin; /**< Interrupt line DIO3 (CAD done) */
gpio_t dio4_pin; /**< Interrupt line DIO4 (not used) */
gpio_t dio5_pin; /**< Interrupt line DIO5 (not used) */
spi_t spi; /**< SPI device */
gpio_t nss_pin; /**< SPI NSS pin */
gpio_t reset_pin; /**< Reset pin */
gpio_t dio0_pin; /**< Interrupt line DIO0 (Tx done) */
gpio_t dio1_pin; /**< Interrupt line DIO1 (Rx timeout) */
gpio_t dio2_pin; /**< Interrupt line DIO2 (FHSS channel change) */
gpio_t dio3_pin; /**< Interrupt line DIO3 (CAD done) */
gpio_t dio4_pin; /**< Interrupt line DIO4 (not used) */
gpio_t dio5_pin; /**< Interrupt line DIO5 (not used) */
#if defined(SX127X_USE_TX_SWITCH) || defined(SX127X_USE_RX_SWITCH)
gpio_t rx_switch_pin; /**< Rx antenna switch */
gpio_t tx_switch_pin; /**< Tx antenna switch */
gpio_t rx_switch_pin; /**< Rx antenna switch */
gpio_t tx_switch_pin; /**< Tx antenna switch */
#endif
uint8_t paselect; /**< Power amplifier mode (RFO or PABOOST) */
uint8_t paselect; /**< Power amplifier mode (RFO or PABOOST) */
} sx127x_params_t;
/**
@ -239,11 +239,11 @@ typedef uint8_t sx127x_flags_t;
* @extends netdev_t
*/
typedef struct {
netdev_t netdev; /**< Netdev parent struct */
sx127x_radio_settings_t settings; /**< Radio settings */
sx127x_params_t params; /**< Device driver parameters */
sx127x_internal_t _internal; /**< Internal sx127x data used within the driver */
sx127x_flags_t irq; /**< Device IRQ flags */
netdev_t netdev; /**< Netdev parent struct */
sx127x_radio_settings_t settings; /**< Radio settings */
sx127x_params_t params; /**< Device driver parameters */
sx127x_internal_t _internal; /**< Internal sx127x data used within the driver */
sx127x_flags_t irq; /**< Device IRQ flags */
} sx127x_t;
/**

21
drivers/sx127x/sx127x.c
View File

@ -75,7 +75,8 @@ static void sx127x_on_dio3_isr(void *arg);
void sx127x_setup(sx127x_t *dev, const sx127x_params_t *params, uint8_t index)
{
netdev_t *netdev = (netdev_t*) dev;
netdev_t *netdev = (netdev_t *)dev;
netdev->driver = &sx127x_driver;
dev->params = *params;
netdev_register(&dev->netdev, NETDEV_SX127X, index);
@ -148,7 +149,7 @@ int sx127x_init(sx127x_t *dev)
/* wait till device signals end of POR cycle */
while ((gpio_read(dev->params.reset_pin) > 0) ==
SX127X_POR_ACTIVE_LOGIC_LEVEL ) {};
SX127X_POR_ACTIVE_LOGIC_LEVEL) {}
}
/* wait for the device to become ready */
@ -182,7 +183,7 @@ void sx127x_init_radio_settings(sx127x_t *dev)
sx127x_set_freq_hop(dev, IS_ACTIVE(CONFIG_LORA_FREQUENCY_HOPPING_DEFAULT) ? true : false);
sx127x_set_hop_period(dev, CONFIG_LORA_FREQUENCY_HOPPING_PERIOD_DEFAULT);
sx127x_set_fixed_header_len_mode(dev, IS_ACTIVE(CONFIG_LORA_FIXED_HEADER_LEN_MODE_DEFAULT) ?
true : false);
true : false);
sx127x_set_iq_invert(dev, IS_ACTIVE(CONFIG_LORA_IQ_INVERTED_DEFAULT) ? true : false);
sx127x_set_payload_length(dev, CONFIG_LORA_PAYLOAD_LENGTH_DEFAULT);
sx127x_set_preamble_length(dev, CONFIG_LORA_PREAMBLE_LENGTH_DEFAULT);
@ -214,7 +215,7 @@ uint32_t sx127x_random(sx127x_t *dev)
ztimer_sleep(ZTIMER_MSEC, 1); /* wait one millisecond */
/* Non-filtered RSSI value reading. Only takes the LSB value */
rnd |= ((uint32_t) sx127x_reg_read(dev, SX127X_REG_LR_RSSIWIDEBAND) & 0x01) << i;
rnd |= ((uint32_t)sx127x_reg_read(dev, SX127X_REG_LR_RSSIWIDEBAND) & 0x01) << i;
}
sx127x_set_sleep(dev);
@ -238,22 +239,22 @@ static void sx127x_on_dio_isr(sx127x_t *dev, sx127x_flags_t flag)
static void sx127x_on_dio0_isr(void *arg)
{
sx127x_on_dio_isr((sx127x_t*) arg, SX127X_IRQ_DIO0);
sx127x_on_dio_isr((sx127x_t *)arg, SX127X_IRQ_DIO0);
}
static void sx127x_on_dio1_isr(void *arg)
{
sx127x_on_dio_isr((sx127x_t*) arg, SX127X_IRQ_DIO1);
sx127x_on_dio_isr((sx127x_t *)arg, SX127X_IRQ_DIO1);
}
static void sx127x_on_dio2_isr(void *arg)
{
sx127x_on_dio_isr((sx127x_t*) arg, SX127X_IRQ_DIO2);
sx127x_on_dio_isr((sx127x_t *)arg, SX127X_IRQ_DIO2);
}
static void sx127x_on_dio3_isr(void *arg)
{
sx127x_on_dio_isr((sx127x_t*) arg, SX127X_IRQ_DIO3);
sx127x_on_dio_isr((sx127x_t *)arg, SX127X_IRQ_DIO3);
}
/* Internal event handlers */
@ -315,14 +316,14 @@ static int _init_gpios(sx127x_t *dev)
static void _on_tx_timeout(void *arg)
{
netdev_t *dev = (netdev_t *) arg;
netdev_t *dev = (netdev_t *)arg;
dev->event_callback(dev, NETDEV_EVENT_TX_TIMEOUT);
}
static void _on_rx_timeout(void *arg)
{
netdev_t *dev = (netdev_t *) arg;
netdev_t *dev = (netdev_t *)arg;
dev->event_callback(dev, NETDEV_EVENT_RX_TIMEOUT);
}

436
drivers/sx127x/sx127x_getset.c
View File

@ -85,21 +85,21 @@ void sx127x_set_modem(sx127x_t *dev, uint8_t modem)
dev->settings.modem = modem;
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
/* Todo */
break;
case SX127X_MODEM_LORA:
sx127x_set_op_mode(dev, SX127X_RF_OPMODE_SLEEP);
sx127x_reg_write(dev, SX127X_REG_OPMODE,
(sx127x_reg_read(dev, SX127X_REG_OPMODE) &
SX127X_RF_LORA_OPMODE_LONGRANGEMODE_MASK) |
SX127X_RF_LORA_OPMODE_LONGRANGEMODE_ON);
case SX127X_MODEM_FSK:
/* Todo */
break;
case SX127X_MODEM_LORA:
sx127x_set_op_mode(dev, SX127X_RF_OPMODE_SLEEP);
sx127x_reg_write(dev, SX127X_REG_OPMODE,
(sx127x_reg_read(dev, SX127X_REG_OPMODE) &
SX127X_RF_LORA_OPMODE_LONGRANGEMODE_MASK) |
SX127X_RF_LORA_OPMODE_LONGRANGEMODE_ON);
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1, 0x00);
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING2, 0x00);
break;
default:
break;
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1, 0x00);
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING2, 0x00);
break;
default:
break;
}
}
@ -129,7 +129,7 @@ void sx127x_set_channel(sx127x_t *dev, uint32_t channel)
/* Save current operating mode */
dev->settings.channel = channel;
channel = (uint32_t)((double) channel / (double)LORA_FREQUENCY_RESOLUTION_DEFAULT);
channel = (uint32_t)((double)channel / (double)LORA_FREQUENCY_RESOLUTION_DEFAULT);
/* Write frequency settings into chip */
sx127x_reg_write(dev, SX127X_REG_FRFMSB, (uint8_t)((channel >> 16) & 0xFF));
@ -142,56 +142,56 @@ uint32_t sx127x_get_time_on_air(const sx127x_t *dev, uint8_t pkt_len)
uint32_t air_time = 0;
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
/* todo */
break;
case SX127X_MODEM_LORA:
{
double bw = 0.0;
/* Note: When using LoRa modem only bandwidths 125, 250 and 500 kHz are supported. */
switch (dev->settings.lora.bandwidth) {
case LORA_BW_125_KHZ:
bw = 125e3;
break;
case LORA_BW_250_KHZ:
bw = 250e3;
break;
case LORA_BW_500_KHZ:
bw = 500e3;
break;
default:
DEBUG("Invalid bandwidth: %d\n", dev->settings.lora.bandwidth);
break;
}
/* Symbol rate : time for one symbol [secs] */
double rs = bw / (1 << dev->settings.lora.datarate);
double ts = 1 / rs;
/* time of preamble */
double t_preamble = (dev->settings.lora.preamble_len + 4.25) * ts;
/* Symbol length of payload and time */
double tmp =
ceil(
(8 * pkt_len - 4 * dev->settings.lora.datarate + 28
+ 16 * (dev->settings.lora.flags & SX127X_ENABLE_CRC_FLAG)
- (!(dev->settings.lora.flags & SX127X_ENABLE_FIXED_HEADER_LENGTH_FLAG) ? 20 : 0))
/ (double) (4 * dev->settings.lora.datarate
- (((dev->settings.lora.flags & SX127X_LOW_DATARATE_OPTIMIZE_FLAG)
> 0) ? 2 : 0)))
* (dev->settings.lora.coderate + 4);
double n_payload = 8 + ((tmp > 0) ? tmp : 0);
double t_payload = n_payload * ts;
/* Time on air */
double t_on_air = t_preamble + t_payload;
/* return milli seconds */
air_time = floor(t_on_air * 1e3 + 0.999);
}
case SX127X_MODEM_FSK:
/* todo */
break;
case SX127X_MODEM_LORA:
{
double bw = 0.0;
/* Note: When using LoRa modem only bandwidths 125, 250 and 500 kHz are supported. */
switch (dev->settings.lora.bandwidth) {
case LORA_BW_125_KHZ:
bw = 125e3;
break;
case LORA_BW_250_KHZ:
bw = 250e3;
break;
case LORA_BW_500_KHZ:
bw = 500e3;
break;
default:
DEBUG("Invalid bandwidth: %d\n", dev->settings.lora.bandwidth);
break;
}
/* Symbol rate : time for one symbol [secs] */
double rs = bw / (1 << dev->settings.lora.datarate);
double ts = 1 / rs;
/* time of preamble */
double t_preamble = (dev->settings.lora.preamble_len + 4.25) * ts;
/* Symbol length of payload and time */
double tmp =
ceil(
(8 * pkt_len - 4 * dev->settings.lora.datarate + 28
+ 16 * (dev->settings.lora.flags & SX127X_ENABLE_CRC_FLAG)
- (!(dev->settings.lora.flags & SX127X_ENABLE_FIXED_HEADER_LENGTH_FLAG) ? 20 : 0))
/ (double)(4 * dev->settings.lora.datarate
- (((dev->settings.lora.flags & SX127X_LOW_DATARATE_OPTIMIZE_FLAG)
> 0) ? 2 : 0)))
* (dev->settings.lora.coderate + 4);
double n_payload = 8 + ((tmp > 0) ? tmp : 0);
double t_payload = n_payload * ts;
/* Time on air */
double t_on_air = t_preamble + t_payload;
/* return milli seconds */
air_time = floor(t_on_air * 1e3 + 0.999);
}
break;
}
return air_time;
@ -234,92 +234,97 @@ void sx127x_set_rx(sx127x_t *dev)
#endif
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
/* todo */
break;
case SX127X_MODEM_LORA:
{
sx127x_reg_write(dev, SX127X_REG_LR_INVERTIQ,
((sx127x_reg_read(dev, SX127X_REG_LR_INVERTIQ) &
SX127X_RF_LORA_INVERTIQ_TX_MASK &
SX127X_RF_LORA_INVERTIQ_RX_MASK) |
((dev->settings.lora.flags & SX127X_IQ_INVERTED_FLAG) ? SX127X_RF_LORA_INVERTIQ_RX_ON :SX127X_RF_LORA_INVERTIQ_RX_OFF) |
SX127X_RF_LORA_INVERTIQ_TX_OFF));
sx127x_reg_write(dev, SX127X_REG_LR_INVERTIQ2,
((dev->settings.lora.flags & SX127X_IQ_INVERTED_FLAG) ? SX127X_RF_LORA_INVERTIQ2_ON : SX127X_RF_LORA_INVERTIQ2_OFF));
case SX127X_MODEM_FSK:
/* todo */
break;
case SX127X_MODEM_LORA:
{
sx127x_reg_write(dev, SX127X_REG_LR_INVERTIQ,
((sx127x_reg_read(dev, SX127X_REG_LR_INVERTIQ) &
SX127X_RF_LORA_INVERTIQ_TX_MASK &
SX127X_RF_LORA_INVERTIQ_RX_MASK) |
((dev->settings.lora.flags &
SX127X_IQ_INVERTED_FLAG) ? SX127X_RF_LORA_INVERTIQ_RX_ON :
SX127X_RF_LORA_INVERTIQ_RX_OFF)
|
SX127X_RF_LORA_INVERTIQ_TX_OFF));
sx127x_reg_write(dev, SX127X_REG_LR_INVERTIQ2,
((dev->settings.lora.flags &
SX127X_IQ_INVERTED_FLAG) ? SX127X_RF_LORA_INVERTIQ2_ON :
SX127X_RF_LORA_INVERTIQ2_OFF));
#if defined(MODULE_SX1276)
/* ERRATA 2.3 - Receiver Spurious Reception of a LoRa Signal */
if (dev->settings.lora.bandwidth < 9) {
sx127x_reg_write(dev, SX127X_REG_LR_DETECTOPTIMIZE,
sx127x_reg_read(dev, SX127X_REG_LR_DETECTOPTIMIZE) & 0x7F);
sx127x_reg_write(dev, SX127X_REG_LR_TEST30, 0x00);
switch (dev->settings.lora.bandwidth) {
case LORA_BW_125_KHZ: /* 125 kHz */
sx127x_reg_write(dev, SX127X_REG_LR_TEST2F, 0x40);
break;
case LORA_BW_250_KHZ: /* 250 kHz */
sx127x_reg_write(dev, SX127X_REG_LR_TEST2F, 0x40);
break;
/* ERRATA 2.3 - Receiver Spurious Reception of a LoRa Signal */
if (dev->settings.lora.bandwidth < 9) {
sx127x_reg_write(dev, SX127X_REG_LR_DETECTOPTIMIZE,
sx127x_reg_read(dev, SX127X_REG_LR_DETECTOPTIMIZE) & 0x7F);
sx127x_reg_write(dev, SX127X_REG_LR_TEST30, 0x00);
switch (dev->settings.lora.bandwidth) {
case LORA_BW_125_KHZ: /* 125 kHz */
sx127x_reg_write(dev, SX127X_REG_LR_TEST2F, 0x40);
break;
case LORA_BW_250_KHZ: /* 250 kHz */
sx127x_reg_write(dev, SX127X_REG_LR_TEST2F, 0x40);
break;
default:
break;
}
}
else {
sx127x_reg_write(dev, SX127X_REG_LR_DETECTOPTIMIZE,
sx127x_reg_read(dev, SX127X_REG_LR_DETECTOPTIMIZE) | 0x80);
default:
break;
}
}
else {
sx127x_reg_write(dev, SX127X_REG_LR_DETECTOPTIMIZE,
sx127x_reg_read(dev, SX127X_REG_LR_DETECTOPTIMIZE) | 0x80);
}
#endif
/* Setup interrupts */
if (dev->settings.lora.flags & SX127X_CHANNEL_HOPPING_FLAG) {
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
/* SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER | */
SX127X_RF_LORA_IRQFLAGS_TXDONE |
SX127X_RF_LORA_IRQFLAGS_CADDONE |
/* SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL | */
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* Setup interrupts */
if (dev->settings.lora.flags & SX127X_CHANNEL_HOPPING_FLAG) {
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
/* SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER | */
SX127X_RF_LORA_IRQFLAGS_TXDONE |
SX127X_RF_LORA_IRQFLAGS_CADDONE |
/* SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL | */
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* DIO0=RxDone, DIO1=RxTimeout, DIO2=FhssChangeChannel, DIO3=ValidHeader */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO2_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO3_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO1_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO2_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO3_01);
}
else {
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
/* SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER | */
SX127X_RF_LORA_IRQFLAGS_TXDONE |
SX127X_RF_LORA_IRQFLAGS_CADDONE |
SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL |
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* DIO0=RxDone, DIO1=RxTimeout, DIO3=ValidHeader */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO3_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO1_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO3_01);
}
sx127x_reg_write(dev, SX127X_REG_LR_FIFORXBASEADDR, 0);
sx127x_reg_write(dev, SX127X_REG_LR_FIFOADDRPTR, 0);
/* DIO0=RxDone, DIO1=RxTimeout, DIO2=FhssChangeChannel, DIO3=ValidHeader */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO2_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO3_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO1_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO2_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO3_01);
}
break;
else {
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
/* SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER | */
SX127X_RF_LORA_IRQFLAGS_TXDONE |
SX127X_RF_LORA_IRQFLAGS_CADDONE |
SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL |
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* DIO0=RxDone, DIO1=RxTimeout, DIO3=ValidHeader */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO3_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO1_00 |
SX127X_RF_LORA_DIOMAPPING1_DIO3_01);
}
sx127x_reg_write(dev, SX127X_REG_LR_FIFORXBASEADDR, 0);
sx127x_reg_write(dev, SX127X_REG_LR_FIFOADDRPTR, 0);
}
break;
}
sx127x_set_state(dev, SX127X_RF_RX_RUNNING);
@ -345,52 +350,51 @@ void sx127x_set_tx(sx127x_t *dev)
gpio_set(dev->params.tx_switch_pin);
#endif
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
/* todo */
break;
case SX127X_MODEM_LORA:
{
if (dev->settings.lora.flags & SX127X_CHANNEL_HOPPING_FLAG) {
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER |
/* SX127X_RF_LORA_IRQFLAGS_TXDONE | */
SX127X_RF_LORA_IRQFLAGS_CADDONE |
/* SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL | */
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* DIO0=TxDone, DIO2=FhssChangeChannel */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1 ) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO2_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_01 |
SX127X_RF_LORA_DIOMAPPING1_DIO2_00);
}
else
{
/* Enable TXDONE interrupt */
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER |
/* SX127X_RF_LORA_IRQFLAGS_TXDONE | */
SX127X_RF_LORA_IRQFLAGS_CADDONE |
SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL |
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* Set TXDONE interrupt to the DIO0 line */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_01);
}
}
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
/* todo */
break;
case SX127X_MODEM_LORA:
{
if (dev->settings.lora.flags & SX127X_CHANNEL_HOPPING_FLAG) {
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER |
/* SX127X_RF_LORA_IRQFLAGS_TXDONE | */
SX127X_RF_LORA_IRQFLAGS_CADDONE |
/* SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL | */
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* DIO0=TxDone, DIO2=FhssChangeChannel */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1 ) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK &
SX127X_RF_LORA_DIOMAPPING1_DIO2_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_01 |
SX127X_RF_LORA_DIOMAPPING1_DIO2_00);
}
else {
/* Enable TXDONE interrupt */
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER |
/* SX127X_RF_LORA_IRQFLAGS_TXDONE | */
SX127X_RF_LORA_IRQFLAGS_CADDONE |
SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL |
SX127X_RF_LORA_IRQFLAGS_CADDETECTED);
/* Set TXDONE interrupt to the DIO0 line */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_01);
}
}
break;
}
sx127x_set_state(dev, SX127X_RF_TX_RUNNING);
@ -407,11 +411,11 @@ void sx127x_set_tx(sx127x_t *dev)
uint8_t sx127x_get_max_payload_len(const sx127x_t *dev)
{
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
return sx127x_reg_read(dev, SX127X_REG_PAYLOADLENGTH);
case SX127X_MODEM_FSK:
return sx127x_reg_read(dev, SX127X_REG_PAYLOADLENGTH);
case SX127X_MODEM_LORA:
return sx127x_reg_read(dev, SX127X_REG_LR_PAYLOADMAXLENGTH);
case SX127X_MODEM_LORA:
return sx127x_reg_read(dev, SX127X_REG_LR_PAYLOADMAXLENGTH);
}
/* should never be reached */
@ -423,13 +427,13 @@ void sx127x_set_max_payload_len(const sx127x_t *dev, uint8_t maxlen)
DEBUG("[sx127x] Set max payload len: %d\n", maxlen);
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
sx127x_reg_write(dev, SX127X_REG_PAYLOADLENGTH, maxlen);
break;
case SX127X_MODEM_FSK:
sx127x_reg_write(dev, SX127X_REG_PAYLOADLENGTH, maxlen);
break;
case SX127X_MODEM_LORA:
sx127x_reg_write(dev, SX127X_REG_LR_PAYLOADMAXLENGTH, maxlen);
break;
case SX127X_MODEM_LORA:
sx127x_reg_write(dev, SX127X_REG_LR_PAYLOADMAXLENGTH, maxlen);
break;
}
}
@ -441,7 +445,7 @@ uint8_t sx127x_get_op_mode(const sx127x_t *dev)
void sx127x_set_op_mode(const sx127x_t *dev, uint8_t op_mode)
{
if (IS_ACTIVE(ENABLE_DEBUG)) {
switch(op_mode) {
switch (op_mode) {
case SX127X_RF_OPMODE_SLEEP:
DEBUG("[sx127x] Set op mode: SLEEP\n");
break;
@ -475,13 +479,14 @@ uint8_t sx127x_get_bandwidth(const sx127x_t *dev)
static void _low_datarate_optimize(sx127x_t *dev)
{
if ( ((dev->settings.lora.bandwidth == LORA_BW_125_KHZ) &&
((dev->settings.lora.datarate == LORA_SF11) ||
(dev->settings.lora.datarate == LORA_SF12))) ||
((dev->settings.lora.bandwidth == LORA_BW_250_KHZ) &&
(dev->settings.lora.datarate == LORA_SF12))) {
if (((dev->settings.lora.bandwidth == LORA_BW_125_KHZ) &&
((dev->settings.lora.datarate == LORA_SF11) ||
(dev->settings.lora.datarate == LORA_SF12))) ||
((dev->settings.lora.bandwidth == LORA_BW_250_KHZ) &&
(dev->settings.lora.datarate == LORA_SF12))) {
dev->settings.lora.flags |= SX127X_LOW_DATARATE_OPTIMIZE_FLAG;
} else {
}
else {
dev->settings.lora.flags &= ~SX127X_LOW_DATARATE_OPTIMIZE_FLAG;
}
@ -501,6 +506,7 @@ static void _low_datarate_optimize(sx127x_t *dev)
static void _update_bandwidth(const sx127x_t *dev)
{
uint8_t config1_reg = sx127x_reg_read(dev, SX127X_REG_LR_MODEMCONFIG1);
#if defined(MODULE_SX1272)
config1_reg &= SX1272_RF_LORA_MODEMCONFIG1_BW_MASK;
switch (dev->settings.lora.bandwidth) {
@ -587,13 +593,14 @@ void sx127x_set_spreading_factor(sx127x_t *dev, uint8_t datarate)
dev->settings.lora.datarate = datarate;
uint8_t config2_reg = sx127x_reg_read(dev, SX127X_REG_LR_MODEMCONFIG2);
config2_reg &= SX127X_RF_LORA_MODEMCONFIG2_SF_MASK;
config2_reg |= datarate << 4;
sx127x_reg_write(dev, SX127X_REG_LR_MODEMCONFIG2, config2_reg);
_low_datarate_optimize(dev);
switch(dev->settings.lora.datarate) {
switch (dev->settings.lora.datarate) {
case LORA_SF6:
sx127x_reg_write(dev, SX127X_REG_LR_DETECTOPTIMIZE,
SX127X_RF_LORA_DETECTIONOPTIMIZE_SF6);
@ -694,6 +701,7 @@ void sx127x_set_hop_period(sx127x_t *dev, uint8_t hop_period)
dev->settings.lora.freq_hop_period = hop_period;
uint8_t tmp = sx127x_reg_read(dev, SX127X_REG_LR_PLLHOP);
if (dev->settings.lora.flags & SX127X_CHANNEL_HOPPING_FLAG) {
tmp |= SX127X_RF_LORA_PLLHOP_FASTHOP_ON;
sx127x_reg_write(dev, SX127X_REG_LR_PLLHOP, tmp);
@ -713,6 +721,7 @@ void sx127x_set_fixed_header_len_mode(sx127x_t *dev, bool fixed_len)
_set_flag(dev, SX127X_ENABLE_FIXED_HEADER_LENGTH_FLAG, fixed_len);
uint8_t config1_reg = sx127x_reg_read(dev, SX127X_REG_LR_MODEMCONFIG1);
#if defined(MODULE_SX1272)
config1_reg &= SX1272_RF_LORA_MODEMCONFIG1_IMPLICITHEADER_MASK;
config1_reg |= fixed_len << 2;
@ -725,7 +734,7 @@ void sx127x_set_fixed_header_len_mode(sx127x_t *dev, bool fixed_len)
uint8_t sx127x_get_payload_length(const sx127x_t *dev)
{
return sx127x_reg_read(dev, SX127X_REG_LR_PAYLOADLENGTH);;
return sx127x_reg_read(dev, SX127X_REG_LR_PAYLOADLENGTH);
}
void sx127x_set_payload_length(sx127x_t *dev, uint8_t len)
@ -756,6 +765,7 @@ void sx127x_set_tx_power(sx127x_t *dev, int8_t power)
dev->settings.lora.power = power;
uint8_t pa_config = sx127x_reg_read(dev, SX127X_REG_PACONFIG);
#if defined(MODULE_SX1272)
uint8_t pa_dac = sx127x_reg_read(dev, SX1272_REG_PADAC);
#else /* MODULE_SX1276 */
@ -777,7 +787,8 @@ void sx127x_set_tx_power(sx127x_t *dev, int8_t power)
if (power > 17) {
pa_dac = ((pa_dac & SX127X_RF_PADAC_20DBM_MASK) |
SX127X_RF_PADAC_20DBM_ON);
} else {
}
else {
pa_dac = ((pa_dac & SX127X_RF_PADAC_20DBM_MASK) |
SX127X_RF_PADAC_20DBM_OFF);
}
@ -791,7 +802,8 @@ void sx127x_set_tx_power(sx127x_t *dev, int8_t power)
pa_config = ((pa_config & SX127X_RF_PACONFIG_OUTPUTPOWER_MASK) |
(uint8_t)((uint16_t)(power - 5) & 0x0F));
} else {
}
else {
if (power < 2) {
power = 2;
}
@ -802,7 +814,8 @@ void sx127x_set_tx_power(sx127x_t *dev, int8_t power)
pa_config = ((pa_config & SX127X_RF_PACONFIG_OUTPUTPOWER_MASK) |
(uint8_t)((uint16_t)(power - 2) & 0x0F));
}
} else {
}
else {
if (power < -1) {
power = -1;
}
@ -858,6 +871,7 @@ void sx127x_set_symbol_timeout(sx127x_t *dev, uint16_t timeout)
DEBUG("[sx127x] Set symbol timeout: %d\n", timeout);
uint8_t config2_reg = sx127x_reg_read(dev, SX127X_REG_LR_MODEMCONFIG2);
config2_reg &= SX127X_RF_LORA_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK;
config2_reg |= (timeout >> 8) & ~SX127X_RF_LORA_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK;
sx127x_reg_write(dev, SX127X_REG_LR_MODEMCONFIG2, config2_reg);
@ -879,7 +893,7 @@ void sx127x_set_iq_invert(sx127x_t *dev, bool iq_invert)
(sx127x_reg_read(dev, SX127X_REG_LR_INVERTIQ) &
SX127X_RF_LORA_INVERTIQ_RX_MASK &
SX127X_RF_LORA_INVERTIQ_TX_MASK) |
SX127X_RF_LORA_INVERTIQ_RX_OFF |
SX127X_RF_LORA_INVERTIQ_RX_OFF |
(iq_invert ? SX127X_RF_LORA_INVERTIQ_TX_ON : SX127X_RF_LORA_INVERTIQ_TX_OFF));
sx127x_reg_write(dev, SX127X_REG_LR_INVERTIQ2,
@ -890,5 +904,5 @@ void sx127x_set_freq_hop(sx127x_t *dev, bool freq_hop_on)
{
DEBUG("[sx127x] Set freq hop: %d\n", freq_hop_on);
_set_flag(dev, SX127X_CHANNEL_HOPPING_FLAG, freq_hop_on);
_set_flag(dev, SX127X_CHANNEL_HOPPING_FLAG, freq_hop_on);
}

114
drivers/sx127x/sx127x_internal.c
View File

@ -86,7 +86,7 @@ void sx127x_reg_write_burst(const sx127x_t *dev, uint8_t addr, uint8_t *buffer,
spi_acquire(dev->params.spi, SPI_CS_UNDEF, SX127X_SPI_MODE, SX127X_SPI_SPEED);
gpio_clear(dev->params.nss_pin);
spi_transfer_regs(dev->params.spi, SPI_CS_UNDEF, addr | 0x80, (char *) buffer, NULL, size);
spi_transfer_regs(dev->params.spi, SPI_CS_UNDEF, addr | 0x80, (char *)buffer, NULL, size);
gpio_set(dev->params.nss_pin);
spi_release(dev->params.spi);
@ -98,7 +98,7 @@ void sx127x_reg_read_burst(const sx127x_t *dev, uint8_t addr, uint8_t *buffer,
spi_acquire(dev->params.spi, SPI_CS_UNDEF, SX127X_SPI_MODE, SX127X_SPI_SPEED);
gpio_clear(dev->params.nss_pin);
spi_transfer_regs(dev->params.spi, SPI_CS_UNDEF, addr & 0x7F, NULL, (char *) buffer, size);
spi_transfer_regs(dev->params.spi, SPI_CS_UNDEF, addr & 0x7F, NULL, (char *)buffer, size);
gpio_set(dev->params.nss_pin);
spi_release(dev->params.spi);
@ -122,9 +122,11 @@ void sx1276_rx_chain_calibration(sx127x_t *dev)
/* Save context */
reg_pa_config_init_val = sx127x_reg_read(dev, SX127X_REG_PACONFIG);
initial_freq = (double) (((uint32_t) sx127x_reg_read(dev, SX127X_REG_FRFMSB) << 16)
| ((uint32_t) sx127x_reg_read(dev, SX127X_REG_FRFMID) << 8)
| ((uint32_t) sx127x_reg_read(dev, SX127X_REG_FRFLSB))) * (double)LORA_FREQUENCY_RESOLUTION_DEFAULT;
initial_freq = (double)(((uint32_t)sx127x_reg_read(dev, SX127X_REG_FRFMSB) << 16)
| ((uint32_t)sx127x_reg_read(dev, SX127X_REG_FRFMID) << 8)
| ((uint32_t)sx127x_reg_read(dev,
SX127X_REG_FRFLSB))) *
(double)LORA_FREQUENCY_RESOLUTION_DEFAULT;
/* Cut the PA just in case, RFO output, power = -1 dBm */
sx127x_reg_write(dev, SX127X_REG_PACONFIG, 0x00);
@ -136,8 +138,7 @@ void sx1276_rx_chain_calibration(sx127x_t *dev)
| SX127X_RF_IMAGECAL_IMAGECAL_START);
while ((sx127x_reg_read(dev, SX127X_REG_IMAGECAL) & SX127X_RF_IMAGECAL_IMAGECAL_RUNNING)
== SX127X_RF_IMAGECAL_IMAGECAL_RUNNING) {
}
== SX127X_RF_IMAGECAL_IMAGECAL_RUNNING) {}
/* Set a frequency in HF band */
sx127x_set_channel(dev, SX127X_HF_CHANNEL_DEFAULT);
@ -148,8 +149,7 @@ void sx1276_rx_chain_calibration(sx127x_t *dev)
(sx127x_reg_read(dev, SX127X_REG_IMAGECAL) & SX127X_RF_IMAGECAL_IMAGECAL_MASK)
| SX127X_RF_IMAGECAL_IMAGECAL_START);
while ((sx127x_reg_read(dev, SX127X_REG_IMAGECAL) & SX127X_RF_IMAGECAL_IMAGECAL_RUNNING)
== SX127X_RF_IMAGECAL_IMAGECAL_RUNNING) {
}
== SX127X_RF_IMAGECAL_IMAGECAL_RUNNING) {}
/* Restore context */
sx127x_reg_write(dev, SX127X_REG_PACONFIG, reg_pa_config_init_val);
@ -162,24 +162,24 @@ int16_t sx127x_read_rssi(const sx127x_t *dev)
int16_t rssi = 0;
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
rssi = -(sx127x_reg_read(dev, SX127X_REG_RSSIVALUE) >> 1);
break;
case SX127X_MODEM_LORA:
case SX127X_MODEM_FSK:
rssi = -(sx127x_reg_read(dev, SX127X_REG_RSSIVALUE) >> 1);
break;
case SX127X_MODEM_LORA:
#if defined(MODULE_SX1272)
rssi = SX127X_RSSI_OFFSET + sx127x_reg_read(dev, SX127X_REG_LR_RSSIVALUE);
rssi = SX127X_RSSI_OFFSET + sx127x_reg_read(dev, SX127X_REG_LR_RSSIVALUE);
#else /* MODULE_SX1276 */
if (dev->settings.channel > SX127X_RF_MID_BAND_THRESH) {
rssi = SX127X_RSSI_OFFSET_HF + sx127x_reg_read(dev, SX127X_REG_LR_RSSIVALUE);
}
else {
rssi = SX127X_RSSI_OFFSET_LF + sx127x_reg_read(dev, SX127X_REG_LR_RSSIVALUE);
}
if (dev->settings.channel > SX127X_RF_MID_BAND_THRESH) {
rssi = SX127X_RSSI_OFFSET_HF + sx127x_reg_read(dev, SX127X_REG_LR_RSSIVALUE);
}
else {
rssi = SX127X_RSSI_OFFSET_LF + sx127x_reg_read(dev, SX127X_REG_LR_RSSIVALUE);
}
#endif
break;
default:
rssi = -1;
break;
break;
default:
rssi = -1;
break;
}
return rssi;
@ -188,41 +188,41 @@ int16_t sx127x_read_rssi(const sx127x_t *dev)
void sx127x_start_cad(sx127x_t *dev)
{
switch (dev->settings.modem) {
case SX127X_MODEM_FSK:
break;
case SX127X_MODEM_LORA:
/* Disable all interrupts except CAD-related */
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER |
SX127X_RF_LORA_IRQFLAGS_TXDONE |
/*SX127X_RF_LORA_IRQFLAGS_CADDONE |*/
SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL
/* | SX127X_RF_LORA_IRQFLAGS_CADDETECTED*/
);
case SX127X_MODEM_FSK:
break;
case SX127X_MODEM_LORA:
/* Disable all interrupts except CAD-related */
sx127x_reg_write(dev, SX127X_REG_LR_IRQFLAGSMASK,
SX127X_RF_LORA_IRQFLAGS_RXTIMEOUT |
SX127X_RF_LORA_IRQFLAGS_RXDONE |
SX127X_RF_LORA_IRQFLAGS_PAYLOADCRCERROR |
SX127X_RF_LORA_IRQFLAGS_VALIDHEADER |
SX127X_RF_LORA_IRQFLAGS_TXDONE |
/*SX127X_RF_LORA_IRQFLAGS_CADDONE |*/
SX127X_RF_LORA_IRQFLAGS_FHSSCHANGEDCHANNEL
/* | SX127X_RF_LORA_IRQFLAGS_CADDETECTED*/
);
if (gpio_is_valid(dev->params.dio3_pin)) {
/* DIO3 = CADDone */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO3_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO3_00);
}
else {
/* DIO0 = CADDone */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_10);
}
if (gpio_is_valid(dev->params.dio3_pin)) {
/* DIO3 = CADDone */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO3_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO3_00);
}
else {
/* DIO0 = CADDone */
sx127x_reg_write(dev, SX127X_REG_DIOMAPPING1,
(sx127x_reg_read(dev, SX127X_REG_DIOMAPPING1) &
SX127X_RF_LORA_DIOMAPPING1_DIO0_MASK) |
SX127X_RF_LORA_DIOMAPPING1_DIO0_10);
}
sx127x_set_state(dev, SX127X_RF_CAD);
sx127x_set_op_mode(dev, SX127X_RF_LORA_OPMODE_CAD);
break;
default:
break;
sx127x_set_state(dev, SX127X_RF_CAD);
sx127x_set_op_mode(dev, SX127X_RF_LORA_OPMODE_CAD);
break;
default:
break;
}
}

968
drivers/sx127x/sx127x_netdev.c
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