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boards/common: add common definitions for GD32VF103 boards

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This commit is contained in:
Gunar Schorcht 2023-01-19 08:10:53 +01:00
parent 7157ff3ffc
commit 31604da8fe
12 changed files with 245 additions and 4 deletions
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20
boards/common/gd32v/Kconfig Normal file
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@ -0,0 +1,20 @@
# Copyright (c) 2023 Gunar Schorcht
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#
config BOARD_HAS_HXTAL
bool
help
Indicates that the board is providing an HXTAL oscillator
config BOARD_HAS_LXTAL
bool
help
Indicates that the board is providing an LXTAL oscillator
config CLOCK_HXTAL
int
default 8000000

0
boards/common/gd32v/Makefile.dep Normal file
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1
boards/common/gd32v/Makefile.features Normal file
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CPU = gd32v

14
boards/common/gd32v/Makefile.include Normal file
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# include this module into the build
INCLUDES += -I$(RIOTBOARD)/common/gd32v/include
# configure the serial interface
PORT_LINUX ?= /dev/ttyUSB0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))
# configure the flasher
PROGRAMMER ?= openocd
OPENOCD_CONFIG ?= $(RIOTBOARD)/common/gd32v/dist/openocd.cfg
OPENOCD_DEBUG_ADAPTER ?= ftdi
OPENOCD_FTDI_ADAPTER ?= openocd-usb
OPENOCD_TRANSPORT = jtag
OPENOCD_RESET_USE_CONNECT_ASSERT_SRST = 1

0
boards/seeedstudio-gd32/dist/openocd.cfg → boards/common/gd32v/dist/openocd.cfg vendored
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17
boards/common/gd32v/doc.txt Normal file
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/*
* Copyright (C) 2023 Gunar Schorcht
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_common_gd32v GD32V Common Configuration
* @ingroup boards_common
* @brief Definitions and configurations that are common for
* all GD32VF103 boards.
*
* All boards using a MCU from the GD32VF103 family share some parts of their
* configuration.
*/

88
boards/common/gd32v/include/cfg_timer_default.h Normal file
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/*
* Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
* 2023 Gunar Schorcht <gunar@schorcht.net>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_gd32v
* @{
*
* @file
* @brief Default timer configuration for GD32VF103 boards
*
* @author Koen Zandberg <koen@bergzand.net>
* @author Gunar Schorcht <gunar@schorcht.net>
*/
#ifndef CFG_TIMER_DEFAULT_H
#define CFG_TIMER_DEFAULT_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Timer configuration
*
* All GD32VF103xx variants have at least one advanced timer TIMER0 and two
* general timers TIMER1 and TIMER2. GD32VF10x8 and GD32VF10xB have two
* additional general timers TIMER3 and TIMER4.
*
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIMER1,
.max = 0x0000ffff,
.rcu_mask = RCU_APB1EN_TIMER1EN_Msk,
.bus = APB1,
.irqn = TIMER1_IRQn
},
{
.dev = TIMER2,
.max = 0x0000ffff,
.rcu_mask = RCU_APB1EN_TIMER2EN_Msk,
.bus = APB1,
.irqn = TIMER2_IRQn
},
#if defined(CPU_MODEL_GD32VF103C8T6) || defined(CPU_MODEL_GD32VF103CBT6) || \
defined(CPU_MODEL_GD32VF103R8T6) || defined(CPU_MODEL_GD32VF103RBT6) || \
defined(CPU_MODEL_GD32VF103T8U6) || defined(CPU_MODEL_GD32VF103TBU6) || \
defined(CPU_MODEL_GD32VF103V8T6) || defined(CPU_MODEL_GD32VF103VBT6)
{
.dev = TIMER3,
.max = 0x0000ffff,
.rcu_mask = RCU_APB1EN_TIMER3EN_Msk,
.bus = APB1,
.irqn = TIMER3_IRQn
},
{
.dev = TIMER4,
.max = 0x0000ffff,
.rcu_mask = RCU_APB1EN_TIMER4EN_Msk,
.bus = APB1,
.irqn = TIMER4_IRQn
}
#endif
};
#define TIMER_0_IRQN TIMER1_IRQn
#define TIMER_1_IRQN TIMER2_IRQn
#define TIMER_2_IRQN TIMER3_IRQn
#define TIMER_3_IRQN TIMER4_IRQn
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* CFG_TIMER_DEFAULT_H */
/** @} */

55
boards/common/gd32v/include/cfg_uart_default.h Normal file
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/*
* Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
* 2023 Gunar Schorcht <gunar@schorcht.net>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_gd32v
* @{
*
* @file
* @brief Default UART configuration for GD32VF103 boards
*
* @author Koen Zandberg <koen@bergzand.net>
* @author Gunar Schorcht <gunar@schorcht.net>
*/
#ifndef CFG_UART_DEFAULT_H
#define CFG_UART_DEFAULT_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART0,
.rcu_mask = RCU_APB2EN_USART0EN_Msk,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.bus = APB2,
.irqn = USART0_IRQn,
},
};
#define UART_0_IRQN USART0_IRQn
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* CFG_UART_DEFAULT_H */
/** @} */

42
boards/common/gd32v/include/periph_common_conf.h Normal file
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@ -0,0 +1,42 @@
/*
* Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
* 2023 Gunar Schorcht <gunar@schorcht.net>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_common_gd32v
* @{
*
* @file
* @brief Common peripheral configuration for GD32VF103 boards
*
* @author Koen Zandberg <koen@bergzand.net>
* @author Gunar Schorcht <gunar@schorcht.net>
*/
#ifndef PERIPH_COMMON_CONF_H
#define PERIPH_COMMON_CONF_H
#include "macros/units.h"
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
#define CLOCK_CORECLOCK MHZ(108) /**< CPU clock frequency in Hz */
#define CLOCK_AHB CLOCK_CORECLOCK /**< Equal to the CPU clock */
#define CLOCK_APB1 CLOCK_AHB/2 /**< Half AHB clock */
#define CLOCK_APB2 CLOCK_AHB /**< Equal to the AHB clock */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_COMMON_CONF_H */
/** @} */

2
cpu/gd32v/Makefile.include
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@ -6,4 +6,6 @@ ROM_LEN ?= 128K
LINKER_SCRIPT ?= riscv.ld
CFLAGS += -DCPU_MODEL_$(call uppercase_and_underscore,$(CPU_MODEL))
include $(RIOTCPU)/riscv_common/Makefile.include

4
cpu/gd32v/clock.c
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@ -21,10 +21,6 @@
#include "cpu.h"
#include "periph_conf.h"
#define CLOCK_AHB CLOCK_CORECLOCK /* Equal to the CPU clock */
#define CLOCK_APB1 CLOCK_AHB/2 /* Half AHB clock */
#define CLOCK_APB2 CLOCK_AHB /* Equal to the AHB clock */
#define CLOCK_AHB_DIV 0 /* Max speed at 108 MHz */
#define CLOCK_APB1_DIV (0x04 | 0) /* Max speed at 54 MHz */
#define CLOCK_APB2_DIV (0x0 | 0) /* Max speed at 108 MHz */

6
dist/tools/doccheck/generic_exclude_patterns vendored
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@ -41,9 +41,15 @@ warning: Member PULSE_COUNTER_SAUL_INFO \(macro definition\) of
warning: Member SHT1X_PARAMS \(macro definition\) of
warning: Member SHT1X_PARAM_[A-Z0-9_]* \(macro definition\) of
warning: Member SHT1X_SAULINFO \(macro definition\) of
warning: Member TIMER_[0-9]_IRQN \(macro definition\) of
warning: Member TIMER_NUMOF \(macro definition\) of
warning: Member timer_config\[\] \(variable\) of
warning: Member TMP00X_PARAM_ADDR \(macro definition\) of
warning: Member TMP00X_PARAM_I2C \(macro definition\) of
warning: Member TMP00X_PARAM_RATE \(macro definition\) of
warning: Member UART_[0-9]_IRQN \(macro definition\) of
warning: Member UART_NUMOF \(macro definition\) of
warning: Member uart_config\[\] \(variable\) of
warning: Member XTIMER_BACKOFF \(macro definition\) of
warning: Member XTIMER_CHAN \(macro definition\) of
warning: Member XTIMER_DEV \(macro definition\) of