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Merge pull request #17225 from dylad/pr/cpu/nrf91/add_periph_flashpage_support
cpu/nrf9160: add periph_flashpage support
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commit
2ffbcecbe1
@ -1,12 +1,12 @@
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# Put defined MCU peripherals here (in alphabetical order)
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_flashpage_pagewise
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_timer_periodic
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FEATURES_PROVIDED += periph_timer_periodic
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FEATURES_PROVIDED += periph_uart_modecfg
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FEATURES_PROVIDED += periph_uart_modecfg
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ifneq (nrf9160,$(CPU_MODEL))
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ifneq (nrf9160,$(CPU_MODEL))
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_flashpage_pagewise
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FEATURES_PROVIDED += periph_hwrng
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FEATURES_PROVIDED += periph_hwrng
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FEATURES_PROVIDED += periph_rtt_overflow
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FEATURES_PROVIDED += periph_rtt_overflow
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FEATURES_PROVIDED += periph_temperature
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FEATURES_PROVIDED += periph_temperature
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@ -23,6 +23,10 @@
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#include "assert.h"
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#include "assert.h"
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#include "periph/flashpage.h"
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#include "periph/flashpage.h"
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#ifndef NRF_NVMC
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#define NRF_NVMC NRF_NVMC_S
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#endif
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void flashpage_erase(unsigned page)
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void flashpage_erase(unsigned page)
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{
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{
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assert(page < (int)FLASHPAGE_NUMOF);
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assert(page < (int)FLASHPAGE_NUMOF);
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@ -31,7 +35,14 @@ void flashpage_erase(unsigned page)
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/* erase given page */
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/* erase given page */
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een;
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NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een;
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#ifndef NRF_NVMC_S
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NRF_NVMC->ERASEPAGE = (uint32_t)page_addr;
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NRF_NVMC->ERASEPAGE = (uint32_t)page_addr;
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#else
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/* NRF_NVMC->ERASEPAGE doesn't exist on nRF9160 family, the proper
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way to erase a page is to write 0xFFFFFFFF in the first 32-bit
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word of the page to erase it (see Chap 4.4.2 from nRF9160 datasheet ) */
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*page_addr = UINT32_MAX;
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#endif
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while (NRF_NVMC->READY == 0) {}
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while (NRF_NVMC->READY == 0) {}
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}
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}
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@ -8,6 +8,8 @@ config CPU_FAM_NRF9160
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bool
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bool
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select HAS_CPU_NRF9160
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select HAS_CPU_NRF9160
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select HAS_PERIPH_CPUID
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select HAS_PERIPH_CPUID
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select HAS_PERIPH_FLASHPAGE
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select HAS_PERIPH_FLASHPAGE_PAGEWISE
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select HAS_PERIPH_GPIO
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select HAS_PERIPH_GPIO
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select HAS_PERIPH_GPIO_IRQ
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select HAS_PERIPH_GPIO_IRQ
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select HAS_PERIPH_TIMER_PERIODIC
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select HAS_PERIPH_TIMER_PERIODIC
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@ -42,6 +42,21 @@ extern "C" {
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#define CPU_IRQ_NUMOF (65U) /**< nRF9160 specific IRQ count */
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#define CPU_IRQ_NUMOF (65U) /**< nRF9160 specific IRQ count */
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/** @} */
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/** @} */
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/**
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* @name Flash page configuration
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* @{
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*/
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#define FLASHPAGE_SIZE (4096U) /**< Size of a page in bytes */
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#define FLASHPAGE_NUMOF (256U) /**< Total number of flash pages */
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/* The minimum block size which can be written is 4B. However, the erase
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* block is always FLASHPAGE_SIZE.
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*/
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#define FLASHPAGE_WRITE_BLOCK_SIZE (4U) /**< Minimum block size */
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/* Writing should be always 4 bytes aligned */
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#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U) /**< Mandatory alignment */
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/** @} */
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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