cpu/fe310: use coreclk instead of cpu_freq

cpu/fe310/clock.c

@@ -17,13 +17,14 @@
  * @}
  */
 
+#include "clk.h"
 #include "cpu.h"
 #include "periph_conf.h"
 
 #include "vendor/prci_driver.h"
 
 #if IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC) || IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC_PLL)
-static uint32_t _cpu_frequency = 0;
+uint32_t cpu_coreclk = 0;
 #endif
 
 void fe310_clock_init(void)
@@ -92,21 +93,10 @@ void fe310_clock_init(void)
         /* Don't use PLL clock source */
         PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(PLL_SEL_PLL);
     }
-}
 
-uint32_t cpu_freq(void)
-{
 #if IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC) || IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC_PLL)
-    /* Clock frequency with HFROSC cannot be determined precisely from
+    /* Ignore the first run (for icache reasons) */
-       settings */
+    cpu_coreclk = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-    /* If not done already, estimate the CPU frequency */
+    cpu_coreclk = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-    if (_cpu_frequency == 0) {
-        /* Ignore the first run (for icache reasons) */
-        _cpu_frequency = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-        _cpu_frequency = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
-    }
-    return _cpu_frequency;
-#else
-    return CLOCK_CORECLOCK;
 #endif
 }

cpu/fe310/cpu.c

@@ -17,6 +17,7 @@
  * @}
  */
 
+#include "clk.h"
 #include "cpu.h"
 #include "periph/init.h"
 #include "periph_conf.h"
@@ -80,7 +81,7 @@ void flash_init(void)
      * by the following formula (Fin is processor/tile-link clock):
      *    Fsck = Fin/(2(div + 1))
      */
-    uint32_t freq = cpu_freq();
+    uint32_t freq = coreclk();
     uint32_t sckdiv = (freq - 1) / (MAX_FLASH_FREQ * 2);
 
     if (sckdiv > SCKDIV_SAFE) {

cpu/fe310/include/clk_conf.h

@@ -113,7 +113,7 @@ extern "C" {
 
 /*
    When using HFROSC input clock, the core clock cannot be computed from settings,
-   call cpu_freq() to get the configured CPU frequency.
+   in this case, coreclk() returns the configured CPU frequency.
  */
 #ifndef CONFIG_CLOCK_DESIRED_FREQUENCY
 #define CONFIG_CLOCK_DESIRED_FREQUENCY     MHZ(320)

cpu/fe310/include/periph_cpu.h

@@ -175,13 +175,6 @@ typedef struct {
  */
 void fe310_clock_init(void);
 
-/**
- * @brief   Get and eventually compute the current CPU core clock frequency
- *
- * @return  the cpu core clock frequency in Hz
- */
-uint32_t cpu_freq(void);
-
 /** @} */
 
 #ifdef __cplusplus

cpu/fe310/periph/i2c.c

@@ -23,6 +23,7 @@
 #include <assert.h>
 #include <errno.h>
 
+#include "clk.h"
 #include "cpu.h"
 #include "mutex.h"
 
@@ -69,7 +70,7 @@ void i2c_init(i2c_t dev)
 
     /* Compute prescale: presc = (CORE_CLOCK / (5 * I2C_SPEED)) - 1 */
     uint16_t presc =
-        ((uint16_t)(cpu_freq() / 1000) /
+        ((uint16_t)(coreclk() / 1000) /
          (5 * _fe310_i2c_speed[i2c_config[dev].speed])) - 1;
 
     DEBUG("[i2c] init: computed prescale: %i (0x%02X|0x%02X)\n", presc,

cpu/fe310/periph/spi.c

@@ -24,6 +24,7 @@
 
 #include <assert.h>
 
+#include "clk.h"
 #include "cpu.h"
 #include "mutex.h"
 #include "periph/spi.h"
@@ -62,7 +63,7 @@ void spi_init(spi_t dev)
     mutex_init(&lock);
 
     for (uint8_t i = 0; i < SPI_CLK_NUMOF; ++i) {
-        _spi_clks_config[i] = SPI_DIV_UP(cpu_freq(), 2 * _spi_clks[i]) - 1;
+        _spi_clks_config[i] = SPI_DIV_UP(coreclk(), 2 * _spi_clks[i]) - 1;
     }
 
     /* trigger pin initialization */

cpu/fe310/periph/uart.c

@@ -22,6 +22,7 @@
 #include <assert.h>
 #include <inttypes.h>
 
+#include "clk.h"
 #include "irq.h"
 #include "cpu.h"
 #include "periph/uart.h"
@@ -87,7 +88,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
     uart_poweron(dev);
 
     /* Calculate baudrate divisor given current CPU clk rate */
-    uartDiv = cpu_freq() / baudrate;
+    uartDiv = coreclk() / baudrate;
 
     /* Enable UART 8-N-1 at given baudrate */
     _REG32(uart_config[dev].addr, UART_REG_DIV) = uartDiv;