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cpu/fe310: use coreclk instead of cpu_freq
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@ -17,13 +17,14 @@
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* @}
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*/
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#include "clk.h"
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#include "cpu.h"
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#include "periph_conf.h"
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#include "vendor/prci_driver.h"
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC) || IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC_PLL)
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static uint32_t _cpu_frequency = 0;
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uint32_t cpu_coreclk = 0;
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#endif
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void fe310_clock_init(void)
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@ -92,21 +93,10 @@ void fe310_clock_init(void)
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/* Don't use PLL clock source */
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PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(PLL_SEL_PLL);
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}
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}
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uint32_t cpu_freq(void)
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{
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC) || IS_ACTIVE(CONFIG_USE_CLOCK_HFROSC_PLL)
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/* Clock frequency with HFROSC cannot be determined precisely from
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settings */
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/* If not done already, estimate the CPU frequency */
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if (_cpu_frequency == 0) {
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/* Ignore the first run (for icache reasons) */
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_cpu_frequency = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
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_cpu_frequency = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
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}
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return _cpu_frequency;
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#else
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return CLOCK_CORECLOCK;
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/* Ignore the first run (for icache reasons) */
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cpu_coreclk = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
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cpu_coreclk = PRCI_measure_mcycle_freq(3000, RTC_FREQ);
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#endif
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}
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@ -17,6 +17,7 @@
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* @}
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*/
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#include "clk.h"
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#include "cpu.h"
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#include "periph/init.h"
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#include "periph_conf.h"
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@ -80,7 +81,7 @@ void flash_init(void)
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* by the following formula (Fin is processor/tile-link clock):
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* Fsck = Fin/(2(div + 1))
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*/
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uint32_t freq = cpu_freq();
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uint32_t freq = coreclk();
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uint32_t sckdiv = (freq - 1) / (MAX_FLASH_FREQ * 2);
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if (sckdiv > SCKDIV_SAFE) {
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@ -113,7 +113,7 @@ extern "C" {
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/*
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When using HFROSC input clock, the core clock cannot be computed from settings,
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call cpu_freq() to get the configured CPU frequency.
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in this case, coreclk() returns the configured CPU frequency.
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*/
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#ifndef CONFIG_CLOCK_DESIRED_FREQUENCY
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#define CONFIG_CLOCK_DESIRED_FREQUENCY MHZ(320)
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@ -175,13 +175,6 @@ typedef struct {
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*/
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void fe310_clock_init(void);
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/**
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* @brief Get and eventually compute the current CPU core clock frequency
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*
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* @return the cpu core clock frequency in Hz
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*/
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uint32_t cpu_freq(void);
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/** @} */
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#ifdef __cplusplus
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@ -23,6 +23,7 @@
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#include <assert.h>
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#include <errno.h>
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#include "clk.h"
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#include "cpu.h"
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#include "mutex.h"
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@ -69,7 +70,7 @@ void i2c_init(i2c_t dev)
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/* Compute prescale: presc = (CORE_CLOCK / (5 * I2C_SPEED)) - 1 */
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uint16_t presc =
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((uint16_t)(cpu_freq() / 1000) /
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((uint16_t)(coreclk() / 1000) /
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(5 * _fe310_i2c_speed[i2c_config[dev].speed])) - 1;
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DEBUG("[i2c] init: computed prescale: %i (0x%02X|0x%02X)\n", presc,
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@ -24,6 +24,7 @@
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#include <assert.h>
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#include "clk.h"
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/spi.h"
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@ -62,7 +63,7 @@ void spi_init(spi_t dev)
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mutex_init(&lock);
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for (uint8_t i = 0; i < SPI_CLK_NUMOF; ++i) {
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_spi_clks_config[i] = SPI_DIV_UP(cpu_freq(), 2 * _spi_clks[i]) - 1;
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_spi_clks_config[i] = SPI_DIV_UP(coreclk(), 2 * _spi_clks[i]) - 1;
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}
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/* trigger pin initialization */
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@ -22,6 +22,7 @@
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#include <assert.h>
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#include <inttypes.h>
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#include "clk.h"
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#include "irq.h"
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#include "cpu.h"
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#include "periph/uart.h"
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@ -87,7 +88,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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uart_poweron(dev);
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/* Calculate baudrate divisor given current CPU clk rate */
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uartDiv = cpu_freq() / baudrate;
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uartDiv = coreclk() / baudrate;
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/* Enable UART 8-N-1 at given baudrate */
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_REG32(uart_config[dev].addr, UART_REG_DIV) = uartDiv;
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