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cpu/gd32v: fix interrupt handling in periph_timer

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When a timer is set, any pending interrupts must be cleared before the interrupt is enabled for the channel. Otherwise the interrupt would be triggered immediately when the timer is set.
This commit is contained in:
Gunar Schorcht 2023-01-28 17:37:02 +01:00
parent c6c84cccc9
commit 2c6e527339
1 changed files with 6 additions and 1 deletions
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7
cpu/gd32v/periph/timer.c
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@ -151,6 +151,8 @@ int timer_set_absolute(tim_t tim, int channel, unsigned int value)
}
#endif
/* clear a possibly pending interrupt and enable the interrupt */
dev(tim)->INTF &= ~(TIMER0_DMAINTEN_CH0IE_Msk << channel);
dev(tim)->DMAINTEN |= (TIMER0_DMAINTEN_CH0IE_Msk << channel);
return 0;
@ -182,7 +184,10 @@ int timer_set_periodic(tim_t tim, int channel, unsigned int value,
irq_restore(state);
}
TIM_CHAN(tim, channel) = value;
TIMER_CHANNEL(tim, channel) = value;
/* clear a possibly pending interrupt before the interrupt is enabled */
dev(tim)->INTF &= ~(TIMER0_DMAINTEN_CH0IE_Msk << channel);
dev(tim)->DMAINTEN |= (TIMER0_DMAINTEN_CH0IE_Msk << channel);
if (flags & TIM_FLAG_RESET_ON_MATCH) {