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cpu/esp8266: same xtensa basics as ESP32
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parent
75c0d06913
commit
2ac4d08b43
30
cpu/esp8266/vendor/xtensa/portasm.S
vendored
30
cpu/esp8266/vendor/xtensa/portasm.S
vendored
@ -427,10 +427,14 @@ _frxt_dispatch:
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#if XCHAL_CP_NUM > 0
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/* Restore CPENABLE from task's co-processor save area. */
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movi a3, pxCurrentTCB /* cp_state = */
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l32i a3, a3, 0
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l32i a2, a3, CP_TOPOFSTACK_OFFS /* StackType_t *pxStack; */
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l16ui a3, a2, XT_CPENABLE /* CPENABLE = cp_state->cpenable; */
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movi a3, pxCurrentTCB
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l32i a3, a3, 0 /* a3 = pxCurrentTCB */
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#ifdef RIOT_VERSION
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addi a2, a3, -XT_CP_SIZE /* a2 = pxCurrentTCB->cp_state */
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#else
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l32i a2, a3, CP_TOPOFSTACK_OFFS /* StackType_t *pxStack; */
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#endif
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l16ui a3, a2, XT_CPENABLE /* CPENABLE = cpenable; */
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wsr a3, CPENABLE
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#endif
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@ -522,7 +526,11 @@ vPortYield:
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#if XCHAL_CP_NUM > 0
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/* Clear CPENABLE, also in task's co-processor state save area. */
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#ifdef RIOT_VERSION
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addi a2, a2, -XT_CP_SIZE /* a2 = pxCurrentTCB->cp_state */
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#else
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l32i a2, a2, CP_TOPOFSTACK_OFFS /* a2 = pxCurrentTCB->cp_state */
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#endif
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movi a3, 0
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wsr a3, CPENABLE
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beqz a2, 1f
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@ -563,9 +571,13 @@ vPortYieldFromInt:
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#if XCHAL_CP_NUM > 0
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/* Save CPENABLE in task's co-processor save area, and clear CPENABLE. */
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movi a3, pxCurrentTCB /* cp_state = */
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l32i a3, a3, 0
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l32i a2, a3, CP_TOPOFSTACK_OFFS
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movi a3, pxCurrentTCB
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l32i a3, a3, 0 /* a3 = pxCurrentTCB */
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#ifdef RIOT_VERSION
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addi a2, a3, -XT_CP_SIZE /* a2 = pxCurrentTCB->cp_state */
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#else
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l32i a2, a3, CP_TOPOFSTACK_OFFS /* a2 = pxCurrentTCB->cp_state */
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#endif
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rsr a3, CPENABLE
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s16i a3, a2, XT_CPENABLE /* cp_state->cpenable = CPENABLE; */
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@ -611,7 +623,11 @@ _frxt_task_coproc_state:
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movi a15, pxCurrentTCB
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l32i a15, a15, 0 /* && pxCurrentTCB != 0) { */
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beqz a15, 2f
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#ifdef RIOT_VERSION
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addi a15, a15, -XT_CP_SIZE /* a15 = pxCurrentTCB->cp_state */
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#else
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l32i a15, a15, CP_TOPOFSTACK_OFFS
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#endif
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ret
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1: movi a15, 0
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