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drivers/lis2dh12: Rename CS ad MODE to avoid conflicts
CS and MODE are a bit too generic macros and may conflict with headers defined by the CPU, like in the QN908x case. This patch renames them to BUS_CS and BUS_MODE to keep it consistent with the other BUS names.
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@ -30,11 +30,11 @@
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/* SPI bus speed and mode */
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#define BUS_CLK SPI_CLK_5MHZ
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#define MODE SPI_MODE_0
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#define BUS_MODE SPI_MODE_0
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#define BUS_OK SPI_OK
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/* shortcuts for SPI bus parameters */
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#define BUS (dev->p->spi)
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#define CS (dev->p->cs)
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#define BUS_CS (dev->p->cs)
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/* flag to set when reading from the device */
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#define FLAG_READ (0x80)
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/* flag to enable address auto incrementation on read or write */
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@ -43,7 +43,7 @@
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static int _init_bus(const lis2dh12_t *dev)
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{
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/* for SPI, we only need to initialize the chip select pin */
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if (spi_init_cs(BUS, CS) != SPI_OK) {
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if (spi_init_cs(BUS, BUS_CS) != SPI_OK) {
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return LIS2DH12_NOBUS;
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}
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return LIS2DH12_OK;
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@ -51,7 +51,7 @@ static int _init_bus(const lis2dh12_t *dev)
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static int _acquire(const lis2dh12_t *dev)
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{
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return spi_acquire(BUS, CS, MODE, BUS_CLK);
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return spi_acquire(BUS, BUS_CS, BUS_MODE, BUS_CLK);
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}
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static void _release(const lis2dh12_t *dev)
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@ -61,19 +61,19 @@ static void _release(const lis2dh12_t *dev)
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static uint8_t _read(const lis2dh12_t *dev, uint8_t reg)
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{
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return spi_transfer_reg(BUS, CS, (FLAG_READ | reg), 0);
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return spi_transfer_reg(BUS, BUS_CS, (FLAG_READ | reg), 0);
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}
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static void _read_burst(const lis2dh12_t *dev, uint8_t reg,
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void *data, size_t len)
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{
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spi_transfer_regs(BUS, CS, (FLAG_READ | FLAG_AINC | reg), NULL, data, len);
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static void _read_burst(const lis2dh12_t *dev, uint8_t reg, void *data,
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size_t len) {
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spi_transfer_regs(BUS, BUS_CS, (FLAG_READ | FLAG_AINC | reg), NULL, data,
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len);
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}
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static void _write(const lis2dh12_t *dev, uint8_t reg, uint8_t data)
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{
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DEBUG("[lis2dh12] write: reg 0x%02x, val 0x%02x\n", (int)reg, (int)data);
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spi_transfer_reg(BUS, CS, reg, data);
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spi_transfer_reg(BUS, BUS_CS, reg, data);
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}
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/* and now the I2C specific part of the driver */
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