RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-01-18 12:52:44 +01:00
Code Releases Activity

Merge pull request #11323 from aabadie/pr/stm32/add_rtt_feature

Browse Source 
boards/stm32l0/l4: add rtt feature
This commit is contained in:
Francisco 2019-05-23 12:22:03 +02:00 committed by GitHub
commit 269882b619
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 16 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
boards/nucleo-l031k6/Makefile.features
View File

@ -2,6 +2,7 @@
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

2
boards/nucleo-l031k6/include/periph_conf.h
View File

@ -24,6 +24,7 @@
#define PERIPH_CONF_H
#include "periph_cpu.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
extern "C" {
@ -35,6 +36,7 @@ extern "C" {
*/
#define CLOCK_HSI (16000000U) /* internal oscillator */
#define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency */
#define CLOCK_LSE (1) /* enable low speed external oscillator */
/* configuration of PLL prescaler and multiply values */
/* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */

1
boards/nucleo-l053r8/Makefile.features
View File

@ -1,6 +1,7 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

2
boards/nucleo-l053r8/include/periph_conf.h
View File

@ -24,6 +24,7 @@
#define PERIPH_CONF_H
#include "periph_cpu.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
extern "C" {
@ -35,6 +36,7 @@ extern "C" {
*/
#define CLOCK_HSI (16000000U) /* internal oscillator */
#define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency */
#define CLOCK_LSE (1) /* enable low speed external oscillator */
/* configuration of PLL prescaler and multiply values */
/* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */

1
boards/nucleo-l073rz/Makefile.features
View File

@ -4,6 +4,7 @@ FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_lpuart
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

1
boards/nucleo-l073rz/include/periph_conf.h
View File

@ -24,6 +24,7 @@
#define PERIPH_CONF_H
#include "periph_cpu.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
extern "C" {

1
boards/nucleo-l432kc/Makefile.features
View File

@ -1,6 +1,7 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

1
boards/nucleo-l432kc/include/periph_conf.h
View File

@ -24,6 +24,7 @@
#define PERIPH_CONF_H
#include "periph_cpu.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
extern "C" {

2
boards/stm32l476g-disco/Makefile.features
View File

@ -1,4 +1,6 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

3
boards/stm32l476g-disco/Makefile.include
View File

@ -2,6 +2,9 @@
export CPU = stm32l4
export CPU_MODEL = stm32l476vg
# we use shared STM32 configuration snippets
INCLUDES += -I$(RIOTBOARD)/common/stm32/include
# define the default port depending on the host OS
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))

12
boards/stm32l476g-disco/include/periph_conf.h
View File

@ -20,6 +20,7 @@
#define PERIPH_CONF_H
#include "periph_cpu.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
extern "C" {
@ -116,17 +117,6 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @name RTT configuration
*
* On the STM32Lx platforms, we always utilize the LPTIM1.
* @{
*/
#define RTT_NUMOF (1)
#define RTT_FREQUENCY (1024U) /* 32768 / 2^n */
#define RTT_MAX_VALUE (0x0000ffff) /* 16-bit timer */
/** @} */
/**
* @name RTC configuration
* @{