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cpu/msp430: added flashpage driver implementation
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@ -1,7 +1,8 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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@ -1,5 +1,6 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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@ -1,4 +1,5 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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@ -1,4 +1,5 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_spi
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@ -1,4 +1,5 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_spi
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@ -1,4 +1,5 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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@ -1,7 +1,11 @@
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INCLUDES += -I$(RIOTCPU)/msp430_common/include/
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# export the CPU model
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MODEL = $(shell echo $(CPU_MODEL) | tr 'a-z' 'A-Z')
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export CFLAGS += -DCPU_MODEL_$(MODEL)
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export UNDEF += $(BINDIR)/msp430_common/startup.o
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export USEMODULE += msp430_common msp430_common_periph
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export USEMODULE += msp430_common msp430_common_periph periph_common
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DEFAULT_MODULE += oneway_malloc
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@ -14,7 +14,28 @@ extern "C" {
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#endif
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/**
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* @name Kernel configuration
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* @name Configure the internal flash memory
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* @{
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*/
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#define FLASHPAGE_SIZE (512)
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#if defined (CPU_MODEL_MSP430F1611)
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#define CPU_FLASH_BASE (0x4000)
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#define FLASHPAGE_NUMOF (96) /* 48K */
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#elif defined (CPU_MODEL_MSP430F1612)
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#define CPU_FLASH_BASE (0x2600)
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#define FLASHPAGE_NUMOF (110) /* 56K */
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#elif defined (CPU_MODEL_MSP430F2617)
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#define CPU_FLASH_BASE (0x3100)
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#define FLASHPAGE_NUMOF (128) /* we can currently only access 52K */
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#elif defined (CPU_MODEL_CC430F6137)
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#define CPU_FLASH_BASE (0x8000)
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#define FLASHPAGE_NUMOF (64) /* 32K */
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#endif
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/** @} */
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/**
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* @name Kernel configuration
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* @{
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*/
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#ifndef THREAD_EXTRA_STACKSIZE_PRINTF
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57
cpu/msp430_common/periph/flashpage.c
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57
cpu/msp430_common/periph/flashpage.c
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@ -0,0 +1,57 @@
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/*
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* Copyright (C) 2014 INRIA
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* 2017 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_msp430fxyz
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* @{
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*
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* @file
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* @brief Implementation of the peripheral flashpage interface
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*
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* @author Oliver Hahm <oliver.hahm@inria.fr>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "irq.h"
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#include "periph/flashpage.h"
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void flashpage_write(int page, void *data)
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{
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assert(page < FLASHPAGE_NUMOF);
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uint8_t *src = (uint8_t *)data;
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uint8_t *dst = (uint8_t *)flashpage_addr(page);
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unsigned istate;
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/* disable interrupts and unlock flash */
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istate = irq_disable();
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FCTL3 = FWKEY;
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while (FCTL3 & BUSY) {}
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/* erase page */
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FCTL1 = (FWKEY | ERASE);
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*dst = 0; /* erases the page */
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while (FCTL3 & BUSY) {}
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if (data) {
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FCTL1 = (FWKEY | WRT);
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for (unsigned i = 0; i < FLASHPAGE_SIZE; i++) {
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*(dst++) = *(src++);
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while (!(FCTL3 & WAIT)) {}
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}
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}
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/* lock flash and re-enable interrupts */
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FCTL1 = (FWKEY);
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FCTL3 = (FWKEY | LOCK);
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irq_restore(istate);
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}
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