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https://github.com/RIOT-OS/RIOT.git
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Merge pull request #17191 from benpicco/drivers/periph-byte_type
drivers/periph: use uint_fast8_t as default type
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commit
24aa7eb6bf
@ -592,7 +592,7 @@ static int _esp_can_config(can_t *dev)
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/* route CAN interrupt source to CPU interrupt and enable it */
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intr_matrix_set(PRO_CPU_NUM, ETS_CAN_INTR_SOURCE, CPU_INUM_CAN);
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xt_set_interrupt_handler(CPU_INUM_CAN, _esp_can_intr_handler, (void*)dev);
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xt_set_interrupt_handler(CPU_INUM_CAN, _esp_can_intr_handler, (void*)(uintptr_t)dev);
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xt_ints_on(BIT(CPU_INUM_CAN));
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/* set bittiming from parameters as given in device data */
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@ -733,7 +733,7 @@ static int _esp_can_set_mode(can_t *dev, canopt_state_t state)
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static void IRAM_ATTR _esp_can_intr_handler(void *arg)
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{
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can_t* dev = (can_t *)arg;
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can_t* dev = (can_t *)(uintptr_t)arg;
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assert(arg);
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@ -683,7 +683,7 @@ static const uint32_t transfer_int_mask = I2C_TRANS_COMPLETE_INT_ENA
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void _i2c_transfer_timeout (void *arg)
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{
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i2c_t dev = (i2c_t)arg;
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i2c_t dev = (i2c_t)(uintptr_t)arg;
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/* reset the hardware if it I2C got stuck */
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_i2c_reset_hw(dev);
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@ -718,7 +718,7 @@ static void _i2c_transfer (i2c_t dev)
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/* set a timer for the case the I2C hardware gets stuck */
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xtimer_t i2c_timeout = {};
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i2c_timeout.callback = _i2c_transfer_timeout;
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i2c_timeout.arg = (void*)dev;
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i2c_timeout.arg = (void*)(uintptr_t)dev;
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xtimer_set(&i2c_timeout, I2C_TRANSFER_TIMEOUT);
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/* start execution of commands in command pipeline registers */
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@ -37,7 +37,7 @@ static struct {
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uint8_t data_mask; /**< mask applied to the data register */
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} isr_ctx[UART_NUMOF];
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static inline void _uart_isr(uart_t uart);
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static inline void _uart_isr(unsigned uart);
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static inline USART_Type *dev(uart_t uart)
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{
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@ -125,7 +125,7 @@ void i2c_init(i2c_t dev)
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/* configure dev clock speed */
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bus(dev)->FREQUENCY = i2c_config[dev].speed;
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spi_twi_irq_register_i2c(bus(dev), i2c_isr_handler, (void *)dev);
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spi_twi_irq_register_i2c(bus(dev), i2c_isr_handler, (void *)(uintptr_t)dev);
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/* We expect that the device was being acquired before
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* the i2c_init_master() function is called, so it should be enabled when
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@ -297,7 +297,7 @@ int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len,
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void i2c_isr_handler(void *arg)
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{
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i2c_t dev = (i2c_t)arg;
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i2c_t dev = (i2c_t)(uintptr_t)arg;
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/* Mask interrupts to ensure that they only trigger once */
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bus(dev)->INTENCLR = TWIM_INTEN_STOPPED_Msk | TWIM_INTEN_ERROR_Msk;
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@ -63,7 +63,7 @@ static inline bool _in_ram(const uint8_t *data)
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#ifdef ERRATA_SPI_SINGLE_BYTE_WORKAROUND
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void spi_gpio_handler(void *arg)
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{
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spi_t bus = (spi_t)arg;
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spi_t bus = (spi_t)(uintptr_t)arg;
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/**
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* Immediately disable the IRQ, we only care about one PPI event per
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@ -85,7 +85,7 @@ static void _setup_workaround_for_ftpan_58(spi_t bus)
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{
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#ifdef ERRATA_SPI_SINGLE_BYTE_WORKAROUND
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gpio_init_int(spi_config[bus].sclk, GPIO_OUT, GPIO_BOTH,
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spi_gpio_handler, (void *)bus);
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spi_gpio_handler, (void *)(uintptr_t)bus);
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gpio_irq_disable(spi_config[bus].sclk);
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uint8_t channel = gpio_int_get_exti(spi_config[bus].sclk);
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assert(channel != 0xff);
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@ -145,7 +145,7 @@ void spi_init_pins(spi_t bus)
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SPI_MOSISEL = spi_config[bus].mosi;
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SPI_MISOSEL = spi_config[bus].miso;
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_setup_workaround_for_ftpan_58(bus);
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spi_twi_irq_register_spi(dev(bus), spi_isr_handler, (void *)bus);
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spi_twi_irq_register_spi(dev(bus), spi_isr_handler, (void *)(uintptr_t)bus);
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}
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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@ -251,7 +251,7 @@ void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
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void spi_isr_handler(void *arg)
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{
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spi_t bus = (spi_t)arg;
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spi_t bus = (spi_t)(uintptr_t)arg;
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mutex_unlock(&busy[bus]);
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dev(bus)->EVENTS_END = 0;
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@ -69,14 +69,14 @@ extern "C" {
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* @brief Define default ADC type identifier
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*/
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#ifndef HAVE_ADC_T
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typedef unsigned int adc_t;
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typedef uint_fast8_t adc_t;
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#endif
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/**
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* @brief Default ADC undefined value
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*/
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#ifndef ADC_UNDEF
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#define ADC_UNDEF (UINT_MAX)
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#define ADC_UNDEF (UINT_FAST8_MAX)
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#endif
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/**
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@ -64,7 +64,7 @@ extern "C" {
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* @brief Define default DAC type identifier
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*/
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#ifndef HAVE_DAC_T
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typedef unsigned int dac_t;
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typedef uint_fast8_t dac_t;
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#endif
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/**
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@ -79,7 +79,7 @@ enum {
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* @brief Default DAC undefined value
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*/
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#ifndef DAC_UNDEF
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#define DAC_UNDEF (UINT_MAX)
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#define DAC_UNDEF (UINT_FAST8_MAX)
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#endif
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/**
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@ -139,7 +139,7 @@ extern "C" {
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* @{
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*/
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#ifndef I2C_UNDEF
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#define I2C_UNDEF (UINT_MAX)
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#define I2C_UNDEF (UINT_FAST8_MAX)
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#endif
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/** @} */
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@ -148,7 +148,7 @@ extern "C" {
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* @{
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*/
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#ifndef HAVE_I2C_T
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typedef unsigned int i2c_t;
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typedef uint_fast8_t i2c_t;
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#endif
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/** @} */
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@ -82,14 +82,14 @@ extern "C" {
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* @brief Default PWM undefined value
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*/
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#ifndef PWM_UNDEF
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#define PWM_UNDEF (UINT_MAX)
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#define PWM_UNDEF (UINT_FAST8_MAX)
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#endif
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/**
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* @brief Default PWM type definition
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*/
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#ifndef HAVE_PWM_T
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typedef unsigned int pwm_t;
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typedef uint_fast8_t pwm_t;
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#endif
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/**
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@ -98,14 +98,14 @@ extern "C" {
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* @brief Default QDEC undefined value
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*/
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#ifndef QDEC_UNDEF
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#define QDEC_UNDEF (UINT_MAX)
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#define QDEC_UNDEF (UINT_FAST8_MAX)
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#endif
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/**
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* @brief Default QDEC type definition
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*/
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#ifndef HAVE_QDEC_T
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typedef unsigned int qdec_t;
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typedef uint_fast8_t qdec_t;
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#endif
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/**
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@ -91,7 +91,7 @@ extern "C" {
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* @brief Define global value for undefined SPI device
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*/
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#ifndef SPI_UNDEF
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#define SPI_UNDEF (UINT_MAX)
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#define SPI_UNDEF (UINT_FAST8_MAX)
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#endif
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/**
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@ -116,7 +116,7 @@ extern "C" {
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* @brief Default type for SPI devices
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*/
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#ifndef HAVE_SPI_T
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typedef unsigned int spi_t;
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typedef uint_fast8_t spi_t;
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#endif
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/**
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@ -56,7 +56,7 @@ extern "C" {
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* @brief Default value for timer not defined
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*/
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#ifndef TIMER_UNDEF
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#define TIMER_UNDEF (UINT_MAX)
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#define TIMER_UNDEF (UINT_FAST8_MAX)
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#endif
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/**
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@ -66,7 +66,7 @@ extern "C" {
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* and vendor device header.
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*/
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#ifndef HAVE_TIMER_T
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typedef unsigned int tim_t;
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typedef uint_fast8_t tim_t;
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#endif
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/**
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@ -74,14 +74,14 @@ extern "C" {
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* @brief Define default UART type identifier
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*/
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#ifndef HAVE_UART_T
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typedef unsigned int uart_t;
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typedef uint_fast8_t uart_t;
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#endif
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/**
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* @brief Default UART undefined value
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*/
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#ifndef UART_UNDEF
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#define UART_UNDEF (UINT_MAX)
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#define UART_UNDEF (UINT_FAST8_MAX)
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#endif
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/**
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@ -287,7 +287,7 @@ static void soft_uart_write_byte(soft_uart_t uart, uint8_t data)
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mutex_lock(&ctx->sync);
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}
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void soft_uart_write(uart_t uart, const uint8_t *data, size_t len)
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void soft_uart_write(soft_uart_t uart, const uint8_t *data, size_t len)
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{
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const soft_uart_conf_t *cfg = &soft_uart_config[uart];
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struct uart_ctx *ctx = &soft_uart_ctx[uart];
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@ -72,7 +72,7 @@ static int parse_dev(char *arg)
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static void rx_cb(void *arg, uint8_t data)
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{
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uart_t dev = (uart_t)arg;
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uart_t dev = (soft_uart_t)arg;
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ringbuffer_add_one(&(ctx[dev].rx_buf), data);
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if (data == '\n' || ringbuffer_full(&(ctx[dev].rx_buf))) {
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@ -26,17 +26,17 @@
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#include "periph/qdec.h"
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#include "xtimer.h"
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void handler(void *arg)
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static void handler(void *arg)
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{
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qdec_t qdec = (qdec_t)arg;
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qdec_t qdec = (qdec_t)(uintptr_t)arg;
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printf("QDEC %u counter overflow : reset counter\n", qdec);
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qdec_read_and_reset(QDEC_DEV(qdec));
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}
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int main(void)
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{
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uint32_t i = 0;
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int32_t value = 0;
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unsigned i;
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int32_t value;
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puts("Welcome into Quadrature Decoder (QDEC) test program.");
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puts("This program will count pulses on all available QDEC channels");
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puts("Written for nucleo-f401re, you have to plug signals A and B as follow :");
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@ -45,7 +45,7 @@ int main(void)
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puts("Quadrature decoding mode is set to X4 : counting on all edges on both signals");
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for (i = 0; i < QDEC_NUMOF; i++) {
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int32_t error = qdec_init(QDEC_DEV(i), QDEC_X4, handler, (void *)i);
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int32_t error = qdec_init(QDEC_DEV(i), QDEC_X4, handler, (void *)(uintptr_t)i);
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if (error) {
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fprintf(stderr,"Not supported mode !\n");
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return error;
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@ -98,7 +98,7 @@ static void rxs_cb(void *arg)
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static void rx_cb(void *arg, uint8_t data)
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{
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uart_t dev = (uart_t)arg;
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uart_t dev = (uart_t)(uintptr_t)arg;
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ringbuffer_add_one(&ctx[dev].rx_buf, data);
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@ -113,7 +113,7 @@ static int _self_test(uart_t dev, unsigned baud)
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{
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const char test_string[] = "Hello UART!";
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if (uart_init(UART_DEV(dev), baud, rx_cb, (void *)dev)) {
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if (uart_init(UART_DEV(dev), baud, rx_cb, (void *)(uintptr_t)dev)) {
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printf("error configuring %u baud\n", baud);
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return -1;
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}
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