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kinetis: Add KL43Z support

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This commit is contained in:
Joakim Nohlgård 2018-04-24 18:50:34 +02:00 committed by Benjamin Valentin
parent 1a724f40ca
commit 238f91f1bb
7 changed files with 62 additions and 5 deletions
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30
cpu/kinetis/Kconfig
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@ -24,6 +24,11 @@ config CPU_FAM_K
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_PERIPH_MCG
config CPU_FAM_L
bool
select CPU_COMMON_KINETIS
select HAS_PERIPH_MCG
config CPU_FAM_W
bool
select CPU_COMMON_KINETIS
@ -44,6 +49,26 @@ config CPU_MODEL_MK22FN512VLH12
select CPU_FAM_K
select HAS_PERIPH_HWRNG
config CPU_MODEL_MKL43Z256VLH4
bool
select CPU_CORE_CORTEX_M0PLUS
select CPU_FAM_L
config CPU_MODEL_MKL43Z256VMP4
bool
select CPU_CORE_CORTEX_M0PLUS
select CPU_FAM_L
config CPU_MODEL_MKL43Z128VLH4
bool
select CPU_CORE_CORTEX_M0PLUS
select CPU_FAM_L
config CPU_MODEL_MKL43Z128VMP4
bool
select CPU_CORE_CORTEX_M0PLUS
select CPU_FAM_L
config CPU_MODEL_MK60DN512VLL10
bool
select CPU_CORE_CORTEX_M4
@ -111,6 +136,7 @@ config HAS_PERIPH_ICS
config CPU_FAM
default "ea" if CPU_FAM_EA
default "k" if CPU_FAM_K
default "l" if CPU_FAM_L
default "w" if CPU_FAM_W
config CPU_MODEL
@ -123,6 +149,10 @@ config CPU_MODEL
default "mkw22d512vha5" if CPU_MODEL_MKW22D512VHA5
default "mkw41z256vht4" if CPU_MODEL_MKW41Z256VHT4
default "mkw41z512vht4" if CPU_MODEL_MKW41Z512VHT4
default "mkl43z256vlh4" if CPU_MODEL_MKL43Z256VLH4
default "mkl43z256vmp4" if CPU_MODEL_MKL43Z256VMP4
default "mkl43z128vlh4" if CPU_MODEL_MKL43Z128VLH4
default "mkl43z128vmp4" if CPU_MODEL_MKL43Z128VMP4
default "s9keaz128aclh" if CPU_MODEL_S9KEAZ128ACLH
config CPU

2
cpu/kinetis/Makefile.features
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@ -3,6 +3,8 @@ FEATURES_PROVIDED += periph_pm
# TRNG driver is not implemented for mkw41z models
_KINETIS_CPU_MODELS_WITHOUT_HWRNG += mkw41z256vht4 mkw41z512vht4
# TRNG driver is not implemented for kl43z models
_KINETIS_CPU_MODELS_WITHOUT_HWRNG += mkl43z%
# No HWRNG in mk20d7 devices
_KINETIS_CPU_MODELS_WITHOUT_HWRNG += mk20dx256vlh7

11
cpu/kinetis/include/cpu_conf_kinetis_l.h
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@ -21,9 +21,14 @@
#ifndef CPU_CONF_KINETIS_L_H
#define CPU_CONF_KINETIS_L_H
#if (KINETIS_FAMILY == 2)
#if (KINETIS_SUBFAMILY == 2)
/* Put your vendor includes here */
#if (KINETIS_FAMILY == 4)
#if (KINETIS_SUBFAMILY == 3)
#if defined(CPU_MODEL_MKL43Z128VLH4) || \
defined(CPU_MODEL_MKL43Z128VMP4) || \
defined(CPU_MODEL_MKL43Z256VLH4) || \
defined(CPU_MODEL_MKL43Z256VMP4)
#include "vendor/MKL43Z4.h"
#endif
#endif /* (KINETIS_SUBFAMILY == y) */
#endif /* (KINETIS_FAMILY == x) */

7
cpu/kinetis/include/periph_cpu.h
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@ -311,10 +311,17 @@ typedef enum {
#ifdef KINETIS_HAVE_MK_SPI
#define HAVE_SPI_MODE_T
typedef enum {
#if defined(SPI_CTAR_CPHA_MASK)
SPI_MODE_0 = 0, /**< CPOL=0, CPHA=0 */
SPI_MODE_1 = (SPI_CTAR_CPHA_MASK), /**< CPOL=0, CPHA=1 */
SPI_MODE_2 = (SPI_CTAR_CPOL_MASK), /**< CPOL=1, CPHA=0 */
SPI_MODE_3 = (SPI_CTAR_CPOL_MASK | SPI_CTAR_CPHA_MASK) /**< CPOL=1, CPHA=1 */
#elif defined(SPI_C1_CPHA_MASK)
SPI_MODE_0 = 0, /**< CPOL=0, CPHA=0 */
SPI_MODE_1 = (SPI_C1_CPHA_MASK), /**< CPOL=0, CPHA=1 */
SPI_MODE_2 = (SPI_C1_CPOL_MASK), /**< CPOL=1, CPHA=0 */
SPI_MODE_3 = (SPI_C1_CPOL_MASK | SPI_C1_CPHA_MASK) /**< CPOL=1, CPHA=1 */
#endif
} spi_mode_t;
/** @} */
#endif /* KINETIS_HAVE_MK_SPI */

2
cpu/kinetis/include/vectors_kinetis.h
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@ -109,6 +109,7 @@ void isr_i2c0(void); /**< I2C0 interrupt handler */
void isr_i2c1(void); /**< I2C1 interrupt handler */
void isr_i2c2(void); /**< I2C2 interrupt handler */
void isr_i2c3(void); /**< I2C3 interrupt handler */
void isr_i2s0(void); /**< I2S0 interrupt handler */
void isr_i2s0_rx(void); /**< I2S0 receive interrupt handler */
void isr_i2s0_tx(void); /**< I2S0 transmit interrupt handler */
void isr_llwu(void); /**< Low leakage wakeup interrupt handler */
@ -159,6 +160,7 @@ void isr_uart1_err(void); /**< UART1 error interrupt handler */
void isr_uart1_rx_tx(void); /**< UART1 receive/transmit interrupt handler */
void isr_uart2(void); /**< UART2 unified interrupt handler */
void isr_uart2_err(void); /**< UART2 error interrupt handler */
void isr_uart2_flexio(void); /**< UART2 or FlexIO interrupt handler */
void isr_uart2_rx_tx(void); /**< UART2 receive/transmit interrupt handler */
void isr_uart3(void); /**< UART3 unified interrupt handler */
void isr_uart3_err(void); /**< UART3 error interrupt handler */

2
cpu/kinetis/isr_kinetis.c
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@ -155,6 +155,7 @@ WEAK_DEFAULT void isr_i2c0(void);
WEAK_DEFAULT void isr_i2c1(void);
WEAK_DEFAULT void isr_i2c2(void);
WEAK_DEFAULT void isr_i2c3(void);
WEAK_DEFAULT void isr_i2s0(void);
WEAK_DEFAULT void isr_i2s0_rx(void);
WEAK_DEFAULT void isr_i2s0_tx(void);
WEAK_DEFAULT void isr_llwu(void);
@ -205,6 +206,7 @@ WEAK_DEFAULT void isr_uart1_err(void);
WEAK_DEFAULT void isr_uart1_rx_tx(void);
WEAK_DEFAULT void isr_uart2(void);
WEAK_DEFAULT void isr_uart2_err(void);
WEAK_DEFAULT void isr_uart2_flexio(void);
WEAK_DEFAULT void isr_uart2_rx_tx(void);
WEAK_DEFAULT void isr_uart3(void);
WEAK_DEFAULT void isr_uart3_err(void);

13
cpu/kinetis/vectors.c
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@ -183,8 +183,14 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
[SPI2_IRQn ] = isr_spi2, /* SPI2 Interrupt */
#endif
#ifdef I2S0
#ifdef I2S_TCR1_TFW_MASK
/* K parts */
[I2S0_Tx_IRQn ] = isr_i2s0_tx, /* I2S0 transmit interrupt */
[I2S0_Rx_IRQn ] = isr_i2s0_rx, /* I2S0 receive interrupt */
#else
/* KL parts */
[I2S0_IRQn ] = isr_i2s0, /* I2S0 interrupt */
#endif
#endif
#ifdef UART0
#ifdef KINETIS_SINGLE_UART_IRQ
@ -206,8 +212,11 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
#endif
#endif
#ifdef UART2
#ifdef KINETIS_SINGLE_UART_IRQ
[UART2_IRQn] = isr_uart2, /* UART2 interrupt */
#if defined(KINETIS_SINGLE_UART_IRQ)
[UART2_IRQn] = isr_uart2, /* UART2 interrupt */
#elif defined(FLEXIO_VERID_MAJOR_MASK)
/* KL parts with FlexIO uses combined IRQ */
[UART2_FLEXIO_IRQn] = isr_uart2_flexio, /* UART2 or FLEXIO */
#else
[UART2_RX_TX_IRQn] = isr_uart2_rx_tx, /* UART2 Receive/Transmit interrupt */
[UART2_ERR_IRQn ] = isr_uart2_err, /* UART2 Error interrupt */