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Merge pull request #5927 from keestux/sam21_i2c_wait_for_response
sam21_common:i2c refactor a function to wait for response
This commit is contained in:
Peter Kietzmann
GitHub
commit
224e4f50a7
@ -44,10 +44,11 @@
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static void _i2c_poweron(SercomI2cm *sercom);
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static void _i2c_poweroff(SercomI2cm *sercom);
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static inline int _start(SercomI2cm *dev, uint8_t address, uint8_t rw_flag);
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static int _start(SercomI2cm *dev, uint8_t address, uint8_t rw_flag);
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static inline int _write(SercomI2cm *dev, const uint8_t *data, int length);
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static inline int _read(SercomI2cm *dev, uint8_t *data, int length);
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static inline void _stop(SercomI2cm *dev);
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static inline int _wait_for_response(SercomI2cm *dev, uint32_t max_timeout_counter);
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/**
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* @brief Array holding one pre-initialized mutex for each I2C device
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@ -89,7 +90,7 @@ int i2c_init_master(i2c_t dev, i2c_speed_t speed)
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mux = I2C_0_MUX;
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clock_source_speed = CLOCK_CORECLOCK;
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sercom_gclk_id = I2C_0_GCLK_ID;
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sercom_gclk_id_slow = I2C_0_GCLK_ID_SLOW ;
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sercom_gclk_id_slow = I2C_0_GCLK_ID_SLOW;
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break;
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#endif
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default:
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@ -102,7 +103,7 @@ int i2c_init_master(i2c_t dev, i2c_speed_t speed)
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/* Reset I2C */
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I2CSercom->CTRLA.reg = SERCOM_I2CS_CTRLA_SWRST;
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while(I2CSercom->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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while (I2CSercom->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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/* Turn on power manager for sercom */
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PM->APBCMASK.reg |= (PM_APBCMASK_SERCOM0 << (sercom_gclk_id - GCLK_CLKCTRL_ID_SERCOM0_CORE_Val));
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@ -135,7 +136,7 @@ int i2c_init_master(i2c_t dev, i2c_speed_t speed)
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gpio_init_mux(pin_scl, mux);
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/* I2C CONFIGURATION */
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while(I2CSercom->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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while (I2CSercom->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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/* Set sercom module to operate in I2C master mode. */
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I2CSercom->CTRLA.reg = SERCOM_I2CM_CTRLA_MODE_I2C_MASTER;
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@ -148,24 +149,24 @@ int i2c_init_master(i2c_t dev, i2c_speed_t speed)
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* kHz and Fast-mode (Fm) up to 400 kHz */
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switch (speed) {
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case I2C_SPEED_NORMAL:
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tmp_baud = (int32_t)(((clock_source_speed + (2*(100000)) - 1) / (2*(100000))) - 5);
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tmp_baud = (int32_t)(((clock_source_speed + (2 * (100000)) - 1) / (2 * (100000))) - 5);
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if (tmp_baud < 255 && tmp_baud > 0) {
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I2CSercom->CTRLA.reg |= SERCOM_I2CM_CTRLA_SPEED(0);
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I2CSercom->BAUD.reg = SERCOM_I2CM_BAUD_BAUD(tmp_baud);
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}
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break;
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case I2C_SPEED_FAST:
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tmp_baud = (int32_t)(((clock_source_speed + (2*(400000)) - 1) / (2*(400000))) - 5);
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tmp_baud = (int32_t)(((clock_source_speed + (2 * (400000)) - 1) / (2 * (400000))) - 5);
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if (tmp_baud < 255 && tmp_baud > 0) {
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I2CSercom->CTRLA.reg |= SERCOM_I2CM_CTRLA_SPEED(0);
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I2CSercom->BAUD.reg = SERCOM_I2CM_BAUD_BAUD(tmp_baud);
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}
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break;
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case I2C_SPEED_HIGH:
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tmp_baud = (int32_t)(((clock_source_speed + (2*(3400000)) - 1) / (2*(3400000))) - 1);
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tmp_baud = (int32_t)(((clock_source_speed + (2 * (3400000)) - 1) / (2 * (3400000))) - 1);
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if (tmp_baud < 255 && tmp_baud > 0) {
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I2CSercom->CTRLA.reg |= SERCOM_I2CM_CTRLA_SPEED(2);
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I2CSercom->BAUD.reg =SERCOM_I2CM_BAUD_HSBAUD(tmp_baud);
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I2CSercom->BAUD.reg = SERCOM_I2CM_BAUD_HSBAUD(tmp_baud);
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}
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break;
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default:
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@ -178,7 +179,7 @@ int i2c_init_master(i2c_t dev, i2c_speed_t speed)
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/* Start timeout if bus state is unknown. */
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while ((I2CSercom->STATUS.reg & SERCOM_I2CM_STATUS_BUSSTATE_Msk) == BUSSTATE_UNKNOWN) {
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if(timeout_counter++ >= SAMD21_I2C_TIMEOUT) {
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if (timeout_counter++ >= SAMD21_I2C_TIMEOUT) {
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/* Timeout, force bus state to idle. */
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I2CSercom->STATUS.reg = BUSSTATE_IDLE;
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}
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@ -224,9 +225,13 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, void *data, int length)
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}
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/* start transmission and send slave address */
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if(_start(i2c, address, I2C_FLAG_READ) < 0) return 0;
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if (_start(i2c, address, I2C_FLAG_READ) < 0) {
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return 0;
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}
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/* read data to register */
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if(_read(i2c, data, length) < 0) return 0;
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if (_read(i2c, data, length) < 0) {
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return 0;
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}
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_stop(i2c);
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/* return number of bytes sent */
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return length;
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@ -252,10 +257,14 @@ int i2c_read_regs(i2c_t dev, uint8_t address, uint8_t reg, void *data, int lengt
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}
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/* start transmission and send slave address */
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if (_start(i2c, address, I2C_FLAG_WRITE) < 0) return 0;
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if (_start(i2c, address, I2C_FLAG_WRITE) < 0) {
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return 0;
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}
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/* send register address/command and wait for complete transfer to
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* be finished */
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if (_write(i2c, ®, 1) < 0) return 0;
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if (_write(i2c, ®, 1) < 0) {
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return 0;
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}
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return i2c_read_bytes(dev, address, data, length);
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}
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@ -278,8 +287,12 @@ int i2c_write_bytes(i2c_t dev, uint8_t address, const void *data, int length)
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return -1;
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}
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if(_start(I2CSercom, address, I2C_FLAG_WRITE) < 0) return 0;
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if(_write(I2CSercom, data, length) < 0) return 0;
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if (_start(I2CSercom, address, I2C_FLAG_WRITE) < 0) {
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return 0;
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}
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if (_write(I2CSercom, data, length) < 0) {
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return 0;
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}
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_stop(I2CSercom);
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return length;
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}
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@ -305,11 +318,17 @@ int i2c_write_regs(i2c_t dev, uint8_t address, uint8_t reg, const void *data, in
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}
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/* start transmission and send slave address */
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if (_start(i2c, address, I2C_FLAG_WRITE) < 0) return 0;
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if (_start(i2c, address, I2C_FLAG_WRITE) < 0) {
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return 0;
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}
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/* send register address and wait for complete transfer to be finished */
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if (_write(i2c, ®, 1) < 0) return 0;
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if (_write(i2c, ®, 1) < 0) {
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return 0;
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}
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/* write data to register */
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if (_write(i2c, data, length) < 0) return 0;
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if (_write(i2c, data, length) < 0) {
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return 0;
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}
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/* finish transfer */
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_stop(i2c);
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return length;
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@ -361,11 +380,9 @@ void i2c_poweroff(i2c_t dev)
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static int _start(SercomI2cm *dev, uint8_t address, uint8_t rw_flag)
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{
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uint32_t timeout_counter = 0;
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/* Wait for hardware module to sync */
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DEBUG("Wait for device to be ready\n");
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while(dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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while (dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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/* Set action to ACK. */
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dev->CTRLB.reg &= ~SERCOM_I2CM_CTRLB_ACKACT;
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@ -375,12 +392,14 @@ static int _start(SercomI2cm *dev, uint8_t address, uint8_t rw_flag)
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dev->ADDR.reg = (address << 1) | rw_flag | (0 << SERCOM_I2CM_ADDR_HS_Pos);
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/* Wait for response on bus. */
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while (!(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_MB)
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&& !(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_SB)) {
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if (++timeout_counter >= SAMD21_I2C_TIMEOUT) {
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DEBUG("STATUS_ERR_TIMEOUT\n");
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if (rw_flag == I2C_FLAG_READ) {
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/* Some devices (e.g. SHT2x) can hold the bus while preparing the reply */
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if (_wait_for_response(dev, 100 * SAMD21_I2C_TIMEOUT) < 0)
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return -1;
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}
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else {
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if (_wait_for_response(dev, SAMD21_I2C_TIMEOUT) < 0)
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return -1;
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}
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/* Check for address response error unless previous error is detected. */
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@ -408,7 +427,6 @@ static int _start(SercomI2cm *dev, uint8_t address, uint8_t rw_flag)
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static inline int _write(SercomI2cm *dev, const uint8_t *data, int length)
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{
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uint16_t tmp_data_length = length;
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uint32_t timeout_counter = 0;
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uint16_t buffer_counter = 0;
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/* Write data buffer until the end. */
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@ -421,20 +439,14 @@ static inline int _write(SercomI2cm *dev, const uint8_t *data, int length)
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}
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/* Wait for hardware module to sync */
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while(dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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while (dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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DEBUG("Written byte #%i to data reg, now waiting for DR to be empty again\n", buffer_counter);
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dev->DATA.reg = data[buffer_counter++];
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DEBUG("Wait for response.\n");
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timeout_counter = 0;
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while (!(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_MB)
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&& !(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_SB)) {
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if (++timeout_counter >= SAMD21_I2C_TIMEOUT) {
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DEBUG("STATUS_ERR_TIMEOUT\n");
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/* Wait for response on bus. */
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if (_wait_for_response(dev, SAMD21_I2C_TIMEOUT) < 0)
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return -1;
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}
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}
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/* Check for NACK from slave. */
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if (dev->STATUS.reg & SERCOM_I2CM_STATUS_RXNACK) {
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@ -447,7 +459,6 @@ static inline int _write(SercomI2cm *dev, const uint8_t *data, int length)
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static inline int _read(SercomI2cm *dev, uint8_t *data, int length)
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{
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uint32_t timeout_counter = 0;
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uint8_t count = 0;
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/* Set action to ack. */
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@ -462,19 +473,14 @@ static inline int _read(SercomI2cm *dev, uint8_t *data, int length)
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}
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/* Wait for hardware module to sync */
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while(dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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while (dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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/* Save data to buffer. */
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data[count] = dev->DATA.reg;
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/* Wait for response. */
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timeout_counter = 0;
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while (!(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_MB)
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&& !(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_SB)) {
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if (++timeout_counter >= SAMD21_I2C_TIMEOUT) {
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DEBUG("STATUS_ERR_TIMEOUT\n");
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/* Wait for response on bus. */
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if (_wait_for_response(dev, SAMD21_I2C_TIMEOUT) < 0)
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return -1;
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}
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}
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count++;
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}
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/* Send NACK before STOP */
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@ -485,12 +491,26 @@ static inline int _read(SercomI2cm *dev, uint8_t *data, int length)
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static inline void _stop(SercomI2cm *dev)
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{
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/* Wait for hardware module to sync */
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while(dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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while (dev->SYNCBUSY.reg & SERCOM_I2CM_SYNCBUSY_MASK) {}
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/* Stop command */
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dev->CTRLB.reg |= SERCOM_I2CM_CTRLB_CMD(3);
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/* Wait for bus to be idle again */
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while((dev->STATUS.reg & SERCOM_I2CM_STATUS_BUSSTATE_Msk) != BUSSTATE_IDLE) {}
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while ((dev->STATUS.reg & SERCOM_I2CM_STATUS_BUSSTATE_Msk) != BUSSTATE_IDLE) {}
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DEBUG("Stop sent\n");
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}
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static inline int _wait_for_response(SercomI2cm *dev, uint32_t max_timeout_counter)
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{
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uint32_t timeout_counter = 0;
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DEBUG("Wait for response.\n");
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while (!(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_MB)
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&& !(dev->INTFLAG.reg & SERCOM_I2CM_INTFLAG_SB)) {
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if (++timeout_counter >= max_timeout_counter) {
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DEBUG("STATUS_ERR_TIMEOUT\n");
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return -1;
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}
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}
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return 0;
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}
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#endif /* I2C_NUMOF */
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