RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

cpu/stm32: fix timer speed for STM32F1 and F2

Browse Source
This commit is contained in:
Hauke Petersen 2017-01-05 13:53:14 +01:00
parent c062bf71b9
commit 21300cb40f
1 changed files with 8 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
cpu/stm32_common/periph/timer.c
View File

@ -53,8 +53,15 @@ int timer_init(tim_t tim, unsigned long freq, timer_cb_t cb, void *arg)
dev(tim)->CR1 = 0;
dev(tim)->CR2 = 0;
dev(tim)->ARR = timer_config[tim].max;
/* set prescaler */
/* set prescaler: the STM32F1 and STM32F2 introduce a clock multiplier of 2
* in the case the APB1 prescaler is != 1, so we need to catch this
* -> see reference manual section 7.2.1 and section 5.2, respectively */
#if (defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2)) \
&& (CLOCK_APB1 < CLOCK_CORECLOCK)
dev(tim)->PSC = (((periph_apb_clk(timer_config[tim].bus) * 2) / freq) - 1);
#else
dev(tim)->PSC = ((periph_apb_clk(timer_config[tim].bus) / freq) - 1);
#endif
/* generate an update event to apply our configuration */
dev(tim)->EGR = TIM_EGR_UG;