diff --git a/cpu/stm32f1/periph/gpio.c b/cpu/stm32f1/periph/gpio.c
index a3fea5aec0..1d0cec0a31 100644
--- a/cpu/stm32f1/periph/gpio.c
+++ b/cpu/stm32f1/periph/gpio.c
@@ -88,6 +88,16 @@ int gpio_init(gpio_t pin, gpio_mode_t mode)
     /* enable the clock for the selected port */
     periph_clk_en(APB2, (RCC_APB2ENR_IOPAEN << _port_num(pin)));
 
+#ifdef BOARD_NUCLEO_F103RB
+    /* disable the default SWJ RST mode to allow using the pin as IO
+       this may also work on other f103 based boards but it was only tested on
+       nucleo-f103rb */
+    if ((pin_num == 4) && _port_num(pin)) {
+        RCC->APB2ENR |= RCC_APB2ENR_AFIOEN;
+        AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_NOJNTRST;
+    }
+#endif
+
     /* set pin mode */
     port->CR[pin_num >> 3] &= ~(0xf << ((pin_num & 0x7) * 4));
     port->CR[pin_num >> 3] |=  ((mode & MODE_MASK) << ((pin_num & 0x7) * 4));