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Merge pull request #15030 from jia200x/pr/lora/remove_xtimer

drivers/sx127x: remove ZTIMER_USEC dependency
This commit is contained in:
José Alamos 2021-09-27 11:41:22 +02:00 committed by GitHub
commit 1ee57f80a0
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6 changed files with 17 additions and 21 deletions

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@ -167,12 +167,8 @@ typedef struct {
#define RTT_MIN_FREQUENCY (1U) /* in Hz */
#ifndef RTT_FREQUENCY
#ifdef MODULE_PERIPH_RTC
#define RTT_FREQUENCY (RTT_MIN_FREQUENCY) /* in Hz */
#else
#define RTT_FREQUENCY (RTT_MAX_FREQUENCY) /* in Hz */
#endif
#endif
/**
* @brief Initialization of the clock

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@ -40,10 +40,6 @@ config MODULE_SX127X
select MODULE_PERIPH_SPI_GPIO_MODE if HAS_PERIPH_SPI_GPIO_MODE
select MODULE_PERIPH_SPI
select MODULE_ZTIMER
select MODULE_ZTIMER_PERIPH_TIMER
select MODULE_ZTIMER_USEC
select MODULE_ZTIMER_MSEC
imply MODULE_ZTIMER_PERIPH_RTT
endif # TEST_KCONFIG

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@ -3,7 +3,6 @@ FEATURES_REQUIRED += periph_gpio_irq
FEATURES_REQUIRED += periph_spi
FEATURES_OPTIONAL += periph_spi_gpio_mode
USEMODULE += iolist
USEMODULE += ztimer_usec
USEMODULE += ztimer_msec
USEMODULE += lora

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@ -45,20 +45,20 @@
#include "debug.h"
/* The reset signal must be applied for at least 100 µs to trigger the manual
reset of the device. To ensure this value is big enough even with an
inaccurate clock source, an additional 10 % error margin is added. */
#define SX127X_MANUAL_RESET_SIGNAL_LEN_US (110U)
reset of the device. In order to avoid a dependency to the high frequency
timers, we round it to 1 ms */
#define SX127X_MANUAL_RESET_SIGNAL_LEN_MS (1U)
/* After triggering a manual reset the device needs at least 5 ms to become
ready before interacting with it. To ensure this value is big enough even
with an inaccurate clock source, an additional 10 % error margin is added. */
#define SX127X_MANUAL_RESET_WAIT_FOR_READY_US (5500U)
ready before interacting with it. We round up to 6 ms in case the clock
source is not accurate enough */
#define SX127X_MANUAL_RESET_WAIT_FOR_READY_MS (6U)
/* When the device is started by enabling its power supply for the first time
i.e. on Power-on-Reset (POR), it needs at least 10 ms after the POR cycle is
done to become ready. To ensure this value is big enough even with an
inaccurate clock source, an additional 10 % error margin is added. */
#define SX127X_POR_WAIT_FOR_READY_US (11U * US_PER_MS)
#define SX127X_POR_WAIT_FOR_READY_MS (11U)
/* Internal functions */
static int _init_spi(sx127x_t *dev);
@ -116,12 +116,12 @@ int sx127x_reset(const sx127x_t *dev)
/* set reset pin to the state that triggers manual reset */
gpio_write(dev->params.reset_pin, SX127X_POR_ACTIVE_LOGIC_LEVEL);
ztimer_sleep(ZTIMER_USEC, SX127X_MANUAL_RESET_SIGNAL_LEN_US);
ztimer_sleep(ZTIMER_MSEC, SX127X_MANUAL_RESET_SIGNAL_LEN_MS);
/* Put reset pin in High-Z */
gpio_init(dev->params.reset_pin, GPIO_IN);
ztimer_sleep(ZTIMER_USEC, SX127X_MANUAL_RESET_WAIT_FOR_READY_US);
ztimer_sleep(ZTIMER_MSEC, SX127X_MANUAL_RESET_WAIT_FOR_READY_MS);
}
return 0;
@ -153,7 +153,7 @@ int sx127x_init(sx127x_t *dev)
}
/* wait for the device to become ready */
ztimer_sleep(ZTIMER_USEC, SX127X_POR_WAIT_FOR_READY_US);
ztimer_sleep(ZTIMER_MSEC, SX127X_POR_WAIT_FOR_READY_MS);
sx127x_reset(dev);

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@ -11,7 +11,12 @@ USEMODULE += $(PERIPH_FEATURES)
# Add all USED periph_% init modules unless they are blacklisted
ifneq (,$(filter periph_init, $(USEMODULE)))
PERIPH_MODULES := $(filter-out periph_init% periph_common,\
PERIPH_IGNORE_MODULES := \
periph_init% \
periph_common \
periph_rtc_rtt \
#
PERIPH_MODULES := $(filter-out $(PERIPH_IGNORE_MODULES),\
$(filter periph_%,$(USEMODULE)))
# Use simple expansion to avoid USEMODULE referencing itself
PERIPH_INIT_MODULES := $(subst periph_,periph_init_,$(PERIPH_MODULES))

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@ -8,7 +8,7 @@ endif
# might not be the most optimized for conversion guarantees that ztimer_periph_rtt
# will have a capable backend.
ifneq (,$(filter ztimer_periph_rtt,$(USEMODULE)))
ifneq (,$(filter stm32 nrf5% sam% kinetis efm32,$(CPU)))
ifneq (,$(filter stm32 nrf5% sam% kinetis efm32 fe310,$(CPU)))
RTT_FREQUENCY ?= RTT_MAX_FREQUENCY
CFLAGS += -DRTT_FREQUENCY=$(RTT_FREQUENCY)
endif