drivers/usbdev_synopsys_dwc2: use DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE

Use `DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE` instead of `USB_OTG_FS_TOTAL_FIFO_SIZE` since the latter is only defined in the vendor headers for STM32 MCUs. The STM32-specific problem that `USB_OTG_FS_TOTAL_FIFO_SIZE` is not defined in the vendor headers for all STM32 families has therefore been moved from the driver to the STM32-specific USB device header.

cpu/stm32/include/usbdev_stm32.h

@@ -81,7 +81,7 @@ extern "C" {
 /**
  * @brief USB OTG FS FIFO reception buffer space in 32-bit words
  *
- * Used as shared FIFO for reception of all OUT transfers
+ * Used as shared FIFO for reception of all OUT transfers from the host
  *
  * @note The application might have to increase this when dealing with large
  *       isochronous transfers
@@ -99,6 +99,38 @@ extern "C" {
 #define DWC2_USB_OTG_HS_RX_FIFO_SIZE   (512U)
 #endif
 
+/**
+ * @brief USB OTG FS FIFO total size
+ *
+ * Some device families (F7 and L4) forgot to define the FS device FIFO size
+ * in their vendor headers. This define sets it to the value from the
+ * reference manual.
+ */
+#ifndef USB_OTG_FS_TOTAL_FIFO_SIZE
+#define USB_OTG_FS_TOTAL_FIFO_SIZE      (1280U)
+#endif
+
+/**
+ * @brief USB OTG FS FIFO total size
+ *
+ * Some device families (F7 and L4) forgot to define the HS device FIFO size
+ * in their vendor headers. This define sets it to the value from the
+ * reference manual.
+ */
+#ifndef USB_OTG_HS_TOTAL_FIFO_SIZE
+#define USB_OTG_HS_TOTAL_FIFO_SIZE      (4096U)
+#endif
+
+/**
+ * @brief USB OTG FS FIFO total size
+ */
+#define DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE USB_OTG_FS_TOTAL_FIFO_SIZE
+
+/**
+ * @brief USB OTG HS FIFO total size
+ */
+#define DWC2_USB_OTG_HS_TOTAL_FIFO_SIZE USB_OTG_HS_TOTAL_FIFO_SIZE
+
 /**
  * @brief Use the built-in DMA controller of the HS peripheral when possible
  */

drivers/usbdev_synopsys_dwc2/usbdev_synopsys_dwc2.c

@@ -93,20 +93,6 @@
 #define DWC2_PKTSTS_SETUP_COMP     0x04    /**< Rx fifo setup complete */
 #define DWC2_PKTSTS_SETUP_UPDT     0x06    /**< Rx fifo setup update   */
 
-/* Some device families (F7 and L4) forgot to define the FS device FIFO size  *
- * in their vendor headers. This define sets it to the value from the         *
- * reference manual                                                           */
-#ifndef USB_OTG_FS_TOTAL_FIFO_SIZE
-#define USB_OTG_FS_TOTAL_FIFO_SIZE      (1280U)
-#endif
-
-/* Some device families (F7 and L4) forgot to define the HS device FIFO size  *
- * in their vendor headers. This define sets it to the value from the         *
- * reference manual                                                           */
-#ifndef USB_OTG_HS_TOTAL_FIFO_SIZE
-#define USB_OTG_HS_TOTAL_FIFO_SIZE      (4096U)
-#endif
-
 /* minimum depth of an individual transmit FIFO */
 #define DWC2_USB_OTG_FIFO_MIN_WORD_SIZE (16U)
 /* Offset for OUT endpoints in a shared IN/OUT endpoint bit flag register */
@@ -472,14 +458,14 @@ static size_t _total_fifo_size(const dwc2_usb_otg_fshs_config_t *conf)
 {
     if (conf->type == DWC2_USB_OTG_FS) {
 #ifdef DWC2_USB_OTG_FS_ENABLED
-        return USB_OTG_FS_TOTAL_FIFO_SIZE;
+        return DWC2_USB_OTG_FS_TOTAL_FIFO_SIZE;
 #else
         return 0;
 #endif  /* DWC2_USB_OTG_FS_ENABLED */
     }
     else {
 #ifdef DWC2_USB_OTG_HS_ENABLED
-        return USB_OTG_HS_TOTAL_FIFO_SIZE;
+        return DWC2_USB_OTG_HS_TOTAL_FIFO_SIZE;
 #else
         return 0;
 #endif  /* DWC2_USB_OTG_HS_ENABLED */