From 1dec5ba61b0ae6e4a9df3d9780eeca5de2687015 Mon Sep 17 00:00:00 2001 From: Francisco Molina Date: Tue, 21 Jan 2020 17:40:50 +0100 Subject: [PATCH] boards/common/stm32f7: add correct flash bank configuration openocd configuration file for `stm32f7` relies on probing to find out FLASH_ADDR. On nucleo-f767zi board probing (`flash probe 0`) fails when `srst` is asserted, but `srst` needs to be asserted to be able to flash the `BOARD` when sleeping or after a hardfault. To circumvent this in boards/common/stm32/dist/stm32f7.cfg we define a new flash bank with the appropriate fash start address and specify that this is the flash bank to be used as default configuration instead of the default by setting FLASH_BANK=4 --- boards/common/stm32/dist/stm32f7.cfg | 6 ++++++ boards/nucleo-f767zi/Makefile.include | 10 ++++++++++ 2 files changed, 16 insertions(+) diff --git a/boards/common/stm32/dist/stm32f7.cfg b/boards/common/stm32/dist/stm32f7.cfg index 2a1ac13f45..819d150e08 100644 --- a/boards/common/stm32/dist/stm32f7.cfg +++ b/boards/common/stm32/dist/stm32f7.cfg @@ -1,3 +1,9 @@ source [find target/stm32f7x.cfg] + +# specify flash start address: since target/stm32f7x.cfg doesn't, this +# can be used as backup in case probing fails. When correct address is +# given, the flash size is obtained from hardware so no need to specify. +flash bank $_FLASHNAME.riot stm32f2x 0x08000000 0 0 0 $_TARGETNAME + reset_config srst_only $_TARGETNAME configure -rtos auto diff --git a/boards/nucleo-f767zi/Makefile.include b/boards/nucleo-f767zi/Makefile.include index a7e3adb0d8..37a3a2c951 100644 --- a/boards/nucleo-f767zi/Makefile.include +++ b/boards/nucleo-f767zi/Makefile.include @@ -1,2 +1,12 @@ # load the common Makefile.include for Nucleo boards include $(RIOTBOARD)/common/nucleo144/Makefile.include + +# openocd configuration file for `stm32f7` relies on probing to find out +# FLASH_ADDR. On this board probing (`flash probe 0`) fails when `srst` is +# asserted, but `srst` needs to be asserted to be able to flash the `BOARD` +# when sleeping or after a hardfault. +# To circumvent this in boards/common/stm32/dist/stm32f7.cfg we define a new +# flash bank with the appropriate flash start address and specify that this is +# the flash bank to be used as default configuration instead of the default (1) +FLASH_BANK ?= 4 +$(call target-export-variables,flash flash-only,FLASH_BANK)