diff --git a/boards/bluepill-stm32f030c8/Kconfig b/boards/bluepill-stm32f030c8/Kconfig new file mode 100644 index 0000000000..3f39a244a9 --- /dev/null +++ b/boards/bluepill-stm32f030c8/Kconfig @@ -0,0 +1,23 @@ +# Copyright (c) 2020 Benjamin Valentin +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD + default "bluepill-stm32f030c8" if BOARD_BLUEPILL_STM32F030C8 + +config BOARD_BLUEPILL_STM32F030C8 + bool + default y + select CPU_MODEL_STM32F030C8 + + # Put defined MCU peripherals here (in alphabetical order) + select HAS_PERIPH_ADC + select HAS_PERIPH_I2C + select HAS_PERIPH_PWM + select HAS_PERIPH_TIMER + select HAS_PERIPH_UART + select HAS_PERIPH_SPI + select HAS_PERIPH_RTC diff --git a/boards/bluepill-stm32f030c8/Makefile b/boards/bluepill-stm32f030c8/Makefile new file mode 100644 index 0000000000..f8fcbb53a0 --- /dev/null +++ b/boards/bluepill-stm32f030c8/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/bluepill-stm32f030c8/Makefile.dep b/boards/bluepill-stm32f030c8/Makefile.dep new file mode 100644 index 0000000000..5472bf8b8d --- /dev/null +++ b/boards/bluepill-stm32f030c8/Makefile.dep @@ -0,0 +1,3 @@ +ifneq (,$(filter saul_default,$(USEMODULE))) + USEMODULE += saul_gpio +endif diff --git a/boards/bluepill-stm32f030c8/Makefile.features b/boards/bluepill-stm32f030c8/Makefile.features new file mode 100644 index 0000000000..2cd2c725cb --- /dev/null +++ b/boards/bluepill-stm32f030c8/Makefile.features @@ -0,0 +1,11 @@ +CPU = stm32 +CPU_MODEL = stm32f030c8 + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_pwm +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_rtc diff --git a/boards/bluepill-stm32f030c8/Makefile.include b/boards/bluepill-stm32f030c8/Makefile.include new file mode 100644 index 0000000000..236f122411 --- /dev/null +++ b/boards/bluepill-stm32f030c8/Makefile.include @@ -0,0 +1,4 @@ +INCLUDES += -I$(RIOTBOARD)/common/stm32/include + +# Setup of programmer and serial is shared between STM32 based boards +include $(RIOTMAKE)/boards/stm32.inc.mk diff --git a/boards/bluepill-stm32f030c8/board.c b/boards/bluepill-stm32f030c8/board.c new file mode 100644 index 0000000000..9bbd64336f --- /dev/null +++ b/boards/bluepill-stm32f030c8/board.c @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2020 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_bluepill-stm32f030c8 + * @{ + * + * @file + * @brief Board initialization code for the bluepill-stm32f030c8 board. + * + * @author Benjamin Valentin + * + * @} + */ + +#include "board.h" +#include "cpu.h" +#include "periph/gpio.h" + +void board_init(void) +{ + cpu_init(); + gpio_init(LED0_PIN, GPIO_OUT); + LED0_OFF; +} diff --git a/boards/bluepill-stm32f030c8/doc.txt b/boards/bluepill-stm32f030c8/doc.txt new file mode 100644 index 0000000000..2490501e82 --- /dev/null +++ b/boards/bluepill-stm32f030c8/doc.txt @@ -0,0 +1,65 @@ +/** +@defgroup boards_bluepill-stm32f030c8 STM32F030C8 based Bluepill +@ingroup boards +@brief Support for the STM32F030C8 based Bluepill + +## Overview + +The STM32F030C8 based Bluepill is a very cheap breakout board for the STM32F030C8 MCU. + +## Hardware + +![STM32F030C8 based Bluepill](https://camo.githubusercontent.com/f33ec5f4068e1dcc4c549dbe3dc70d2ed784c19abf1c177f9640835180f88005/68747470733a2f2f696d616765732d6e612e73736c2d696d616765732d616d617a6f6e2e636f6d2f696d616765732f492f3631474765592532424c306a4c2e5f41435f534c313030305f2e6a7067) + +### MCU +| MCU | STM32F030C8T6 | +|:---------- |:--------------------- | +| Family | ARM Cortex-M0 | +| Vendor | ST Microelectronics | +| RAM | 8 KiB | +| Flash | 64 KiB | +| Frequency | up to 48MHz | +| FPU | no | +| Timers | 8 (2x watchdog, 1 SysTick, 5x 16-bit) | +| ADCs | 1x 12-bit | +| UARTs | 2 | +| SPIs | 2 | +| I2Cs | 2 | +| RTC | 1 | +| Vcc | 2.0V - 3.6V | +| Datasheet | [Datasheet](https://www.st.com/en/microcontrollers-microprocessors/stm32f030f4.html) | +| Reference Manual | [Reference Manual](https://www.st.com/resource/en/datasheet/stm32f030f4.pdf) | +| Programming Manual | [Programming Manual](http://www.st.com/resource/en/programming_manual/dm00051352.pdf) | + +## Flashing the device + +The STM32F030C8 based Bluepill board does not include a programmer. +You have to connect a separate ST-Link programmer to the (SW)DIO, (SW)CLK and GND +pins on the board. + +If you want a serial terminal, you have to connect a separate USB-Serial adapter to +the PA09 (TX) and PA10 (RX) pins on the board. + +The easiest way to program the board is to use OpenOCD. Once you have installed +OpenOCD (look [here](https://github.com/RIOT-OS/RIOT/wiki/OpenOCD) for +installation instructions), you can flash the board simply by typing + +``` +make BOARD=bluepill-stm32f030c8 flash +``` +and debug via GDB by simply typing +``` +make BOARD=bluepill-stm32f030c8 debug +``` + +## Known Issues + +### Flashing fails + +The board does not expose a pin for the reset signal but wires it only to the +reset button. +You can work around this by pressing the reset button when OpenOCD wants to connect +to the Blue Pill, or keep it pressed until OpenOCD tries to connect. +Hit the reset button again after flashing in order to boot the newly flashed image. + + */ diff --git a/boards/bluepill-stm32f030c8/include/board.h b/boards/bluepill-stm32f030c8/include/board.h new file mode 100644 index 0000000000..e89f3b604d --- /dev/null +++ b/boards/bluepill-stm32f030c8/include/board.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2020 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_bluepill-stm32f030c8 + * + * This board can be bought very cheaply (< 2€) on sites like eBay or + * AliExpress. + * + * @brief Support for the STM32F030C8 based Bluepill + * @{ + * + * @file + * @brief Pin definitions and board configuration options + * + * @author Benjamin Valentin + */ + +#ifndef BOARD_H +#define BOARD_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Xtimer configuration + * @{ + */ +#define XTIMER_WIDTH (16) +/** @} */ + +/** + * @name LED pin definitions and handlers + * @{ + */ +#define LED0_PORT GPIOC +#define LED0_PIN GPIO_PIN(PORT_C, 13) +#define LED0_MASK (1 << 13) + +#define LED0_ON (LED0_PORT->BSRR = (LED0_MASK << 16)) +#define LED0_OFF (LED0_PORT->BSRR = (LED0_MASK << 0)) +#define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK) +/** @} */ + +/** + * @brief Initialize board specific hardware, including clock, LEDs and std-IO + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/bluepill-stm32f030c8/include/gpio_params.h b/boards/bluepill-stm32f030c8/include/gpio_params.h new file mode 100644 index 0000000000..2b6a57eda6 --- /dev/null +++ b/boards/bluepill-stm32f030c8/include/gpio_params.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2020 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_bluepill-stm32f030c8 + * @{ + * + * @file + * @brief Board specific configuration of direct mapped GPIOs + * + * @author Benjamin Valentin + */ + +#ifndef GPIO_PARAMS_H +#define GPIO_PARAMS_H + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief GPIO pin configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "LED", + .pin = LED0_PIN, + .mode = GPIO_OUT, + .flags = SAUL_GPIO_INVERTED, + }, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* GPIO_PARAMS_H */ +/** @} */ diff --git a/boards/bluepill-stm32f030c8/include/periph_conf.h b/boards/bluepill-stm32f030c8/include/periph_conf.h new file mode 100644 index 0000000000..ab23acef84 --- /dev/null +++ b/boards/bluepill-stm32f030c8/include/periph_conf.h @@ -0,0 +1,153 @@ +/* + * Copyright (C) 2020 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_bluepill-stm32f030c8 + * @{ + * + * @file + * @brief Peripheral MCU configuration for the bluepill-stm32f030c8 board + * + * @author Alexandre Abadie + * @author Benjamin Valentin + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +/* This board provides a LSE */ +#ifndef CONFIG_BOARD_HAS_LSE +#define CONFIG_BOARD_HAS_LSE 1 +#endif + +/* This board provides an HSE */ +#ifndef CONFIG_BOARD_HAS_HSE +#define CONFIG_BOARD_HAS_HSE 1 +#endif + +#include "clk_conf.h" +#include "cfg_i2c1_pb8_pb9.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Timer configuration + * @{ + */ +static const timer_conf_t timer_config[] = { + { + .dev = TIM1, + .max = 0x0000ffff, + .rcc_mask = RCC_APB2ENR_TIM1EN, + .bus = APB2, + .irqn = TIM1_CC_IRQn + }, + { + .dev = TIM3, + .max = 0x0000ffff, + .rcc_mask = RCC_APB1ENR_TIM3EN, + .bus = APB1, + .irqn = TIM3_IRQn + }, +}; + +#define TIMER_0_ISR (isr_tim1_cc) +#define TIMER_1_ISR (isr_tim3) + +#define TIMER_NUMOF ARRAY_SIZE(timer_config) +/** @} */ + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = USART1, + .rcc_mask = RCC_APB2ENR_USART1EN, + .rx_pin = GPIO_PIN(PORT_A, 10), + .tx_pin = GPIO_PIN(PORT_A, 9), + .rx_af = GPIO_AF1, + .tx_af = GPIO_AF1, + .bus = APB2, + .irqn = USART1_IRQn + } +}; + +#define UART_0_ISR (isr_usart1) + +#define UART_NUMOF ARRAY_SIZE(uart_config) +/** @} */ + +/** + * @name PWM configuration + * @{ + */ +static const pwm_conf_t pwm_config[] = { + { + .dev = TIM3, + .rcc_mask = RCC_APB1ENR_TIM3EN, + .chan = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0}, + { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1}, + { .pin = GPIO_UNDEF, .cc_chan = 0}, + { .pin = GPIO_UNDEF, .cc_chan = 0} }, + .af = GPIO_AF1, + .bus = APB1 + } +}; + +#define PWM_NUMOF ARRAY_SIZE(pwm_config) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { + .dev = SPI1, + .mosi_pin = GPIO_PIN(PORT_A, 7), + .miso_pin = GPIO_PIN(PORT_A, 6), + .sclk_pin = GPIO_PIN(PORT_A, 5), + .cs_pin = GPIO_PIN(PORT_B, 1), + .mosi_af = GPIO_AF0, + .miso_af = GPIO_AF0, + .sclk_af = GPIO_AF0, + .cs_af = GPIO_AF0, + .rccmask = RCC_APB2ENR_SPI1EN, + .apbbus = APB2 + }, +}; + +#define SPI_NUMOF ARRAY_SIZE(spi_config) +/** @} */ + +/** + * @name ADC configuration + * @{ + */ +static const adc_conf_t adc_config[] = { + { GPIO_PIN(PORT_A, 0), 0 }, + { GPIO_PIN(PORT_A, 1), 1 }, + { GPIO_PIN(PORT_A, 2), 2 }, + { GPIO_PIN(PORT_A, 3), 3 }, + { GPIO_PIN(PORT_A, 4), 4 }, + { GPIO_PIN(PORT_A, 5), 5 } +}; + +#define ADC_NUMOF ARRAY_SIZE(adc_config) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */