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Merge pull request #2059 from jfischer-phytec-iot/wip@mkw2xd

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RIOT port for the MKW22D512 SiP and Phytec PBA-D-01 PhyWave Evaluations-Board
This commit is contained in:
Johann Fischer 2015-05-15 10:01:56 +02:00
commit 1d46291d49
27 changed files with 11665 additions and 0 deletions
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4
boards/pba-d-01-kw2x/Makefile Normal file
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# tell the Makefile.base which module to build
MODULE = $(BOARD)_base
include $(RIOTBASE)/Makefile.base

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boards/pba-d-01-kw2x/Makefile.features Normal file
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FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_random
FEATURES_PROVIDED += periph_cpuid

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boards/pba-d-01-kw2x/Makefile.include Normal file
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# define the cpu used by the phyWAVE-KW22 board
export CPU = kw2x
export CPU_MODEL = kw21d256
#export CPU_MODEL = kw21d512
#export CPU_MODEL = kw22d512
#define the default port depending on the host OS
OS := $(shell uname)
ifeq ($(OS),Linux)
PORT ?= /dev/ttyACM0
else ifeq ($(OS),Darwin)
PORT ?= $(shell ls -1 /dev/tty.SLAB_USBtoUART* | head -n 1)
else
$(info CAUTION: No flash tool for your host system found!)
endif
export PORT
# define tools used for building the project
export PREFIX = arm-none-eabi-
export CC = $(PREFIX)gcc
export AR = $(PREFIX)ar
export AS = $(PREFIX)as
export LINK = $(PREFIX)gcc
export SIZE = $(PREFIX)size
export OBJCOPY = $(PREFIX)objcopy
export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm
export FLASHER = $(RIOTBOARD)/$(BOARD)/dist/flash.sh
export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh
export RESET = $(RIOTBOARD)/$(BOARD)/dist/reset.sh
export DEBUGSERVER = openocd
# define build specific options
CPU_USAGE = -mcpu=cortex-m4
FPU_USAGE =
export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin
export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian
export LINKFLAGS += -g3 -ggdb -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles
export LINKFLAGS += -T$(LINKERSCRIPT)
export OFLAGS = -O binary
export FFLAGS = $(HEXFILE)
export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(ELFFILE)
export TERMFLAGS = -p $(PORT)
# use newLib nano-specs if available
ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null </dev/null ; echo $$?),0)
export LINKFLAGS += -specs=nano.specs -lc -lnosys
endif
# export board specific includes to the global includes-listing
export INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include

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boards/pba-d-01-kw2x/board.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2014 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup board_pba-d-01
* @{
*
* @file
* @brief Board specific implementations for the Phytec PBA-D-01
* evaluation board for PWA-A-002 Module
*
* @author Johann Fischer <j.fischer@phytec.de>
*
* @}
*/
#include "board.h"
static void leds_init(void);
void board_init(void)
{
leds_init();
cpu_init();
}
/**
* @brief Initialize the boards on-board RGB-LED
*
*/
static void leds_init(void)
{
/* enable clock */
LED_B_PORT_CLKEN();
LED_G_PORT_CLKEN();
LED_R_PORT_CLKEN();
/* configure pins as gpio */
LED_B_PORT->PCR[LED_B_PIN] = PORT_PCR_MUX(1);
LED_G_PORT->PCR[LED_G_PIN] = PORT_PCR_MUX(1);
LED_R_PORT->PCR[LED_R_PIN] = PORT_PCR_MUX(1);
LED_B_GPIO->PDDR |= (1 << LED_B_PIN);
LED_G_GPIO->PDDR |= (1 << LED_G_PIN);
LED_R_GPIO->PDDR |= (1 << LED_R_PIN);
/* turn all LEDs off */
LED_B_GPIO->PSOR |= (1 << LED_B_PIN);
LED_G_GPIO->PSOR |= (1 << LED_G_PIN);
LED_R_GPIO->PSOR |= (1 << LED_R_PIN);
}

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boards/pba-d-01-kw2x/dist/debug.sh vendored Executable file
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#!/bin/bash
# Based on iot-lab_M3 debug.sh script.
# Author: Jonas Remmert j.remmert@phytec.de
red='\033[0;31m'
green='\033[0;32m'
NC='\033[0m'
openocd -f "$RIOTBASE/boards/pba-d-01-kw2x/dist/mkw22d512.cfg" \ #"${RIOTBOARD}/${BOARD}/dist/mkw22d512.cfg" \
-c "tcl_port 6333" \
-c "telnet_port 4444" \
-c "init" \
-c "targets" \
-c "reset halt" \
-l /dev/null &
# save pid to terminate afterwards
OCD_PID=$?
# needed for openocd to set up
sleep 1
retval=$(arm-none-eabi-readelf -x .fcfield $2 | awk '/0x00000400/ {print $2 $3 $4 $5}')
unlocked_fcfield="fffffffffffffffffffffffffeffffff"
if [ "$retval" == "$unlocked_fcfield" ]; then
echo -e "Flash configuration tested...${green} [OK]${NC}"
arm-none-eabi-gdb -tui --command=${1} ${2}
#cgdb -d arm-none-eabi-gdb --command=${1} ${2}
else
echo "Hexdump, .fcfield of $2"
retval=$(arm-none-eabi-readelf -x .fcfield $2)
echo $retval
echo -e "Fcfield not fitting to MKW22Dxxx, danger of bricking the device during flash...${red} [ABORT]${NC}"
fi
kill ${OCD_PID}

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boards/pba-d-01-kw2x/dist/flash.sh vendored Executable file
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#!/bin/bash
# Based on iot-lab_M3 debug.sh script.
# Author: Jonas Remmert j.remmert@phytec.de
elffile=`echo $1 | sed 's/.hex/.elf/'`
red='\033[0;31m'
green='\033[0;32m'
NC='\033[0m'
echo The file: $elffile will be flashed to the board: $BOARD .
#echo Press y to proceed, v to proceed with verify or any other key to abort.
#read x
retval=$(arm-none-eabi-readelf -x .fcfield $elffile | awk '/0x00000400/ {print $2 $3 $4 $5}')
unlocked_fcfield="fffffffffffffffffffffffffeffffff"
if [ "$retval" != "$unlocked_fcfield" ]; then
echo "Hexdump, .fcfield of $elffile"
retval=$(arm-none-eabi-readelf -x .fcfield $elffile)
echo $retval
echo -e "Fcfield not fitting to MKW2xDxxx, danger of bricking the device during flash...${red} [ABORT]${NC}"
exit 0
fi
echo -e "Flash configuration tested...${green} [OK]${NC}"
# flash without verify
#if [ $x = "y" ] || [ $x = "v" ];# -o $x -eq v ];
#then
echo -e "${red}Flashing device, do not disconnect or reset the target until this script exits!!!${NC}"
openocd -f "$RIOTBASE/boards/pba-d-01-kw2x/dist/mkw22d512.cfg" \
-c "init" \
-c "reset halt" \
-c "flash write_image erase $elffile" \
-c "reset run" \
-c "exit"
#fi
# verify
#if [ "$x" = "v" ];
#then
#echo -e "${red}Flashing device, do not disconnect or reset the target until this script exits!!!${NC}"
#openocd -f "$RIOTBASE/boards/pba-d-01-kw2x/dist/mkw22d512.cfg" \
# -c "init" \
# -c "reset halt" \
# -c "verify_image $elffile" \
# -c "reset run" \
# -c "exit"
#fi
echo -e "${green}done...${NC}"

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boards/pba-d-01-kw2x/dist/gdb.conf vendored Normal file
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target remote localhost:3333
monitor reset halt
set print pretty
set arm force-mode thumb

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boards/pba-d-01-kw2x/dist/mkw22d512.cfg vendored Normal file
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#
# Freescale Kinetis kw2xdxxx devices
#
source [find interface/cmsis-dap.cfg]
#
# K21 devices support both JTAG and SWD transports.
#
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME kw22d512
}
# Work-area is a space in RAM used for flash programming
set WORKAREASIZE 0x4000
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x1000
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x2ba01477
}
set _TARGETNAME $_CHIPNAME.cpu
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
#swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; }
# It is important that "kinetis mdm check_security" is called for
# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
# causes "kinetis mdm check_security" to fail the first time openocd
# calls it when it tries to connect after the CPU has been power-cycled.
$_CHIPNAME.cpu configure -event examine-end {
kinetis mdm check_security
}
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
#reset_config srst_only srst_nogate connect_assert_srst
adapter_khz 1000
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
$_TARGETNAME configure -event reset-init {
adapter_khz 24000
}

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boards/pba-d-01-kw2x/dist/pll_freq.m vendored Normal file
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1;
# not a function file:
F = [2405:5:2480];
i = 1;
PLL_INT0 = [];
PLL_FRAC0 = [];
tmp_frac = 0;
tmp_int = 11;
while (i <= length(F))
tmp_frac = (F(i)./32 - tmp_int - 64).*65536;
if tmp_frac >= 65536
tmp_int++;
else
PLL_FRAC0 = [PLL_FRAC0 tmp_frac];
PLL_INT0 = [PLL_INT0 tmp_int];
i++;
endif
endwhile
%F
%Fcalc = ((PLL_INT0 + 64) + (PLL_FRAC0./65536)).*32
%PLL_INT0
%PLL_FRAC0
printf("static const uint8_t pll_int_lt[%d] = {\n", length(F));
for i = 1:4:length(F)
printf(" ");
printf("%d,", PLL_INT0(i:1:i+3));
printf("\n");
endfor
printf("};\n");
printf("\n");
printf("static const uint16_t pll_frac_lt[%d] = {\n", length(F));
for i = 1:4:length(F)
printf(" ");
printf("%d,", PLL_FRAC0(i:1:i+3));
printf("\n");
endfor
printf("};\n\n");
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
POWER_MAX=8;
POWER_MIN=-35;
RANGE_MAX=31;
RANGE_MIN=3;
i = [0:1:abs(diff([POWER_MAX POWER_MIN]))];
pow_lt = round(i .* (RANGE_MAX - RANGE_MIN) ./ length(i) + RANGE_MIN);
printf("static const uint8_t pow_lt[%d] = {", length(pow_lt));
printf(" ");
for i = 0:1:length(pow_lt)-1
if (rem(i,4) == 0)
printf("\n ");
endif
printf("%d,", pow_lt(i+1));
endfor
printf("\n};\n\n");
i = [0:1:abs(diff([RANGE_MAX RANGE_MIN]))];
level_lt = round(i .* (POWER_MAX - POWER_MIN) ./ length(i) + POWER_MIN);
length(level_lt)
printf("static const int level_lt[%d] = {", length(level_lt));
for i = 0:1:length(level_lt)-1
if (rem(i,4) == 0)
printf("\n ");
endif
printf("%d,", level_lt(i+1));
endfor
printf("\n};\n\n");

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boards/pba-d-01-kw2x/dist/reset.sh vendored Executable file
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#!/bin/bash
openocd -f "$RIOTBASE/boards/pba-d-01-kw2x/dist/mkw22d512.cfg" \
-c "init" \
-c "reset run" \
-c "shutdown"

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boards/pba-d-01-kw2x/include/board.h Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2015 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @defgroup board_phywave_eval phyWAVE-KW22 Board
* @ingroup boards
* @brief Board specific implementations for the phyWAVE evaluation board
* @{
*
* @file
* @brief Board specific definitions for the phyWAVE evaluation board
*
* @author Johann Fischer <j.fischer@phytec.de>
*/
#ifndef __BOARD_H
#define __BOARD_H
#include "cpu.h"
#include "periph_conf.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
* Define the nominal CPU core clock in this board
*/
#define F_CPU CLOCK_CORECLOCK
/**
* @name Define UART device and baudrate for stdio
* @{
*/
#define STDIO UART_0
#define STDIO_RX_BUFSIZE (64U)
#define STDIO_BAUDRATE (115200U)
/** @} */
/**
* @name LED pin definitions
* @{
*/
#define LED_R_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK)) /**< Clock Enable for PORTD*/
#define LED_G_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK)) /**< Clock Enable for PORTD*/
#define LED_B_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK)) /**< Clock Enable for PORTA*/
#define LED_R_PORT PORTD /**< PORT for Red LED*/
#define LED_R_GPIO GPIOD /**< GPIO-Device for Red LED*/
#define LED_G_PORT PORTD /**< PORT for Green LED*/
#define LED_G_GPIO GPIOD /**< GPIO-Device for Green LED*/
#define LED_B_PORT PORTA /**< PORT for Blue LED*/
#define LED_B_GPIO GPIOA /**< GPIO-Device for Blue LED*/
#define LED_R_PIN 6 /**< Red LED connected to PINx*/
#define LED_G_PIN 4 /**< Green LED connected to PINx*/
#define LED_B_PIN 4 /**< Blue LED connected to PINx*/
/** @} */
/**
* @name Macros for controlling the on-board LEDs.
* @{
*/
#define LED_B_ON (LED_B_GPIO->PCOR |= (1 << LED_B_PIN))
#define LED_B_OFF (LED_B_GPIO->PSOR |= (1 << LED_B_PIN))
#define LED_B_TOGGLE (LED_B_GPIO->PTOR |= (1 << LED_B_PIN))
#define LED_G_ON (LED_G_GPIO->PCOR |= (1 << LED_G_PIN))
#define LED_G_OFF (LED_G_GPIO->PSOR |= (1 << LED_G_PIN))
#define LED_G_TOGGLE (LED_G_GPIO->PTOR |= (1 << LED_G_PIN))
#define LED_R_ON (LED_R_GPIO->PCOR |= (1 << LED_R_PIN))
#define LED_R_OFF (LED_R_GPIO->PSOR |= (1 << LED_R_PIN))
#define LED_R_TOGGLE (LED_R_GPIO->PTOR |= (1 << LED_R_PIN))
/* for compatability to other boards */
#define LED_GREEN_ON LED_G_ON
#define LED_GREEN_OFF LED_G_OFF
#define LED_GREEN_TOGGLE LED_G_TOGGLE
#define LED_RED_ON LED_R_ON
#define LED_RED_OFF LED_R_OFF
#define LED_RED_TOGGLE LED_R_TOGGLE
/** @} */
/**
* Define the type for the radio packet length for the transceiver
*/
typedef uint8_t radio_packet_length_t;
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /** __BOARD_H */
/** @} */

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/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2014 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup board_pba-d-01-kw2x
* @{
*
* @file
* @name Peripheral MCU configuration for the phyWAVE-KW22 Board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
* @author Jonas Remmert <j.remmert@phytec.de>
*/
#ifndef __PERIPH_CONF_H
#define __PERIPH_CONF_H
#include "cpu-conf.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
* @name Clock system configuration
* @{
*/
#define KINETIS_CPU_USE_MCG 1
#define KINETIS_MCG_USE_ERC 1
#define KINETIS_MCG_USE_PLL 1
#define KINETIS_MCG_DCO_RANGE (24000000U)
#define KINETIS_MCG_ERC_OSCILLATOR 0
#define KINETIS_MCG_ERC_FRDIV 2
#define KINETIS_MCG_ERC_RANGE 1
#define KINETIS_MCG_ERC_FREQ 4000000
#define KINETIS_MCG_PLL_PRDIV 1
#define KINETIS_MCG_PLL_VDIV0 0
#define KINETIS_MCG_PLL_FREQ 48000000
#define CLOCK_CORECLOCK KINETIS_MCG_PLL_FREQ
/** @} */
/**
* @name Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_1_EN 0
#define TIMER_IRQ_PRIO 1
#define TIMER_DEV PIT
#define TIMER_MAX_VALUE (0xffffffff)
#define TIMER_CLOCK CLOCK_CORECLOCK
#define TIMER_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_PIT_MASK))
/* Timer 0 configuration */
#define TIMER_0_PRESCALER_CH 0
#define TIMER_0_COUNTER_CH 1
#define TIMER_0_ISR isr_pit1
#define TIMER_0_IRQ_CHAN PIT1_IRQn
/* Timer 1 configuration */
#define TIMER_1_PRESCALER_CH 2
#define TIMER_1_COUNTER_CH 3
#define TIMER_1_ISR isr_pit3
#define TIMER_1_IRQ_CHAN PIT3_IRQn
/** @} */
/**
* @name UART configuration
* @{
*/
#define UART_NUMOF (1U)
#define UART_0_EN 1
#define UART_1_EN 0
#define UART_IRQ_PRIO 1
#define UART_CLK (48e6)
/* UART 0 device configuration */
#define KINETIS_UART UART_Type
#define UART_0_DEV UART2
#define UART_0_CLKEN() (SIM->SCGC4 |= (SIM_SCGC4_UART2_MASK))
#define UART_0_CLK UART_CLK
#define UART_0_IRQ_CHAN UART2_RX_TX_IRQn
#define UART_0_ISR isr_uart2_rx_tx
/* UART 0 pin configuration */
#define UART_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define UART_0_PORT PORTD
#define UART_0_RX_PIN 2
#define UART_0_TX_PIN 3
#define UART_0_AF 3
/* UART 1 device configuration */
#define UART_1_DEV UART0
#define UART_1_CLKEN() (SIM->SCGC4 |= (SIM_SCGC4_UART0_MASK))
#define UART_1_CLK UART_CLK
#define UART_1_IRQ_CHAN UART0_RX_TX_IRQn
#define UART_1_ISR isr_uart0_rx_tx
/* UART 1 pin configuration */
#define UART_1_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define UART_1_PORT PORTD
#define UART_1_RX_PIN 6
#define UART_1_TX_PIN 7
#define UART_1_AF 3
/** @} */
/**
* @name ADC configuration
* @{
*/
#define ADC_NUMOF (1U)
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 6
/* ADC 0 configuration */
#define ADC_0_DEV ADC0
#define ADC_0_MODULE_CLOCK CLOCK_CORECLOCK
#define ADC_0_CHANNELS 6
#define ADC_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_ADC0_MASK))
#define ADC_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_ADC0_MASK))
#define ADC_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK))
/* ADC 0 channel 0 pin config */
#define ADC_0_CH0 1
#define ADC_0_CH0_PIN 2
#define ADC_0_CH0_PIN_AF 0
#define ADC_0_CH0_PORT PORTE
/* ADC 0 channel 1 pin config */
#define ADC_0_CH1 1 /* PTE3 uses the same ADC_CH as PTE2, in single channel mode only one of them can be selected */
#define ADC_0_CH1_PIN 3
#define ADC_0_CH1_PIN_AF 0
#define ADC_0_CH1_PORT PORTE
/* ADC 0 channel 2 pin config */
#define ADC_0_CH2 22
#define ADC_0_CH2_PIN 7
#define ADC_0_CH2_PIN_AF 0
#define ADC_0_CH2_PORT PORTD
/* ADC 0 channel 3 pin config */
#define ADC_0_CH3 6
#define ADC_0_CH3_PIN 5
#define ADC_0_CH3_PIN_AF 0
#define ADC_0_CH3_PORT PORTD
/* ADC 0 channel 4 pin config */
#define ADC_0_CH4 10
#define ADC_0_CH4_PIN 0
#define ADC_0_CH4_PIN_AF 0
#define ADC_0_CH4_PORT PORTE
/* ADC 0 channel 5 pin config */
#define ADC_0_CH5 11
#define ADC_0_CH5_PIN 1
#define ADC_0_CH5_PIN_AF 0
#define ADC_0_CH5_PORT PORTE
/** @} */
/**
* @name PWM configuration
* @{
*/
#define PWM_NUMOF (1U)
#define PWM_0_EN 1
#define PWM_MAX_CHANNELS 4
/* PWM 0 device configuration */
#define PWM_0_DEV FTM0
#define PWM_0_CHANNELS 3
#define PWM_0_CLK (48e6)
#define PWM_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_FTM0_MASK))
#define PWM_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_FTM0_MASK))
/* PWM 0 pin configuration */
#define PWM_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTA_MASK))
#define PWM_0_PIN_CH0 4
#define PWM_0_FTMCHAN_CH0 1
#define PWM_0_PORT_CH0 PORTA
#define PWM_0_PIN_AF_CH0 3
#define PWM_0_PIN_CH1 4
#define PWM_0_FTMCHAN_CH1 4
#define PWM_0_PORT_CH1 PORTD
#define PWM_0_PIN_AF_CH1 4
#define PWM_0_PIN_CH2 6
#define PWM_0_FTMCHAN_CH2 6
#define PWM_0_PORT_CH2 PORTD
#define PWM_0_PIN_AF_CH2 4
#define PWM_0_PIN_CH3 1
#define PWM_0_FTMCHAN_CH3 1
#define PWM_0_PORT_CH3 PORTA
#define PWM_0_PIN_AF_CH3 3
/** @} */
/**
* @name SPI configuration
* @{
*/
#define SPI_NUMOF (2U)
#define SPI_0_EN 1
#define SPI_1_EN 1
#define SPI_IRQ_PRIO 1
#define KINETIS_SPI_USE_HW_CS 1
/* SPI 0 device config */
#define SPI_0_DEV SPI0
#define SPI_0_INDEX 0
#define SPI_0_CTAS 0
#define SPI_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_SPI0_MASK))
#define SPI_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_SPI0_MASK))
#define SPI_0_IRQ SPI0_IRQn
#define SPI_0_IRQ_HANDLER isr_spi0
#define SPI_0_FREQ (48e6)
/* SPI 0 pin configuration */
#define SPI_0_PORT PORTC
#define SPI_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK))
#define SPI_0_AF 2
#define SPI_0_PCS0_PIN 4
#define SPI_0_SCK_PIN 5
#define SPI_0_SOUT_PIN 6
#define SPI_0_SIN_PIN 7
#define SPI_0_PCS0_ACTIVE_LOW 1
/* SPI 1 device config */
#define SPI_1_DEV SPI1
#define SPI_1_INDEX 1
#define SPI_1_CTAS 0
#define SPI_1_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_SPI1_MASK))
#define SPI_1_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_SPI1_MASK))
#define SPI_1_IRQ SPI1_IRQn
#define SPI_1_IRQ_HANDLER isr_spi1
#define SPI_1_FREQ (48e6)
/* SPI 1 pin1configuration */
#define SPI_1_PORT KW2XDRF_PORT
#define SPI_1_PORT_CLKEN() KW2XDRF_PORT_CLKEN();
#define SPI_1_AF KW2XDRF_PIN_AF
#define SPI_1_PCS0_PIN KW2XDRF_PCS0_PIN
#define SPI_1_SCK_PIN KW2XDRF_SCK_PIN
#define SPI_1_SOUT_PIN KW2XDRF_SOUT_PIN
#define SPI_1_SIN_PIN KW2XDRF_SIN_PIN
#define SPI_1_PCS0_ACTIVE_LOW 1
/** @} */
/**
* @name I2C configuration
* @{
*/
#define I2C_NUMOF (1U)
#define I2C_CLK (48e6)
#define I2C_0_EN 1
#define I2C_IRQ_PRIO 1
/* Low (10 kHz): MUL = 4, SCL divider = 2560, total: 10240 */
#define KINETIS_I2C_F_ICR_LOW (0x3D)
#define KINETIS_I2C_F_MULT_LOW (2)
/* Normal (100 kHz): MUL = 2, SCL divider = 240, total: 480 */
#define KINETIS_I2C_F_ICR_NORMAL (0x1F)
#define KINETIS_I2C_F_MULT_NORMAL (1)
/* Fast (400 kHz): MUL = 1, SCL divider = 128, total: 128 */
#define KINETIS_I2C_F_ICR_FAST (0x17)
#define KINETIS_I2C_F_MULT_FAST (0)
/* Fast plus (1000 kHz): MUL = 1, SCL divider = 48, total: 48 */
#define KINETIS_I2C_F_ICR_FAST_PLUS (0x10)
#define KINETIS_I2C_F_MULT_FAST_PLUS (0)
/* I2C 0 device configuration */
#define I2C_0_DEV I2C1
#define I2C_0_CLKEN() (SIM->SCGC4 |= (SIM_SCGC4_I2C1_MASK))
#define I2C_0_CLKDIS() (SIM->SCGC4 &= ~(SIM_SCGC4_I2C1_MASK))
#define I2C_0_IRQ I2C1_IRQn
#define I2C_0_IRQ_HANDLER isr_i2c1
/* I2C 0 pin configuration */
#define I2C_0_PORT PORTE
#define I2C_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define I2C_0_PIN_AF 6
#define I2C_0_SDA_PIN 0
#define I2C_0_SCL_PIN 1
#define I2C_0_PORT_CFG (PORT_PCR_MUX(I2C_0_PIN_AF) | PORT_PCR_ODE_MASK)
/** @} */
/**
* @name GPIO configuration
* @{
*/
#define GPIO_NUMOF 8
#define GPIO_0_EN 1
#define GPIO_1_EN 1
#define GPIO_2_EN 1
#define GPIO_3_EN 1
#define GPIO_4_EN 1
#define GPIO_5_EN 1
#define GPIO_6_EN 0
#define GPIO_7_EN 0
#define GPIO_8_EN 0 /* I2CSDA */
#define GPIO_9_EN 0 /* I2CSCL */
#define GPIO_10_EN 0
#define GPIO_11_EN 0
#define GPIO_12_EN 0
#define GPIO_13_EN 0 /* USB VOUT 3V3 */
#define GPIO_14_EN 0 /* USB VREGIN */
#define GPIO_15_EN 0
#define GPIO_16_EN 0
#define GPIO_17_EN 0
#define GPIO_18_EN 0
#define GPIO_19_EN 0 /* SPI0_CS0 */
#define GPIO_20_EN 0 /* SPI0_CLK */
#define GPIO_21_EN 0 /* SPI0_MOSI */
#define GPIO_22_EN 0 /* SPI0_MISO */
#define GPIO_23_EN 1 /* KW2XRF INT */
#define GPIO_24_EN 1 /* KW2XRF CS */
#define GPIO_IRQ_PRIO 1
#define ISR_PORT_A isr_porta
#define ISR_PORT_B isr_portb
#define ISR_PORT_C isr_portc
#define ISR_PORT_D isr_portd
/* GPIO channel 0 config */
#define GPIO_0_DEV GPIOD /* DIO9; extension connecotr D9; LED_G */
#define GPIO_0_PORT PORTD
#define GPIO_0_PORT_BASE PORTD_BASE
#define GPIO_0_PIN 4
#define GPIO_0_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define GPIO_0_IRQ PORTD_IRQn
/* GPIO channel 1 config */
#define GPIO_1_DEV GPIOD /* DIO11; extension connecotr D5; LED_R */
#define GPIO_1_PORT PORTD
#define GPIO_1_PORT_BASE PORTD_BASE
#define GPIO_1_PIN 6
#define GPIO_1_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define GPIO_1_IRQ PORTD_IRQn
/* GPIO channel 2 config */
#define GPIO_2_DEV GPIOA /* DIO27; extension connecotr D3; LED_B */
#define GPIO_2_PORT PORTA
#define GPIO_2_PORT_BASE PORTA_BASE
#define GPIO_2_PIN 4
#define GPIO_2_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK))
#define GPIO_2_IRQ PORTA_IRQn
/* GPIO channel 3 config */
#define GPIO_3_DEV GPIOD /* DIO06; extension connecotr --; User_Button */
#define GPIO_3_PORT PORTD
#define GPIO_3_PORT_BASE PORTD_BASE
#define GPIO_3_PIN 1
#define GPIO_3_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define GPIO_3_IRQ PORTD_IRQn
/* GPIO channel 4 config */
#define GPIO_4_DEV GPIOE /* DIO17; extension connecotr D2 */
#define GPIO_4_PORT PORTE
#define GPIO_4_PORT_BASE PORTE_BASE
#define GPIO_4_PIN 4
#define GPIO_4_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_4_IRQ PORTE_IRQn
/* GPIO channel 5 config */
#define GPIO_5_DEV GPIOA /* DIO29; extension connecotr D4 */
#define GPIO_5_PORT PORTA
#define GPIO_5_PORT_BASE PORTA_BASE
#define GPIO_5_PIN 19
#define GPIO_5_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK))
#define GPIO_5_IRQ PORTA_IRQn
/* GPIO channel 6 config */
#define GPIO_6_DEV GPIOD /* DIO10; extension connecotr A3 */
#define GPIO_6_PORT PORTD
#define GPIO_6_PORT_BASE PORTD_BASE
#define GPIO_6_PIN 5
#define GPIO_6_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define GPIO_6_IRQ PORTD_IRQn
/* GPIO channel 7 config */
#define GPIO_7_DEV GPIOD /* DIO12; extension connecotr A2 */
#define GPIO_7_PORT PORTD
#define GPIO_7_PORT_BASE PORTD_BASE
#define GPIO_7_PIN 7
#define GPIO_7_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define GPIO_7_IRQ PORTD_IRQn
/* GPIO channel 8 config */
#define GPIO_8_DEV GPIOE /* DIO13; extension connecotr A4; I2CSDA */
#define GPIO_8_PORT PORTE
#define GPIO_8_PORT_BASE PORTE_BASE
#define GPIO_8_PIN 0
#define GPIO_8_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_8_IRQ PORTE_IRQn
/* GPIO channel 9 config */
#define GPIO_9_DEV GPIOE /* DIO14; extension connecotr A5; I2CSCL */
#define GPIO_9_PORT PORTE
#define GPIO_9_PORT_BASE PORTE_BASE
#define GPIO_9_PIN 1
#define GPIO_9_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_9_IRQ PORTE_IRQn
/* GPIO channel 10 config */
#define GPIO_10_DEV GPIOE /* DIO15; extension connecotr A0 */
#define GPIO_10_PORT PORTE
#define GPIO_10_PORT_BASE PORTE_BASE
#define GPIO_10_PIN 2
#define GPIO_10_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_10_IRQ PORTE_IRQn
/* GPIO channel 11 config */
#define GPIO_11_DEV GPIOE /* DIO16; extension connecotr A1 */
#define GPIO_11_PORT PORTE
#define GPIO_11_PORT_BASE PORTE_BASE
#define GPIO_11_PIN 3
#define GPIO_11_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_11_IRQ PORTE_IRQn
/* GPIO channel 12 config */
#define GPIO_12_DEV GPIOD /* DIO7; extension connecotr D0; UART2_RX */
#define GPIO_12_PORT PORTD
#define GPIO_12_PORT_BASE PORTD_BASE
#define GPIO_12_PIN 2
#define GPIO_12_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define GPIO_12_IRQ PORTD_IRQn
/* GPIO channel 13 config */
#define GPIO_13_DEV GPIOE /* DIO20; extension connecotr D14, USB OUT3V3 */
#define GPIO_13_PORT PORTE
#define GPIO_13_PORT_BASE PORTE_BASE
#define GPIO_13_PIN 18
#define GPIO_13_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_13_IRQ PORTE_IRQn
/* GPIO channel 14 config */
#define GPIO_14_DEV GPIOE /* DIO21; extension connecotr D15, USB VREGIN */
#define GPIO_14_PORT PORTE
#define GPIO_14_PORT_BASE PORTE_BASE
#define GPIO_14_PIN 19
#define GPIO_14_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
#define GPIO_14_IRQ PORTE_IRQn
/* GPIO channel 15 config */
#define GPIO_15_DEV GPIOA /* DIO24; extension connecotr D7 */
#define GPIO_15_PORT PORTA
#define GPIO_15_PORT_BASE PORTA_BASE
#define GPIO_15_PIN 1
#define GPIO_15_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK))
#define GPIO_15_IRQ PORTA_IRQn
/* GPIO channel 16 config */
#define GPIO_16_DEV GPIOA /* DIO25; extension connecotr D6 */
#define GPIO_16_PORT PORTA
#define GPIO_16_PORT_BASE PORTA_BASE
#define GPIO_16_PIN 2
#define GPIO_16_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK))
#define GPIO_16_IRQ PORTA_IRQn
/* GPIO channel 17 config */
#define GPIO_17_DEV GPIOA /* DIO28; extension connecotr D8 */
#define GPIO_17_PORT PORTA
#define GPIO_17_PORT_BASE PORTA_BASE
#define GPIO_17_PIN 18
#define GPIO_17_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK))
#define GPIO_17_IRQ PORTA_IRQn
/* GPIO channel 18 config */
#define GPIO_18_DEV GPIOD /* DIO8; extension connecotr D1; UART2_TX */
#define GPIO_18_PORT PORTD
#define GPIO_18_PORT_BASE PORTD_BASE
#define GPIO_18_PIN 3
#define GPIO_18_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
#define GPIO_18_IRQ PORTD_IRQn
/* GPIO channel 19 config */
#define GPIO_19_DEV GPIOC /* DIO2; extension connecotr D10; SPI0_CS0 */
#define GPIO_19_PORT PORTC
#define GPIO_19_PORT_BASE PORTC_BASE
#define GPIO_19_PIN 4
#define GPIO_19_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK))
#define GPIO_19_IRQ PORTC_IRQn
/* GPIO channel 20 config */
#define GPIO_20_DEV GPIOC /* DIO3; extension connecotr D13; SPI0_CLK */
#define GPIO_20_PORT PORTC
#define GPIO_20_PORT_BASE PORTC_BASE
#define GPIO_20_PIN 5
#define GPIO_20_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK))
#define GPIO_20_IRQ PORTC_IRQn
/* GPIO channel 21 config */
#define GPIO_21_DEV GPIOC /* DIO4; extension connecotr D11; SPI0_MOSI */
#define GPIO_21_PORT PORTC
#define GPIO_21_PORT_BASE PORTC_BASE
#define GPIO_21_PIN 6
#define GPIO_21_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK))
#define GPIO_21_IRQ PORTC_IRQn
/* GPIO channel 22 config */
#define GPIO_22_DEV GPIOC /* DIO5; extension connecotr D12; SPI0_MISO */
#define GPIO_22_PORT PORTC
#define GPIO_22_PORT_BASE PORTC_BASE
#define GPIO_22_PIN 7
#define GPIO_22_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK))
#define GPIO_22_IRQ PORTC_IRQn
/* GPIO channel 23 config */
#define GPIO_23_DEV KW2XDRF_GPIO
#define GPIO_23_PORT KW2XDRF_PORT
#define GPIO_23_PORT_BASE KW2XDRF_PORT_BASE
#define GPIO_23_PIN KW2XDRF_IRQ_PIN
#define GPIO_23_CLKEN() KW2XDRF_PORT_CLKEN()
#define GPIO_23_IRQ KW2XDRF_PORT_IRQn
#define GPIO_KW2XDRF GPIO_23
/* GPIO channel 24 config */
#define GPIO_24_DEV KW2XDRF_GPIO
#define GPIO_24_PORT KW2XDRF_PORT
#define GPIO_24_PORT_BASE KW2XDRF_PORT_BASE
#define GPIO_24_PIN KW2XDRF_PCS0_PIN
#define GPIO_24_CLKEN() KW2XDRF_PORT_CLKEN()
#define GPIO_24_IRQ KW2XDRF_PORT_IRQn
#define KW2XRF_CS_GPIO GPIO_24
/** @} */
/**
* @name RTT and RTC configuration
* @{
*/
#define RTT_NUMOF (1U)
#define RTC_NUMOF (1U)
#define RTT_DEV RTC
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_UNLOCK() (SIM->SCGC6 |= (SIM_SCGC6_RTC_MASK))
#define RTT_ISR isr_rtc
#define RTT_FREQUENCY (1)
#define RTT_MAX_VALUE (0xffffffff)
/** @} */
/**
* @name Random Number Generator configuration
* @{
*/
#define RANDOM_NUMOF (1U)
#define KINETIS_RNGA RNG
#define RANDOM_CLKEN() (SIM->SCGC6 |= (1 << 9))
#define RANDOM_CLKDIS() (SIM->SCGC6 &= ~(1 << 9))
/** @} */
/**
* @name Radio configuration (kw2xrf)
* @{
*/
#define KW2XRF_SHARED_SPI 0
#define KW2XRF_SPI SPI_1
#define KW2XRF_SPI_SPEED SPI_SPEED_10MHZ
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __PERIPH_CONF_H */
/** @} */

257
cpu/kinetis_common/ldscripts/kinetis-noramcode.ld Normal file
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@ -0,0 +1,257 @@
/* RAM limits */
__sram_start = ORIGIN(sram);
__sram_length = LENGTH(sram);
__sram_end = __sram_start + __sram_length;
_ramcode_start = 0x0;
_ramcode_end = 0x0;
_ramcode_load = 0x0;
/* Define the default stack size for interrupt mode. As no context is
saved on this stack and ISRs are supposed to be short, it can be fairly
small. 512 byte should be a safe assumption here */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x800;
RAMVECT_SIZE = DEFINED(RAMVECT_SIZE) ? RAMVECT_SIZE : 0;
SECTIONS
{
/* Interrupt vectors 0x00-0x3ff. */
.vector_table :
{
_vector_rom = .;
KEEP(*(.isr_vector))
KEEP(*(.vector_table))
} > vectors
ASSERT (SIZEOF(.vector_table) == 0x400, "Interrupt vector table of invalid size.")
ASSERT (ADDR(.vector_table) == 0x00000000, "Interrupt vector table at invalid location (linker-script error?)")
ASSERT (LOADADDR(.vector_table) == 0x00000000, "Interrupt vector table at invalid location (linker-script error?)")
/* Flash configuration field, very important in order to not accidentally lock the device */
/* Flash configuration field 0x400-0x40f. */
.fcfield :
{
. = ALIGN(4);
KEEP(*(.fcfield))
. = ALIGN(4);
} > flashsec
ASSERT (SIZEOF(.fcfield) == 0x10, "Flash configuration field of invalid size (linker-script error?)")
ASSERT (ADDR(.fcfield) == 0x400, "Flash configuration field at invalid position (linker-script error?)")
ASSERT (LOADADDR(.fcfield) == 0x400, "Flash configuration field at invalid position (linker-script error?)")
/* Program code 0x410-. */
.text :
{
. = ALIGN(4);
_text_load = LOADADDR(.text);
_text_start = .;
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(SORT(.preinit_array.*)))
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* fini data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
KEEP (*(SORT_NONE(.init)))
KEEP (*(SORT_NONE(.fini)))
/* Default ISR handlers */
KEEP(*(.default_handlers))
*(.text.unlikely .text.*_unlikely .text.unlikely.*)
*(.text.exit .text.exit.*)
*(.text.startup .text.startup.*)
*(.text.hot .text.hot.*)
*(.text .stub .text.* .gnu.linkonce.t.*)
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
KEEP (*crtbeginTS.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*crtbeginTS.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4);
_rodata_start = .;
*(.rodata .rodata* .gnu.linkonce.r.*)
. = ALIGN(4);
_rodata_end = .;
_text_end = .;
} > flash
/* The .extab, .exidx sections are used for C++ exception handling */
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > flash
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > flash
PROVIDE_HIDDEN (__exidx_end = .);
.eh_frame_hdr :
{
*(.eh_frame_hdr)
} > flash
.eh_frame : ONLY_IF_RO
{
KEEP (*(.eh_frame))
} > flash
.gcc_except_table : ONLY_IF_RO
{
*(.gcc_except_table .gcc_except_table.*)
} > flash
. = ALIGN(4);
_etext = .;
/*
* Allocate space for interrupt vector in RAM
* This can safely be removed to free up 0x100 bytes of RAM if the code does
* not make use of this CPU feature.
*/
.ramvect :
{
. = ALIGN(4);
_vector_ram_start = .;
. = _vector_ram_start + RAMVECT_SIZE;
. = ALIGN(4);
_vector_ram_end = .;
} > sram
/* Program data, values stored in flash and loaded upon init. */
.relocate : AT (_etext)
{
. = ALIGN(4);
_data_load = LOADADDR(.relocate);
_data_start = .;
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
_data_end = .;
} > sram
/* .bss section, zeroed out during init. */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
__bss_start = .;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
__bss_end = .;
_ezero = .;
} > sram
/* Make sure we set _end, in case we want dynamic memory management... */
_end = .;
__end = .;
__end__ = .;
PROVIDE(end = .);
. = ALIGN(8);
HEAP_SIZE = ORIGIN(sram) + LENGTH(sram) - STACK_SIZE - .;
.heap (NOLOAD):
{
_heap_start = .;
PROVIDE(__heap_start = .);
. = . + HEAP_SIZE;
_heap_end = .;
PROVIDE(__heap_max = .);
} > sram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
_estack = .;
} > sram
/* Any debugging sections */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* DWARF Extension. */
.debug_macro 0 : { *(.debug_macro) }
/* XXX: what is the purpose of these sections? */
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
}

7
cpu/kw2x/Makefile Normal file
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@ -0,0 +1,7 @@
# define the module that is build
MODULE = cpu
# add a list of subdirectories, that should also be build
DIRS = periph $(CORTEX_M4_COMMON) $(KINETIS_COMMON)
include $(RIOTBASE)/Makefile.base

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# this CPU implementation is using the explicit core/CPU interface
export CFLAGS += -DCOREIF_NG=1
# export the peripheral drivers to be linked into the final binary
export USEMODULE += periph
# tell the build system that the CPU depends on the Cortex-M common files
export USEMODULE += cortex-m4_common
# tell the build system that the CPU depends on the Kinetis common files
export USEMODULE += kinetis_common
# define path to cortex-m common module, which is needed for this CPU
export CORTEX_M4_COMMON = $(RIOTCPU)/cortex-m4_common/
# define path to kinetis module, which is needed for this CPU
export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
# CPU depends on the cortex-m common module, so include it
include $(CORTEX_M4_COMMON)Makefile.include
# CPU depends on the kinetis module, so include it
include $(KINETIS_COMMON)Makefile.include
export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
# define the linker script to use for this CPU
export LINKERSCRIPT = $(RIOTCPU)/$(CPU)/$(CPU_MODEL)_linkerscript.ld
#export the CPU model
MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
export CFLAGS += -DCPU_MODEL_$(MODEL)
# include CPU specific includes
export INCLUDES += -I$(RIOTCPU)/$(CPU)/include
# add the CPU specific system calls implementations for the linker
export UNDEF += $(BINDIR)cpu/interrupt-vector.o
export UNDEF += $(BINDIR)cpu/syscalls.o

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/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2014 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kw2x
* @{
*
* @file
* @brief Implementation of the KW2xD CPU initialization
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
* @}
*/
#include <stdint.h>
#include "cpu-conf.h"
#define FLASH_BASE (0x00000000)
static void cpu_clock_init(void);
/**
* @brief Initialize the CPU, set IRQ priorities
*/
void cpu_init(void)
{
/* configure the vector table location to internal flash */
SCB->VTOR = FLASH_BASE;
/* initialize the clock system */
cpu_clock_init();
/* set pendSV interrupt to lowest possible priority */
NVIC_SetPriority(PendSV_IRQn, 0xff);
}
static inline void modem_clock_init(void)
{
SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK);
SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK);
/* Use the CLK_OUT of the modem as the clock source. */
/* Modem RST_B is connected to PTB19 and can be used to reset the modem. */
PORTB->PCR[19] = PORT_PCR_MUX(1);
GPIOB->PDDR |= (1 << 19);
GPIOB->PCOR |= (1 << 19);
/* Modem GPIO5 is connected to PTC0 and can be used to select CLK_OUT frequency, */
/* set PTC0 high for CLK_OUT=32.787kHz and low for CLK_OUT=4MHz. */
PORTC->PCR[0] = PORT_PCR_MUX(1);
GPIOC->PDDR |= (1 << 0);
GPIOC->PCOR |= (1 << 0);
/* Modem IRQ_B is connected to PTB3, modem interrupt request to the MCU. */
PORTB->PCR[KW2XDRF_IRQ_PIN] = PORT_PCR_MUX(1);
GPIOB->PDDR &= ~(1 << KW2XDRF_IRQ_PIN);
/* release the reset */
GPIOB->PSOR |= (1 << 19);
/* wait for modem IRQ_B interrupt request */
while (GPIOB->PDIR & (1 << KW2XDRF_IRQ_PIN));
}
/**
* @brief Configure the controllers clock system
*/
static void cpu_clock_init(void)
{
/* setup system prescalers */
SIM->CLKDIV1 = (uint32_t)SIM_CLKDIV1_OUTDIV4(1);
modem_clock_init();
kinetis_mcg_set_mode(KINETIS_MCG_PEE);
}

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/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2014 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @defgroup cpu_kw2x KW2xD SiP
* @ingroup cpu
* @brief CPU specific implementations for the Freescale KW2xD SiP.
* The SiP incorporates a low power 2.4 GHz transceiver and a
* Kinetis Cortex-M4 MCU.
* @{
*
* @file
* @brief Implementation specific CPU configuration options
*
* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
*/
#ifndef __CPU_CONF_H
#define __CPU_CONF_H
#ifdef CPU_MODEL_KW21D256
#include "MKW22D5.h"
#elif CPU_MODEL_KW21D512
#include "MKW22D5.h"
#elif CPU_MODEL_KW22D512
#include "MKW22D5.h"
#else
#error "undefined CPU_MODEL"
#endif
#include "mcg.h"
#ifdef __cplusplus
extern "C"
{
#endif
/**
* @name Kernel configuration
*
* @{
*/
#define KERNEL_CONF_STACKSIZE_PRINTF (1024)
#ifndef KERNEL_CONF_STACKSIZE_DEFAULT
#define KERNEL_CONF_STACKSIZE_DEFAULT (1024)
#endif
#define KERNEL_CONF_STACKSIZE_IDLE (256)
/** @} */
/**
* @brief Length for reading CPU_ID in octets
*/
#define CPUID_ID_LEN (16)
/**
* @brief Pointer to CPU_ID
*/
#define CPUID_ID_PTR ((void *)(&(SIM_UIDH)))
/**
* @name UART0 buffer size definition for compatibility reasons.
*
* TODO: remove once the remodeling of the uart0 driver is done.
* @{
*/
#ifndef UART0_BUFSIZE
#define UART0_BUFSIZE (128)
#endif
/** @} */
#define TRANSCEIVER_BUFFER_SIZE (3) /**< Buffer Size for Transceiver Module */
/**
* @brief MCU specific Low Power Timer settings.
*/
#define LPTIMER_CLKSRC LPTIMER_CLKSRC_LPO
#define LPTIMER_DEV (LPTMR0) /**< LPTIMER hardware module */
#define LPTIMER_CLKEN() (SIM->SCGC5 |= SIM_SCGC5_LPTMR_MASK) /**< Enable LPTMR0 clock gate */
#define LPTIMER_CLKDIS() (SIM->SCGC5 &= ~SIM_SCGC5_PTMR_MASK) /**< Disable LPTMR0 clock gate */
#define LPTIMER_CNR_NEEDS_LATCHING 1 /**< LPTMR.CNR register do not need latching */
/**
* @name KW2XD SiP internal interconnects between MCU and Modem.
*
* @{
*/
#define KW2XDRF_PORT_BASE PORTB_BASE /**< MCU Port connected to Modem*/
#define KW2XDRF_PORT PORTB /**< MCU Port connected to Modem*/
#define KW2XDRF_GPIO GPIOB /**< GPIO Device connected to Modem */
#define KW2XDRF_PORT_IRQn PORTB_IRQn
#define KW2XDRF_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK)) /**< Clock Enable for PORTB*/
#define KW2XDRF_PIN_AF 2 /**< Pin Muxing Parameter for GPIO Device*/
#define KW2XDRF_PCS0_PIN 10 /**< SPI Slave Select Pin */
#define KW2XDRF_SCK_PIN 11 /**< SPI Clock Output Pin */
#define KW2XDRF_SOUT_PIN 16 /**< SPI Master Data Output Pin */
#define KW2XDRF_SIN_PIN 17 /**< SPI Master Data Input Pin */
#define KW2XDRF_IRQ_PIN 3 /**< Modem's IRQ Output (activ low) */
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __CPU_CONF_H */
/** @} */

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/*
* Copyright (C) 2014 Freie Universität Berlin
* Copyright (C) 2014 PHYTEC Messtechnik GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kw2x
* @{
*
* @file
* @brief Interrupt vector definition for MKW2XDXXX MCUs
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
*
* @}
*/
#include <stdint.h>
#include "cpu-conf.h"
#include "fault_handlers.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _estack;
extern void reset_handler(void);
void dummy_handler(void)
{
isr_unhandled();
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__((weak, alias("dummy_handler")));
/* MKW22D512 specific interrupt vector */
void isr_dma0(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma1(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma2(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma3(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma4(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma5(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma6(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma7(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma8(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma9(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma10(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma11(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma12(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma13(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma14(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma15(void) __attribute__((weak, alias("dummy_handler")));
void isr_dma_error(void) __attribute__((weak, alias("dummy_handler")));
void isr_mcm(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftfl(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftfl_collision(void) __attribute__((weak, alias("dummy_handler")));
void isr_pmc(void) __attribute__((weak, alias("dummy_handler")));
void isr_llwu(void) __attribute__((weak, alias("dummy_handler")));
void isr_wdog_ewm(void) __attribute__((weak, alias("dummy_handler")));
void isr_rng(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2c0(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2c1(void) __attribute__((weak, alias("dummy_handler")));
void isr_spi0(void) __attribute__((weak, alias("dummy_handler")));
void isr_spi1(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2s0_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_i2s0_rx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart0_rx_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart0_err(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart1_rx_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart1_err(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart2_rx_tx(void) __attribute__((weak, alias("dummy_handler")));
void isr_uart2_err(void) __attribute__((weak, alias("dummy_handler")));
void isr_adc0(void) __attribute__((weak, alias("dummy_handler")));
void isr_cmp0(void) __attribute__((weak, alias("dummy_handler")));
void isr_cmp1(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftm0(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftm1(void) __attribute__((weak, alias("dummy_handler")));
void isr_ftm2(void) __attribute__((weak, alias("dummy_handler")));
void isr_cmt(void) __attribute__((weak, alias("dummy_handler")));
void isr_rtc(void) __attribute__((weak, alias("dummy_handler")));
void isr_rtc_seconds(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit0(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit1(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit2(void) __attribute__((weak, alias("dummy_handler")));
void isr_pit3(void) __attribute__((weak, alias("dummy_handler")));
void isr_pdb0(void) __attribute__((weak, alias("dummy_handler")));
void isr_usb0(void) __attribute__((weak, alias("dummy_handler")));
void isr_usbdcd(void) __attribute__((weak, alias("dummy_handler")));
void isr_dac0(void) __attribute__((weak, alias("dummy_handler")));
void isr_mcg(void) __attribute__((weak, alias("dummy_handler")));
void isr_lptmr0(void) __attribute__((weak, alias("dummy_handler")));
void isr_porta(void) __attribute__((weak, alias("dummy_handler")));
void isr_portb(void) __attribute__((weak, alias("dummy_handler")));
void isr_portc(void) __attribute__((weak, alias("dummy_handler")));
void isr_portd(void) __attribute__((weak, alias("dummy_handler")));
void isr_porte(void) __attribute__((weak, alias("dummy_handler")));
void isr_swi(void) __attribute__((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__((section(".vector_table")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void *)(&_estack), /* pointer to the top of the empty stack */
/* Cortex-M4 handlers */
(void *) reset_handler, /* entry point of the program */
(void *) isr_nmi, /* non maskable interrupt handler */
(void *) isr_hard_fault, /* if you end up here its not good */
(void *) isr_mem_manage, /* memory controller interrupt */
(void *) isr_bus_fault, /* also not good to end up here */
(void *) isr_usage_fault, /* autsch */
(void *)(0UL), /* Reserved */
(void *)(0UL), /* Reserved */
(void *)(0UL), /* Reserved */
(void *)(0UL), /* Reserved */
(void *) isr_svc, /* system call interrupt */
(void *) isr_debug_mon, /* debug interrupt */
(void *)(0UL), /* Reserved */
(void *) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void *) isr_systick, /* SysTick interrupt, not used in RIOT */
/* MKW22D512 specific peripheral handlers */
(void *) isr_dma0, /* DMA channel 0 transfer complete */
(void *) isr_dma1, /* DMA channel 1 transfer complete */
(void *) isr_dma2, /* DMA channel 2 transfer complete */
(void *) isr_dma3, /* DMA channel 3 transfer complete */
(void *) isr_dma4, /* DMA channel 4 transfer complete */
(void *) isr_dma5, /* DMA channel 5 transfer complete */
(void *) isr_dma6, /* DMA channel 6 transfer complete */
(void *) isr_dma7, /* DMA channel 7 transfer complete */
(void *) isr_dma8, /* DMA channel 8 transfer complete */
(void *) isr_dma9, /* DMA channel 9 transfer complete */
(void *) isr_dma10, /* DMA channel 10 transfer complete */
(void *) isr_dma11, /* DMA channel 11 transfer complete */
(void *) isr_dma12, /* DMA channel 12 transfer complete */
(void *) isr_dma13, /* DMA channel 13 transfer complete */
(void *) isr_dma14, /* DMA channel 14 transfer complete */
(void *) isr_dma15, /* DMA channel 15 transfer complete */
(void *) isr_dma_error, /* DMA channel 0 - 15 error */
(void *) isr_mcm, /* MCM normal interrupt */
(void *) isr_ftfl, /* FTFL command complete */
(void *) isr_ftfl_collision, /* FTFL read collision */
(void *) isr_pmc, /* PMC controller low-voltage detect low-voltage warning */
(void *) isr_llwu, /* Low leakage wakeup */
(void *) isr_wdog_ewm, /* Single interrupt vector for WDOG and EWM */
(void *) isr_rng, /* Randon number generator */
(void *) isr_i2c0, /* Inter-integrated circuit 0 */
(void *) isr_i2c1, /* Inter-integrated circuit 1 */
(void *) isr_spi0, /* Serial peripheral Interface 0 */
(void *) isr_spi1, /* Serial peripheral Interface 1 */
(void *) isr_i2s0_tx, /* Integrated interchip sound 0 transmit interrupt */
(void *) isr_i2s0_rx, /* Integrated interchip sound 0 receive interrupt */
(void *) dummy_handler, /* Reserved interrupt */
(void *) isr_uart0_rx_tx, /* UART0 receive/transmit interrupt */
(void *) isr_uart0_err, /* UART0 error interrupt */
(void *) isr_uart1_rx_tx, /* UART1 receive/transmit interrupt */
(void *) isr_uart1_err, /* UART1 error interrupt */
(void *) isr_uart2_rx_tx, /* UART2 receive/transmit interrupt */
(void *) isr_uart2_err, /* UART2 error interrupt */
(void *) dummy_handler, /* Reserved interrupt */
(void *) dummy_handler, /* Reserved interrupt */
(void *) isr_adc0, /* Analog-to-digital converter 0 */
(void *) isr_cmp0, /* Comparator 0 */
(void *) isr_cmp1, /* Comparator 1 */
(void *) isr_ftm0, /* FlexTimer module 0 fault overflow and channels interrupt */
(void *) isr_ftm1, /* FlexTimer module 1 fault overflow and channels interrupt */
(void *) isr_ftm2, /* FlexTimer module 2 fault overflow and channels interrupt */
(void *) isr_cmt, /* Carrier modulator transmitter */
(void *) isr_rtc, /* Real time clock */
(void *) isr_rtc_seconds, /* Real time clock seconds */
(void *) isr_pit0, /* Periodic interrupt timer channel 0 */
(void *) isr_pit1, /* Periodic interrupt timer channel 1 */
(void *) isr_pit2, /* Periodic interrupt timer channel 2 */
(void *) isr_pit3, /* Periodic interrupt timer channel 3 */
(void *) isr_pdb0, /* Programmable delay block */
(void *) isr_usb0, /* USB OTG interrupt */
(void *) isr_usbdcd, /* USB charger detect */
(void *) dummy_handler, /* Reserved interrupt */
(void *) isr_dac0, /* Digital-to-analog converter 0 */
(void *) isr_mcg, /* Multipurpose clock generator */
(void *) isr_lptmr0, /* Low power timer interrupt */
(void *) isr_porta, /* Port A pin detect interrupt */
(void *) isr_portb, /* Port B pin detect interrupt */
(void *) isr_portc, /* Port C pin detect interrupt */
(void *) isr_portd, /* Port D pin detect interrupt */
(void *) isr_porte, /* Port E pin detect interrupt */
(void *) isr_swi, /* Software interrupt */
(void *) dummy_handler, /* reserved 81 */
(void *) dummy_handler, /* reserved 82 */
(void *) dummy_handler, /* reserved 83 */
(void *) dummy_handler, /* reserved 84 */
(void *) dummy_handler, /* reserved 85 */
(void *) dummy_handler, /* reserved 86 */
(void *) dummy_handler, /* reserved 87 */
(void *) dummy_handler, /* reserved 88 */
(void *) dummy_handler, /* reserved 89 */
(void *) dummy_handler, /* reserved 90 */
(void *) dummy_handler, /* reserved 91 */
(void *) dummy_handler, /* reserved 92 */
(void *) dummy_handler, /* reserved 93 */
(void *) dummy_handler, /* reserved 94 */
(void *) dummy_handler, /* reserved 95 */
(void *) dummy_handler, /* reserved 96 */
(void *) dummy_handler, /* reserved 97 */
(void *) dummy_handler, /* reserved 98 */
(void *) dummy_handler, /* reserved 99 */
(void *) dummy_handler, /* reserved 100 */
(void *) dummy_handler, /* reserved 101 */
(void *) dummy_handler, /* reserved 102 */
(void *) dummy_handler, /* reserved 103 */
(void *) dummy_handler, /* reserved 104 */
(void *) dummy_handler, /* reserved 105 */
(void *) dummy_handler, /* reserved 106 */
(void *) dummy_handler, /* reserved 107 */
(void *) dummy_handler, /* reserved 108 */
(void *) dummy_handler, /* reserved 109 */
(void *) dummy_handler, /* reserved 110 */
(void *) dummy_handler, /* reserved 111 */
(void *) dummy_handler, /* reserved 112 */
(void *) dummy_handler, /* reserved 113 */
(void *) dummy_handler, /* reserved 114 */
(void *) dummy_handler, /* reserved 115 */
(void *) dummy_handler, /* reserved 116 */
(void *) dummy_handler, /* reserved 117 */
(void *) dummy_handler, /* reserved 118 */
(void *) dummy_handler, /* reserved 119 */
(void *) dummy_handler, /* reserved 120 */
(void *) dummy_handler, /* reserved 121 */
(void *) dummy_handler, /* reserved 122 */
(void *) dummy_handler, /* reserved 123 */
(void *) dummy_handler, /* reserved 124 */
(void *) dummy_handler, /* reserved 125 */
(void *) dummy_handler, /* reserved 126 */
(void *) dummy_handler, /* reserved 127 */
(void *) dummy_handler, /* reserved 128 */
(void *) dummy_handler, /* reserved 129 */
(void *) dummy_handler, /* reserved 130 */
(void *) dummy_handler, /* reserved 131 */
(void *) dummy_handler, /* reserved 132 */
(void *) dummy_handler, /* reserved 133 */
(void *) dummy_handler, /* reserved 134 */
(void *) dummy_handler, /* reserved 135 */
(void *) dummy_handler, /* reserved 136 */
(void *) dummy_handler, /* reserved 137 */
(void *) dummy_handler, /* reserved 138 */
(void *) dummy_handler, /* reserved 139 */
(void *) dummy_handler, /* reserved 140 */
(void *) dummy_handler, /* reserved 141 */
(void *) dummy_handler, /* reserved 142 */
(void *) dummy_handler, /* reserved 143 */
(void *) dummy_handler, /* reserved 144 */
(void *) dummy_handler, /* reserved 145 */
(void *) dummy_handler, /* reserved 146 */
(void *) dummy_handler, /* reserved 147 */
(void *) dummy_handler, /* reserved 148 */
(void *) dummy_handler, /* reserved 149 */
(void *) dummy_handler, /* reserved 150 */
(void *) dummy_handler, /* reserved 151 */
(void *) dummy_handler, /* reserved 152 */
(void *) dummy_handler, /* reserved 153 */
(void *) dummy_handler, /* reserved 154 */
(void *) dummy_handler, /* reserved 155 */
(void *) dummy_handler, /* reserved 156 */
(void *) dummy_handler, /* reserved 157 */
(void *) dummy_handler, /* reserved 158 */
(void *) dummy_handler, /* reserved 159 */
(void *) dummy_handler, /* reserved 160 */
(void *) dummy_handler, /* reserved 161 */
(void *) dummy_handler, /* reserved 162 */
(void *) dummy_handler, /* reserved 163 */
(void *) dummy_handler, /* reserved 164 */
(void *) dummy_handler, /* reserved 165 */
(void *) dummy_handler, /* reserved 166 */
(void *) dummy_handler, /* reserved 167 */
(void *) dummy_handler, /* reserved 168 */
(void *) dummy_handler, /* reserved 169 */
(void *) dummy_handler, /* reserved 170 */
(void *) dummy_handler, /* reserved 171 */
(void *) dummy_handler, /* reserved 172 */
(void *) dummy_handler, /* reserved 173 */
(void *) dummy_handler, /* reserved 174 */
(void *) dummy_handler, /* reserved 175 */
(void *) dummy_handler, /* reserved 176 */
(void *) dummy_handler, /* reserved 177 */
(void *) dummy_handler, /* reserved 178 */
(void *) dummy_handler, /* reserved 179 */
(void *) dummy_handler, /* reserved 180 */
(void *) dummy_handler, /* reserved 181 */
(void *) dummy_handler, /* reserved 182 */
(void *) dummy_handler, /* reserved 183 */
(void *) dummy_handler, /* reserved 184 */
(void *) dummy_handler, /* reserved 185 */
(void *) dummy_handler, /* reserved 186 */
(void *) dummy_handler, /* reserved 187 */
(void *) dummy_handler, /* reserved 188 */
(void *) dummy_handler, /* reserved 189 */
(void *) dummy_handler, /* reserved 190 */
(void *) dummy_handler, /* reserved 191 */
(void *) dummy_handler, /* reserved 192 */
(void *) dummy_handler, /* reserved 193 */
(void *) dummy_handler, /* reserved 194 */
(void *) dummy_handler, /* reserved 195 */
(void *) dummy_handler, /* reserved 196 */
(void *) dummy_handler, /* reserved 197 */
(void *) dummy_handler, /* reserved 198 */
(void *) dummy_handler, /* reserved 199 */
(void *) dummy_handler, /* reserved 200 */
(void *) dummy_handler, /* reserved 201 */
(void *) dummy_handler, /* reserved 202 */
(void *) dummy_handler, /* reserved 203 */
(void *) dummy_handler, /* reserved 204 */
(void *) dummy_handler, /* reserved 205 */
(void *) dummy_handler, /* reserved 206 */
(void *) dummy_handler, /* reserved 207 */
(void *) dummy_handler, /* reserved 208 */
(void *) dummy_handler, /* reserved 209 */
(void *) dummy_handler, /* reserved 210 */
(void *) dummy_handler, /* reserved 211 */
(void *) dummy_handler, /* reserved 212 */
(void *) dummy_handler, /* reserved 213 */
(void *) dummy_handler, /* reserved 214 */
(void *) dummy_handler, /* reserved 215 */
(void *) dummy_handler, /* reserved 216 */
(void *) dummy_handler, /* reserved 217 */
(void *) dummy_handler, /* reserved 218 */
(void *) dummy_handler, /* reserved 219 */
(void *) dummy_handler, /* reserved 220 */
(void *) dummy_handler, /* reserved 221 */
(void *) dummy_handler, /* reserved 222 */
(void *) dummy_handler, /* reserved 223 */
(void *) dummy_handler, /* reserved 224 */
(void *) dummy_handler, /* reserved 225 */
(void *) dummy_handler, /* reserved 226 */
(void *) dummy_handler, /* reserved 227 */
(void *) dummy_handler, /* reserved 228 */
(void *) dummy_handler, /* reserved 229 */
(void *) dummy_handler, /* reserved 230 */
(void *) dummy_handler, /* reserved 231 */
(void *) dummy_handler, /* reserved 232 */
(void *) dummy_handler, /* reserved 233 */
(void *) dummy_handler, /* reserved 234 */
(void *) dummy_handler, /* reserved 235 */
(void *) dummy_handler, /* reserved 236 */
(void *) dummy_handler, /* reserved 237 */
(void *) dummy_handler, /* reserved 238 */
(void *) dummy_handler, /* reserved 239 */
(void *) dummy_handler, /* reserved 240 */
(void *) dummy_handler, /* reserved 241 */
(void *) dummy_handler, /* reserved 242 */
(void *) dummy_handler, /* reserved 243 */
(void *) dummy_handler, /* reserved 244 */
(void *) dummy_handler, /* reserved 245 */
(void *) dummy_handler, /* reserved 246 */
(void *) dummy_handler, /* reserved 247 */
(void *) dummy_handler, /* reserved 248 */
(void *) dummy_handler, /* reserved 249 */
(void *) dummy_handler, /* reserved 250 */
(void *) dummy_handler, /* reserved 251 */
(void *) dummy_handler, /* reserved 252 */
(void *) dummy_handler, /* reserved 253 */
(void *) dummy_handler, /* reserved 254 */
(void *) dummy_handler, /* reserved 255 */
};

12
cpu/kw2x/kw21d256_linkerscript.ld Normal file
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@ -0,0 +1,12 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
MEMORY
{
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
flash (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x410
sram (rwx) : ORIGIN = 0x1fffc000, LENGTH = 32K
}
INCLUDE kinetis-noramcode.ld

12
cpu/kw2x/kw21d512_linkerscript.ld Normal file
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@ -0,0 +1,12 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
MEMORY
{
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
flash (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
sram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K
}
INCLUDE kinetis-noramcode.ld

12
cpu/kw2x/kw22d512_linkerscript.ld Normal file
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@ -0,0 +1,12 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
MEMORY
{
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
flash (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
sram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K
}
INCLUDE kinetis-noramcode.ld

53
cpu/kw2x/lpm_arch.c Normal file
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@ -0,0 +1,53 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kw2x
* @{
*
* @file
* @brief Implementation of the kernels power management interface
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include "arch/lpm_arch.h"
void lpm_arch_init(void)
{
/* TODO */
}
enum lpm_mode lpm_arch_set(enum lpm_mode target)
{
/* TODO */
return 0;
}
enum lpm_mode lpm_arch_get(void)
{
/* TODO */
return 0;
}
void lpm_arch_awake(void)
{
/* TODO */
}
void lpm_arch_begin_awake(void)
{
/* TODO */
}
void lpm_arch_end_awake(void)
{
/* TODO */
}

3
cpu/kw2x/periph/Makefile Normal file
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@ -0,0 +1,3 @@
MODULE = periph
include $(RIOTBASE)/Makefile.base

34
cpu/kw2x/reboot_arch.c Normal file
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@ -0,0 +1,34 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kw2x
* @{
*
* @file
* @brief Implementation of the kernels reboot interface
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdio.h>
#include "arch/reboot_arch.h"
#include "cpu.h"
int reboot_arch(int mode)
{
printf("Going into reboot, mode %i\n", mode);
NVIC_SystemReset();
return 0;
}

345
cpu/kw2x/syscalls.c Normal file
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@ -0,0 +1,345 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_kw2x
* @{
*
* @file
* @brief NewLib system call implementations for KW2xD SiP
*
* @author Michael Baar <michael.baar@fu-berlin.de>
* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Johann Fischer <j.fischer@phytec.de>
*
* @}
*/
#include <errno.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/stat.h>
#include <sys/unistd.h>
#include <stdint.h>
#include "board.h"
#include "thread.h"
#include "kernel.h"
#include "mutex.h"
#include "ringbuffer.h"
#include "irq.h"
#include "periph/uart.h"
#ifdef MODULE_UART0
#include "board_uart0.h"
#endif
/**
* manage the heap
*/
extern uintptr_t __heap_start; /* start of heap memory space */
extern uintptr_t __heap_max; /* maximum for end of heap memory space */
/* current position in heap */
static caddr_t heap = {(caddr_t) &__heap_start};
/* maximum position in heap */
static const caddr_t heap_max = {(caddr_t) &__heap_max};
/* start position in heap */
static const caddr_t heap_start = {(caddr_t) &__heap_start};
#ifndef MODULE_UART0
/**
* @brief use mutex for waiting on incoming UART chars
*/
static mutex_t uart_rx_mutex;
static char rx_buf_mem[STDIO_RX_BUFSIZE];
static ringbuffer_t rx_buf;
#endif
/**
* @brief Receive a new character from the UART and put it into the receive buffer
*/
void rx_cb(void *arg, char data)
{
#ifndef MODULE_UART0
(void)arg;
ringbuffer_add_one(&rx_buf, data);
mutex_unlock(&uart_rx_mutex);
#else
if (uart0_handler_pid) {
uart0_handle_incoming(data);
uart0_notify_thread();
}
#endif
}
/**
* @brief Initialize NewLib, called by __libc_init_array() from the startup script
*/
void _init(void)
{
#ifndef MODULE_UART0
mutex_init(&uart_rx_mutex);
ringbuffer_init(&rx_buf, rx_buf_mem, STDIO_RX_BUFSIZE);
#endif
uart_init(STDIO, STDIO_BAUDRATE, rx_cb, 0, 0);
}
/**
* @brief Free resources on NewLib de-initialization, not used for RIOT
*/
void _fini(void)
{
/* nothing to do here */
}
/**
* @brief Exit a program without cleaning up files
*
* If your system doesn't provide this, it is best to avoid linking with subroutines that
* require it (exit, system).
*
* @param n the exit code, 0 for all OK, >0 for not OK
*/
void _exit(int n)
{
printf("#!exit %i: resetting\n", n);
NVIC_SystemReset();
while (1);
}
/**
* @brief Allocate memory from the heap.
*
* The current heap implementation is very rudimentary, it is only able to allocate
* memory. But it does not
* - check if the returned address is valid (no check if the memory very exists)
* - have any means to free memory again
*
* @return [description]
*/
caddr_t _sbrk_r(struct _reent *r, size_t incr)
{
uint32_t cpsr = disableIRQ();
caddr_t new_heap = heap + incr;
/* check the heap for a chunk of the requested size */
if (new_heap <= heap_max) {
caddr_t prev_heap = heap;
heap = new_heap;
r->_errno = 0;
restoreIRQ(cpsr);
return prev_heap;
}
restoreIRQ(cpsr);
r->_errno = ENOMEM;
return NULL;
}
/**
* @brief Get the process-ID of the current thread
*
* @return the process ID of the current thread
*/
int _getpid(void)
{
return sched_active_thread->pid;
}
/**
* @brief Send a signal to a given thread
*
* @param r TODO
* @param pid TODO
* @param sig TODO
*
* @return TODO
*/
int _kill_r(struct _reent *r, int pid, int sig)
{
r->_errno = ESRCH; /* not implemented yet */
return -1;
}
/**
* @brief Open a file
*
* @param r TODO
* @param name TODO
* @param mode TODO
*
* @return TODO
*/
int _open_r(struct _reent *r, const char *name, int mode)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Read from a file
*
* All input is read from UART_0. The function will block until a byte is actually read.
*
* Note: the read function does not buffer - data will be lost if the function is not
* called fast enough.
*
* TODO: implement more sophisticated read call.
*
* @param r TODO
* @param fd TODO
* @param buffer TODO
* @param int TODO
*
* @return TODO
*/
int _read_r(struct _reent *r, int fd, void *buffer, unsigned int count)
{
#ifndef MODULE_UART0
while (rx_buf.avail == 0) {
mutex_lock(&uart_rx_mutex);
}
return ringbuffer_get(&rx_buf, (char *)buffer, rx_buf.avail);
#else
char *res = (char *)buffer;
res[0] = (char)uart0_readc();
return 1;
#endif
}
/**
* @brief Write characters to a file
*
* All output is currently directed to UART_0, independent of the given file descriptor.
* The write call will further block until the byte is actually written to the UART.
*
* TODO: implement more sophisticated write call.
*
* @param r TODO
* @param fd TODO
* @param data TODO
* @param int TODO
*
* @return TODO
*/
int _write_r(struct _reent *r, int fd, const void *data, unsigned int count)
{
char *c = (char *)data;
for (int i = 0; i < count; i++) {
uart_write_blocking(STDIO, c[i]);
}
return count;
}
/**
* @brief Close a file
*
* @param r TODO
* @param fd TODO
*
* @return TODO
*/
int _close_r(struct _reent *r, int fd)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Set position in a file
*
* @param r TODO
* @param fd TODO
* @param pos TODO
* @param dir TODO
*
* @return TODO
*/
_off_t _lseek_r(struct _reent *r, int fd, _off_t pos, int dir)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Status of an open file
*
* @param r TODO
* @param fd TODO
* @param stat TODO
*
* @return TODO
*/
int _fstat_r(struct _reent *r, int fd, struct stat *st)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Status of a file (by name)
*
* @param r TODO
* @param name TODO
* @param stat TODO
*
* @return TODO
*/
int _stat_r(struct _reent *r, char *name, struct stat *st)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Query whether output stream is a terminal
*
* @param r TODO
* @param fd TODO
*
* @return TODO
*/
int _isatty_r(struct _reent *r, int fd)
{
r->_errno = 0;
if (fd == STDOUT_FILENO || fd == STDERR_FILENO) {
return 1;
}
else {
return 0;
}
}
/**
* @brief Remove a file's directory entry
*
* @param r TODO
* @param path TODO
*
* @return TODO
*/
int _unlink_r(struct _reent *r, char *path)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}

1
doc/doxygen/riot.doxyfile
View File

@ -829,6 +829,7 @@ EXCLUDE_PATTERNS = */board/*/tools/* \
*/cpu/stm32l1/include/stm32l1xx.h \ */cpu/stm32l1/include/stm32l1xx.h \
*/cpu/k60/include/MK60D10.h \ */cpu/k60/include/MK60D10.h \
*/cpu/k60/include/MK60DZ10.h \ */cpu/k60/include/MK60DZ10.h \
*/cpu/kw2x/include/MKW22D5.h \
# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names # The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names