diff --git a/cpu/cortexm_common/include/cpu.h b/cpu/cortexm_common/include/cpu.h
index c99de0492e..9749778197 100644
--- a/cpu/cortexm_common/include/cpu.h
+++ b/cpu/cortexm_common/include/cpu.h
@@ -167,6 +167,10 @@ static inline void cortexm_sleep(int deep)
     unsigned state = irq_disable();
     __DSB();
     __WFI();
+    /* Some CPUs require an ISB after WFI to work around silicon bugs */
+#if CORTEXM_ISB_REQUIRED_AFTER_WFI
+    __ISB();
+#endif
     irq_restore(state);
 }
 
diff --git a/cpu/stm32/include/cpu_conf.h b/cpu/stm32/include/cpu_conf.h
index 9f14da6869..a910fee151 100644
--- a/cpu/stm32/include/cpu_conf.h
+++ b/cpu/stm32/include/cpu_conf.h
@@ -87,6 +87,16 @@
 extern "C" {
 #endif
 
+/**
+ * @brief   Enable workaround for bug in WFI by issuing an ISB
+ *
+ * This works around a bug on STM32 systems, see [1] for details, or [2] for
+ * an archive.org backup.
+ * [1]: https://cliffle.com/blog/stm32-wfi-bug
+ * [2]: https://web.archive.org/web/20231205101603/https://cliffle.com/blog/stm32-wfi-bug/
+ */
+#define CORTEXM_ISB_REQUIRED_AFTER_WFI  1
+
 /**
  * @brief   ARM Cortex-M specific CPU configuration
  * @{