From 1be5b7b10bb7a17b98f4075c670eb6a011597357 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ga=C3=ABtan=20Harter?= Date: Tue, 27 Aug 2019 16:06:41 +0200 Subject: [PATCH] cpu: do not locally export compilation variables These are already exported by `makefiles/vars.inc.mk`. It is a prerequisite to allow handling compilation without global exports. --- cpu/atmega32u4/Makefile.include | 2 +- cpu/atmega_common/Makefile.include | 6 +++--- cpu/efm32/Makefile.features | 2 +- cpu/efm32/Makefile.include | 2 +- cpu/mips32r2_common/Makefile.include | 2 +- cpu/mips_pic32_common/Makefile.include | 2 +- cpu/mips_pic32mx/Makefile.include | 6 +++--- cpu/mips_pic32mz/Makefile.include | 8 ++++---- cpu/msp430_common/Makefile.include | 3 +-- cpu/nrf5x_common/Makefile.include | 6 ++---- cpu/sam0_common/Makefile.include | 9 ++++----- cpu/sam_common/Makefile.include | 5 ++--- cpu/stellaris_common/Makefile.include | 2 +- cpu/stm32_common/Makefile.include | 10 ++++------ 14 files changed, 29 insertions(+), 36 deletions(-) diff --git a/cpu/atmega32u4/Makefile.include b/cpu/atmega32u4/Makefile.include index 1eaf3ccd25..c767d1f12f 100644 --- a/cpu/atmega32u4/Makefile.include +++ b/cpu/atmega32u4/Makefile.include @@ -1,5 +1,5 @@ # this CPU implementation is using the new core/CPU interface -export CFLAGS += -DCOREIF_NG=1 +CFLAGS += -DCOREIF_NG=1 # tell the build system that the CPU depends on the atmega common files USEMODULE += atmega_common diff --git a/cpu/atmega_common/Makefile.include b/cpu/atmega_common/Makefile.include index 45ddb895dd..fe4ef3d9b9 100644 --- a/cpu/atmega_common/Makefile.include +++ b/cpu/atmega_common/Makefile.include @@ -1,7 +1,7 @@ # include module specific includes -export INCLUDES += -I$(RIOTCPU)/atmega_common/include \ - -isystem$(RIOTCPU)/atmega_common/avr_libc_extra/include \ - -isystem$(RIOTCPU)/atmega_common/avr_libc_extra/include/vendor +INCLUDES += -I$(RIOTCPU)/atmega_common/include \ + -isystem$(RIOTCPU)/atmega_common/avr_libc_extra/include \ + -isystem$(RIOTCPU)/atmega_common/avr_libc_extra/include/vendor # avr libc needs some RIOT-specific support code USEMODULE += avr_libc_extra diff --git a/cpu/efm32/Makefile.features b/cpu/efm32/Makefile.features index 71e0b814c2..210e48d1aa 100644 --- a/cpu/efm32/Makefile.features +++ b/cpu/efm32/Makefile.features @@ -12,7 +12,7 @@ ifeq (1,$(EFM32_TNRG)) endif ifeq (1,$(EFM32_UART_MODES)) - export CFLAGS += -DEFM32_UART_MODES=1 + CFLAGS += -DEFM32_UART_MODES=1 endif include $(RIOTCPU)/cortexm_common/Makefile.features diff --git a/cpu/efm32/Makefile.include b/cpu/efm32/Makefile.include index 8bb1451593..c2d33eea57 100644 --- a/cpu/efm32/Makefile.include +++ b/cpu/efm32/Makefile.include @@ -4,7 +4,7 @@ export CPU_ARCH = $(EFM32_ARCHITECTURE) export CPU_FAM = $(EFM32_FAMILY) # the em_device.h header requires a global define with the cpu model -export CFLAGS += -D$(shell echo $(CPU_MODEL) | tr 'a-z' 'A-Z') +CFLAGS += -D$(shell echo $(CPU_MODEL) | tr 'a-z' 'A-Z') # include Gecko SDK package USEPKG += gecko_sdk diff --git a/cpu/mips32r2_common/Makefile.include b/cpu/mips32r2_common/Makefile.include index 50b846e15b..00bf930738 100644 --- a/cpu/mips32r2_common/Makefile.include +++ b/cpu/mips32r2_common/Makefile.include @@ -1,4 +1,4 @@ -export INCLUDES += -I$(RIOTCPU)/mips32r2_common/include +INCLUDES += -I$(RIOTCPU)/mips32r2_common/include export USEMODULE += mips32r2_common export USEMODULE += mips32r2_common_periph diff --git a/cpu/mips_pic32_common/Makefile.include b/cpu/mips_pic32_common/Makefile.include index e91a1b5cee..c7873eb984 100644 --- a/cpu/mips_pic32_common/Makefile.include +++ b/cpu/mips_pic32_common/Makefile.include @@ -1,6 +1,6 @@ include $(RIOTCPU)/mips32r2_common/Makefile.include -export INCLUDES += -I$(RIOTCPU)/mips_pic32_common/include +INCLUDES += -I$(RIOTCPU)/mips_pic32_common/include USEMODULE += mips_pic32_common USEMODULE += mips_pic32_common_periph diff --git a/cpu/mips_pic32mx/Makefile.include b/cpu/mips_pic32mx/Makefile.include index c8367774ad..ab8bb6c4e9 100644 --- a/cpu/mips_pic32mx/Makefile.include +++ b/cpu/mips_pic32mx/Makefile.include @@ -4,14 +4,14 @@ include $(RIOTCPU)/mips_pic32_common/Makefile.include include $(RIOTMAKE)/arch/mips.inc.mk # define build specific options -export CFLAGS += -march=m4k -DSKIP_COPY_TO_RAM +CFLAGS += -march=m4k -DSKIP_COPY_TO_RAM export LINKFLAGS += -Wl,--defsym,__use_excpt_boot=0 $(CFLAGS) export LINKFLAGS += -Tpic32mx512_12_128_uhi.ld # the pickit programmer (MPLAB-IPE) wants physical addresses in the hex file!! -export OBJCOPY = objcopy #use system objcopy as toolchain one is broken. -export OFLAGS += \ +OBJCOPY = objcopy #use system objcopy as toolchain one is broken. +OFLAGS += \ --change-section-lma .bootflash-0xA0000000 \ --change-section-lma .exception_vector-0x80000000 \ --change-section-lma .text-0x80000000 \ diff --git a/cpu/mips_pic32mz/Makefile.include b/cpu/mips_pic32mz/Makefile.include index 26ed33e807..3b282fda4f 100644 --- a/cpu/mips_pic32mz/Makefile.include +++ b/cpu/mips_pic32mz/Makefile.include @@ -4,15 +4,15 @@ include $(RIOTCPU)/mips_pic32_common/Makefile.include include $(RIOTMAKE)/arch/mips.inc.mk # define build specific options -export CFLAGS += -march=m5101 -mmicromips -DSKIP_COPY_TO_RAM -export CFLAGS += -DMIPS_MICROMIPS +CFLAGS += -march=m5101 -mmicromips -DSKIP_COPY_TO_RAM +CFLAGS += -DMIPS_MICROMIPS export LINKFLAGS += -Wl,--defsym,__use_excpt_boot=0 $(CFLAGS) export LINKFLAGS += -Tpic32mz2048_uhi.ld # the pickit programmer (MPLAB-IPE) wants physical addresses in the hex file!! -export OBJCOPY = objcopy #use system objcopy as toolchain one is broken. -export OFLAGS += \ +OBJCOPY = objcopy #use system objcopy as toolchain one is broken. +OFLAGS += \ --change-section-lma .lowerbootflashalias-0xA0000000 \ --change-section-lma .bootflash1-0xA0000000 \ --change-section-lma .bootflash2-0xA0000000 \ diff --git a/cpu/msp430_common/Makefile.include b/cpu/msp430_common/Makefile.include index 36d028e370..f71d8b40a2 100644 --- a/cpu/msp430_common/Makefile.include +++ b/cpu/msp430_common/Makefile.include @@ -2,9 +2,8 @@ PSEUDOMODULES += msp430_malloc INCLUDES += -I$(RIOTCPU)/msp430_common/include/ -# export the CPU model MODEL = $(shell echo $(CPU_MODEL) | tr 'a-z' 'A-Z') -export CFLAGS += -DCPU_MODEL_$(MODEL) +CFLAGS += -DCPU_MODEL_$(MODEL) export UNDEF += $(BINDIR)/msp430_common/startup.o export USEMODULE += msp430_common msp430_common_periph msp430_malloc diff --git a/cpu/nrf5x_common/Makefile.include b/cpu/nrf5x_common/Makefile.include index 407563ea3b..c29694c333 100644 --- a/cpu/nrf5x_common/Makefile.include +++ b/cpu/nrf5x_common/Makefile.include @@ -1,6 +1,5 @@ -# export the CPU family so we can differentiate between them in the code FAM = $(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_') -export CFLAGS += -DCPU_FAM_$(FAM) +CFLAGS += -DCPU_FAM_$(FAM) # include nrf5x common periph drivers USEMODULE += nrf5x_common_periph @@ -8,5 +7,4 @@ USEMODULE += nrf5x_common_periph # link common cpu code USEMODULE += cpu_common -# export the common include directory -export INCLUDES += -I$(RIOTCPU)/nrf5x_common/include +INCLUDES += -I$(RIOTCPU)/nrf5x_common/include diff --git a/cpu/sam0_common/Makefile.include b/cpu/sam0_common/Makefile.include index db869d12e1..db1810e68b 100644 --- a/cpu/sam0_common/Makefile.include +++ b/cpu/sam0_common/Makefile.include @@ -19,9 +19,9 @@ ROM_START_ADDR ?= 0x00000000 RAM_START_ADDR ?= 0x20000000 # this CPU implementation doesn't use CMSIS initialization -export CFLAGS += -DDONT_USE_CMSIS_INIT -export CFLAGS += -DDONT_USE_PREDEFINED_CORE_HANDLERS -export CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS +CFLAGS += -DDONT_USE_CMSIS_INIT +CFLAGS += -DDONT_USE_PREDEFINED_CORE_HANDLERS +CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS # For Cortex-M cpu we use the common cortexm.ld linker script LINKER_SCRIPT ?= cortexm.ld @@ -29,5 +29,4 @@ LINKER_SCRIPT ?= cortexm.ld # include sam0 common periph drivers USEMODULE += sam0_common_periph -# export the common include directory -export INCLUDES += -I$(RIOTCPU)/sam0_common/include +INCLUDES += -I$(RIOTCPU)/sam0_common/include diff --git a/cpu/sam_common/Makefile.include b/cpu/sam_common/Makefile.include index 636bd18c95..23a94e2b22 100644 --- a/cpu/sam_common/Makefile.include +++ b/cpu/sam_common/Makefile.include @@ -2,10 +2,9 @@ CFLAGS += -DCPU_FAM_$(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_') # this CPU implementation doesn't use CMSIS initialization -export CFLAGS += -DDONT_USE_CMSIS_INIT +CFLAGS += -DDONT_USE_CMSIS_INIT # for the sam[drl] CPUs we hold all linkerscripts in the sam0 common folder export LINKFLAGS += -L$(RIOTCPU)/sam_common/ldscripts -# export the common include directory -export INCLUDES += -I$(RIOTCPU)/sam_common/include +INCLUDES += -I$(RIOTCPU)/sam_common/include diff --git a/cpu/stellaris_common/Makefile.include b/cpu/stellaris_common/Makefile.include index 0adb0c6cb2..53d663b9e7 100644 --- a/cpu/stellaris_common/Makefile.include +++ b/cpu/stellaris_common/Makefile.include @@ -1,4 +1,4 @@ # define stellaris specific flags and includes export STELLARISWARE = $(RIOTCPU)/stellaris_common/include/vendor # define build specific options -export CFLAGS += -I$(STELLARISWARE) -DPART_$(CPU_MODEL) -c -DTARGET_IS_BLIZZARD_RA1 +CFLAGS += -I$(STELLARISWARE) -DPART_$(CPU_MODEL) -c -DTARGET_IS_BLIZZARD_RA1 diff --git a/cpu/stm32_common/Makefile.include b/cpu/stm32_common/Makefile.include index b897f5c60f..2b7f0294f4 100644 --- a/cpu/stm32_common/Makefile.include +++ b/cpu/stm32_common/Makefile.include @@ -1,6 +1,5 @@ -# export the CPU family so we can differentiate between them in the code FAM = $(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_') -export CFLAGS += -DCPU_FAM_$(FAM) +CFLAGS += -DCPU_FAM_$(FAM) # All stm32 families provide pm support USEMODULE += pm_layered @@ -12,8 +11,7 @@ USEMODULE += stm32_common stm32_common_periph export LINKFLAGS += -L$(RIOTCPU)/stm32_common/ldscripts LINKER_SCRIPT ?= stm32_common.ld -# export the common include directory -export INCLUDES += -I$(RIOTCPU)/stm32_common/include +INCLUDES += -I$(RIOTCPU)/stm32_common/include # Compute ROM_LEN and RAM_LEN include $(RIOTCPU)/stm32_common/stm32_mem_lengths.mk @@ -26,8 +24,8 @@ FLASHSIZE := $(shell echo $$(( $(LEN) * $(KB) )) ) CPU_LINE ?= $(shell echo $(CPU_MODEL) | cut -c -9 | tr 'a-z-' 'A-Z_')xx # Set CFLAGS -export CFLAGS += -D$(CPU_LINE) -DCPU_LINE_$(CPU_LINE) -export CFLAGS += -DSTM32_FLASHSIZE=$(FLASHSIZE)U +CFLAGS += -D$(CPU_LINE) -DCPU_LINE_$(CPU_LINE) +CFLAGS += -DSTM32_FLASHSIZE=$(FLASHSIZE)U info-stm32: @$(COLOR_ECHO) "CPU: $(CPU_MODEL)"