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drivers/pn532: adapted to SPI interface changes

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This commit is contained in:
Hauke Petersen 2017-01-26 10:03:29 +01:00
parent db048f22ad
commit 1ae0ad2509
1 changed files with 51 additions and 51 deletions
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102
drivers/pn532/pn532.c
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@ -31,45 +31,49 @@
#define ENABLE_DEBUG (0) #define ENABLE_DEBUG (0)
#include "debug.h" #include "debug.h"
#define PN532_I2C_ADDRESS (0x24) #define PN532_I2C_ADDRESS (0x24)
/* Commands */ /* Commands */
#define CMD_FIRMWARE_VERSION (0x02) #define CMD_FIRMWARE_VERSION (0x02)
#define CMD_READ_REG (0x06) #define CMD_READ_REG (0x06)
#define CMD_WRITE_REG (0x08) #define CMD_WRITE_REG (0x08)
#define CMD_READ_GPIO (0x0c) #define CMD_READ_GPIO (0x0c)
#define CMD_WRITE_GPIO (0x0E) #define CMD_WRITE_GPIO (0x0E)
#define CMD_SAM_CONFIG (0x14) #define CMD_SAM_CONFIG (0x14)
#define CMD_RF_CONFIG (0x32) #define CMD_RF_CONFIG (0x32)
#define CMD_DATA_EXCHANGE (0x40) #define CMD_DATA_EXCHANGE (0x40)
#define CMD_DESELECT (0x44) #define CMD_DESELECT (0x44)
#define CMD_LIST_PASSIVE (0x4a) #define CMD_LIST_PASSIVE (0x4a)
#define CMD_RELEASE (0x52) #define CMD_RELEASE (0x52)
/* Mifare specific commands */ /* Mifare specific commands */
#define MIFARE_CMD_READ (0x30) #define MIFARE_CMD_READ (0x30)
#define MIFARE_CMD_WRITE (0xA0) #define MIFARE_CMD_WRITE (0xA0)
/* RF register settings */ /* RF register settings */
#define RF_CONFIG_MAX_RETRIES (0x05) #define RF_CONFIG_MAX_RETRIES (0x05)
/* Buffer operations */ /* Buffer operations */
#define BUFF_CMD_START (6) #define BUFF_CMD_START (6)
#define BUFF_DATA_START (BUFF_CMD_START + 1) #define BUFF_DATA_START (BUFF_CMD_START + 1)
#define RAPDU_DATA_BEGIN (1) #define RAPDU_DATA_BEGIN (1)
#define RAPDU_MAX_DATA_LEN (PN532_BUFFER_LEN - BUFF_DATA_START - 5) #define RAPDU_MAX_DATA_LEN (PN532_BUFFER_LEN - BUFF_DATA_START - 5)
#define CAPDU_MAX_DATA_LEN (PN532_BUFFER_LEN - BUFF_DATA_START - 1) #define CAPDU_MAX_DATA_LEN (PN532_BUFFER_LEN - BUFF_DATA_START - 1)
/* Constants and magic numbers */ /* Constants and magic numbers */
#define MIFARE_CLASSIC_BLOCK_SIZE (16) #define MIFARE_CLASSIC_BLOCK_SIZE (16)
#define RESET_TOGGLE_SLEEP (400000) #define RESET_TOGGLE_SLEEP (400000)
#define RESET_BACKOFF (10000) #define RESET_BACKOFF (10000)
#define HOST_TO_PN532 (0xD4) #define HOST_TO_PN532 (0xD4)
#define PN532_TO_HOST (0xD5) #define PN532_TO_HOST (0xD5)
#define SPI_DATA_WRITE (0x80) #define SPI_DATA_WRITE (0x80)
#define SPI_STATUS_READING (0x40) #define SPI_STATUS_READING (0x40)
#define SPI_DATA_READ (0xC0) #define SPI_DATA_READ (0xC0)
#define SPI_WRITE_DELAY_US (2000) #define SPI_WRITE_DELAY_US (2000)
/* SPI bus parameters */
#define SPI_MODE (SPI_MODE_0)
#define SPI_CLK (SPI_CLK_1MHZ)
/* Length for passive listings */ /* Length for passive listings */
#define LIST_PASSIVE_LEN_14443(num) (num * 20) #define LIST_PASSIVE_LEN_14443(num) (num * 20)
@ -108,8 +112,6 @@ int pn532_init(pn532_t *dev, const pn532_params_t *params, pn532_mode_t mode)
{ {
assert(dev != NULL); assert(dev != NULL);
int ret = -1;
dev->conf = params; dev->conf = params;
gpio_init_int(dev->conf->irq, GPIO_IN_PU, GPIO_FALLING, gpio_init_int(dev->conf->irq, GPIO_IN_PU, GPIO_FALLING,
@ -120,28 +122,26 @@ int pn532_init(pn532_t *dev, const pn532_params_t *params, pn532_mode_t mode)
dev->mode = mode; dev->mode = mode;
if (mode == PN532_I2C) { if (mode == PN532_I2C) {
#ifdef PN532_SUPPORT_I2C #ifdef PN532_SUPPORT_I2C
ret = i2c_init_master(dev->conf->i2c, I2C_SPEED_FAST); if (i2c_init_master(dev->conf->i2c, I2C_SPEED_FAST) != 0) {
DEBUG("pn532: initialization of I2C bus failed\n");
return -1;
}
#endif #endif
} }
else { else {
#ifdef PN532_SUPPORT_SPI #ifdef PN532_SUPPORT_SPI
ret = spi_init_master(dev->conf->spi, SPI_CONF_FIRST_RISING, /* we handle the CS line manually... */
SPI_SPEED_1MHZ);
gpio_init(dev->conf->nss, GPIO_OUT); gpio_init(dev->conf->nss, GPIO_OUT);
gpio_set(dev->conf->nss); gpio_set(dev->conf->nss);
#endif #endif
} }
/* cppcheck-suppress knownConditionTrueFalse pn532_reset(dev);
* (reason: variable set when PN532_SUPPORT_{I2C,SPI} defined) */
if (ret == 0) {
pn532_reset(dev);
}
mutex_init(&dev->trap); mutex_init(&dev->trap);
mutex_lock(&dev->trap); mutex_lock(&dev->trap);
return ret; return 0;
} }
static unsigned char chksum(char *b, unsigned len) static unsigned char chksum(char *b, unsigned len)
@ -181,14 +181,15 @@ static int _write(pn532_t *dev, char *buff, unsigned len)
} }
else { else {
#ifdef PN532_SUPPORT_SPI #ifdef PN532_SUPPORT_SPI
spi_acquire(dev->conf->spi); spi_acquire(dev->conf->spi, SPI_CS_UNDEF, SPI_MODE, SPI_CLK);
gpio_clear(dev->conf->nss); gpio_clear(dev->conf->nss);
xtimer_usleep(SPI_WRITE_DELAY_US); xtimer_usleep(SPI_WRITE_DELAY_US);
reverse(buff, len); reverse(buff, len);
spi_transfer_byte(dev->conf->spi, SPI_DATA_WRITE, NULL); spi_transfer_byte(dev->conf->spi, SPI_CS_UNDEF, true, SPI_DATA_WRITE);
ret = spi_transfer_bytes(dev->conf->spi, buff, NULL, len); spi_transfer_bytes(dev->conf->spi, SPI_CS_UNDEF, true, buff, NULL, len);
gpio_set(dev->conf->nss); gpio_set(dev->conf->nss);
spi_release(dev->conf->spi); spi_release(dev->conf->spi);
ret = (int)len;
#endif #endif
} }
DEBUG("pn532: -> "); DEBUG("pn532: -> ");
@ -213,17 +214,16 @@ static int _read(pn532_t *dev, char *buff, unsigned len)
} }
else { else {
#ifdef PN532_SUPPORT_SPI #ifdef PN532_SUPPORT_SPI
spi_acquire(dev->conf->spi); spi_acquire(dev->conf->spi, SPI_CS_UNDEF, SPI_MODE, SPI_CLK);
gpio_clear(dev->conf->nss); gpio_clear(dev->conf->nss);
spi_transfer_byte(dev->conf->spi, SPI_DATA_READ, NULL); spi_transfer_byte(dev->conf->spi, SPI_CS_UNDEF, true, SPI_DATA_READ);
ret = spi_transfer_bytes(dev->conf->spi, 0x00, &buff[1], len); spi_transfer_bytes(dev->conf->spi, SPI_CS_UNDEF, true, NULL, &buff[1], len);
gpio_set(dev->conf->nss); gpio_set(dev->conf->nss);
spi_release(dev->conf->spi); spi_release(dev->conf->spi);
if (ret >= 0) {
buff[0] = 0x80; buff[0] = 0x80;
reverse(buff, ret); reverse(buff, len);
ret += 1; ret = (int)len + 1;
}
#endif #endif
} }
DEBUG("pn532: <- "); DEBUG("pn532: <- ");