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cpu/riscv_common: add riotboot linker support

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This commit is contained in:
Gunar Schorcht 2023-03-19 16:37:56 +01:00
parent 2ae7566a89
commit 1ad397ff59
2 changed files with 5 additions and 1 deletions
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4
cpu/riscv_common/Makefile.include
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@ -14,6 +14,10 @@ ifneq (,$(ROM_START_ADDR)$(RAM_START_ADDR)$(ROM_LEN)$(RAM_LEN))
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_start_addr=$(RAM_START_ADDR) LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_start_addr=$(RAM_START_ADDR)
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_length=$(ROM_LEN) LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_rom_length=$(ROM_LEN)
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_length=$(RAM_LEN) LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ram_length=$(RAM_LEN)
LINKFLAGS += $(if $(ROM_OFFSET),$(LINKFLAGPREFIX)--defsym=_rom_offset=$(ROM_OFFSET) \
,$(LINKFLAGPREFIX)--defsym=_rom_offset=0x0)
LINKFLAGS += $(if $(FW_ROM_LEN),$(LINKFLAGPREFIX)--defsym=_fw_rom_length=$(FW_ROM_LEN) \
,$(LINKFLAGPREFIX)--defsym=_fw_rom_length=$(ROM_LEN))
endif endif
ifneq (,$(ITIM_START_ADDR)) ifneq (,$(ITIM_START_ADDR))

2
cpu/riscv_common/ldscripts/riscv.ld
View File

@ -22,7 +22,7 @@ INCLUDE riscv_vars.ld
MEMORY MEMORY
{ {
flash (rxai!w) : ORIGIN = _rom_start_addr, LENGTH = _rom_length flash (rxai!w) : ORIGIN = _rom_start_addr + _rom_offset, LENGTH = _fw_rom_length
ram (wxa!ri) : ORIGIN = _ram_start_addr, LENGTH = _ram_length ram (wxa!ri) : ORIGIN = _ram_start_addr, LENGTH = _ram_length
itim (wxa!ri) : ORIGIN = _itim_start_addr, LENGTH = _itim_length itim (wxa!ri) : ORIGIN = _itim_start_addr, LENGTH = _itim_length
} }