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Merge branch 'thomas-mc1322x'

Browse Source 
Conflicts:
	Makefile.modules
	core/kernel_init.c
	core/thread.c
	cpu/arm_common/arm_cpu.c
	cpu/arm_common/syscalls.c
	cpu/lpc_common/hwtimer_cpu.c
	cpu/lpc_common/iap.c
	sys/include/transceiver.h
	sys/net/sixlowpan/sixlowip.c
	sys/net/sixlowpan/sixlowmac.c
	sys/net/sixlowpan/sixlowmac.h
	sys/net/sixlowpan/sixlowpan.c
	sys/transceiver/Makefile
	sys/transceiver/transceiver.c
This commit is contained in:
Oleg Hahm 2013-07-24 23:22:11 +02:00
commit 19e4034ace
34 changed files with 1447 additions and 130 deletions
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4
Makefile.include
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@ -1,3 +1,4 @@
# set undefined variables
ifeq ($(strip $(RIOTCPU)),)
export RIOTCPU =$(RIOTBASE)/cpu
endif
@ -11,8 +12,9 @@ BB = $(shell echo $(BOARD)|tr 'a-z' 'A-Z')
CFLAGS += -DBOARD=$(BB)
export CFLAGS
# mandatory include!
# mandatory includes!
include $(RIOTBOARD)/$(BOARD)/Makefile.include
include $(RIOTCPU)/Makefile.include
include $(RIOTBASE)/Makefile.modules
# your binaries to link

2
Makefile.modules
View File

@ -1,6 +1,6 @@
export MAKEBASE =$(RIOTBASE)
export BINDIR =$(RIOTBASE)/bin/
UNDEF = $(BINDIR)startup.o
UNDEF += $(BINDIR)startup.o
### Minimal setup
ifeq ($(CPU),lpc2387)

10
cpu/Makefile
View File

@ -1,9 +1,13 @@
ifeq ($(CPU),lpc2387)
DIRS = arm_common lpc2387
DIRS = arm_common lpc_common lpc2387
endif
ifeq ($(CPU),lpc214x)
DIRS = arm_common lpc214x
DIRS = arm_common lpc_common lpc214x
endif
ifeq ($(CPU),mc1322x)
DIRS = arm_common mc1322x
endif
ifeq ($(CPU),cc430)
@ -28,6 +32,8 @@ $(DIRS):
clean:
@$(MAKE) -C lpc2387 clean
@$(MAKE) -C mc1322x clean
@$(MAKE) -C lpc_common clean
@$(MAKE) -C arm_common clean
@$(MAKE) -C cc430 clean
@$(MAKE) -C msp430-common clean

6
cpu/Makefile.base
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@ -1,11 +1,17 @@
ifeq ($(CPU),lpc2387)
INCLUDES += -I$(MAKEBASE)/cpu/arm_common/include/
INCLUDES += -I$(MAKEBASE)/cpu/lpc_common/include/
INCLUDES += -I$(MAKEBASE)/cpu/lpc2387/include
endif
ifeq ($(CPU),lpc214x)
INCLUDES += -I$(MAKEBASE)/cpu/arm_common/include/
INCLUDES += -I$(MAKEBASE)/cpu/lpc_common/include/
INCLUDES += -I$(MAKEBASE)/cpu/lpc214x/include
endif
ifeq ($(CPU),mc1322x)
INCLUDES += -I$(MAKEBASE)/cpu/arm_common/include/
INCLUDES += -I$(MAKEBASE)/cpu/mc1322x/include
endif
ifeq ($(CPU),msp430x16x)
INCLUDES += -I$(MAKEBASE)/cpu/msp430-common/include/
INCLUDES += -I$(MAKEBASE)/cpu/msp430x16x/include/

22
cpu/Makefile.include Normal file
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@ -0,0 +1,22 @@
### Minimal setup
ifeq ($(CPU),lpc2387)
export USEMODULE += arm_common lpc_common
export UNDEF += $(BINDIR)syscalls.o
export INCLUDES += -I$(RIOTCPU)/arm_common/include
export INCLUDES += -I$(RIOTCPU)/lpc_common/include
endif
ifeq ($(CPU),lpc214x)
export USEMODULE += arm_common lpc_common
export UNDEF += $(BINDIR)syscalls.o
export INCLUDES += -I$(RIOTCPU)/arm_common/include
export INCLUDES += -I$(RIOTCPU)/lpc_common/include
endif
ifeq ($(CPU),mc1322x)
export USEMODULE += arm_common
export UNDEF += $(BINDIR)syscalls.o
export UNDEF += $(BINDIR)mc1322x_syscalls.o
export INCLUDES += -I$(RIOTBASE)/cpu/arm_common/include
endif
ifeq ($(CPU),native)
export INCLUDES += -I$(RIOTBASE)/cpu/native/include
endif

1
cpu/arm_common/Makefile
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@ -1,5 +1,6 @@
MODULE =arm_common
INCLUDES = -Iinclude -I../$(CPU)/include -I../../sys/lib -I../../drivers/include -I../../core/include -I../../sys/include -I../../hal/include -I../../.. -I../../sys/lib/fat
CFLAGS = $(CFLAGS_BASIC)
include $(RIOTBASE)/Makefile.base

11
cpu/arm_common/arm_cpu.c
View File

@ -88,14 +88,3 @@ void thread_print_stack(void)
printf("STACK (%u)= %X \n", i, *s);
}
__attribute__((naked, noreturn)) void arm_reset(void)
{
dINT();
WDTC = 0x00FFF;
WDMOD = 0x03;
WDFEED = 0xAA;
WDFEED = 0x55;
while (1);
}

112
cpu/arm_common/syscalls.c
View File

@ -1,27 +1,17 @@
/******************************************************************************
Copyright 2008, Freie Universitaet Berlin (FUB). All rights reserved.
These sources were developed at the Freie Universitaet Berlin, Computer Systems
and Telematics group (http://cst.mi.fu-berlin.de).
-------------------------------------------------------------------------------
This file is part of RIOT.
This program is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free Software
Foundation, either version 3 of the License, or (at your option) any later
version.
RIOT is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with
this program. If not, see http://www.gnu.org/licenses/ .
*******************************************************************************/
/*
* syscalls.c - arm system calls
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT.
*
*/
/**
* @file
* @ingroup lpc2387
* @ingroup arm_common
* @brief LPC2387 NewLib system calls implementation
*
* @author Freie Universität Berlin, Computer Systems & Telematics
@ -36,6 +26,8 @@ this program. If not, see http://www.gnu.org/licenses/ .
#include <sys/stat.h>
#include <sys/unistd.h>
#include <stdint.h>
#include "arm_cpu.h"
// core
#include "kernel.h"
#include "irq.h"
@ -64,7 +56,6 @@ this program. If not, see http://www.gnu.org/licenses/ .
* @name Heaps (defined in linker script)
* @{
*/
#define NUM_HEAPS 3//2
extern uintptr_t __heap1_start; ///< start of heap memory space
extern uintptr_t __heap1_max; ///< maximum for end of heap memory space
@ -73,26 +64,6 @@ extern uintptr_t __heap2_max; ///< maximum for end of heap memory space
extern uintptr_t __heap3_start; ///< start of heap memory space
extern uintptr_t __heap3_max; ///< maximum for end of heap memory space
/* current position in heap */
static caddr_t heap[NUM_HEAPS] = {(caddr_t) &__heap1_start, (caddr_t) &__heap3_start, (caddr_t) &__heap2_start}; // add heap3 before heap2 cause Heap3 address is lower then addr of heap2
/* maximum position in heap */
static const caddr_t heap_max[NUM_HEAPS] = {(caddr_t) &__heap1_max, (caddr_t) &__heap3_max, (caddr_t) &__heap2_max};
/* start position in heap */
static const caddr_t heap_start[NUM_HEAPS] = {(caddr_t) &__heap1_start, (caddr_t) &__heap3_start, (caddr_t) &__heap2_start};
/* current heap in use */
volatile static uint8_t iUsedHeap = 0;
/** @} */
/*-----------------------------------------------------------------------------------*/
void heap_stats(void)
{
for (int i = 0; i < NUM_HEAPS; i++)
printf("# heap %i: %p -- %p -> %p (%li of %li free)\n", i, heap_start[i], heap[i], heap_max[i],
(uint32_t)heap_max[i] - (uint32_t)heap[i], (uint32_t)heap_max[i] - (uint32_t)heap_start[i]);
}
/*-----------------------------------------------------------------------------------*/
void __assert_func(const char *file, int line, const char *func, const char *failedexpr)
{
@ -108,46 +79,7 @@ void __assert(const char *file, int line, const char *failedexpr)
{
__assert_func(file, line, "?", failedexpr);
}
/*-----------------------------------------------------------------------------------*/
caddr_t _sbrk_r(struct _reent *r, size_t incr)
{
if (incr < 0) {
puts("[syscalls] Negative Values for _sbrk_r are not supported");
r->_errno = ENOMEM;
return NULL;
}
uint32_t cpsr = disableIRQ();
/* check all heaps for a chunk of the requested size */
for (; iUsedHeap < NUM_HEAPS; iUsedHeap++) {
caddr_t new_heap = heap[iUsedHeap] + incr;
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, heap[iUsedHeap]);
#endif
if (new_heap <= heap_max[iUsedHeap]) {
caddr_t prev_heap = heap[iUsedHeap];
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, new_heap);
#endif
heap[iUsedHeap] = new_heap;
r->_errno = 0;
restoreIRQ(cpsr);
return prev_heap;
}
}
restoreIRQ(cpsr);
#ifdef MODULE_TRACELOG
trace_string(TRACELOG_EV_MEMORY, "heap!"); // heap full
#endif
r->_errno = ENOMEM;
return NULL;
}
/*---------------------------------------------------------------------------*/
int _isatty_r(struct _reent *r, int fd)
{
@ -163,6 +95,10 @@ int _isatty_r(struct _reent *r, int fd)
/*---------------------------------------------------------------------------*/
_off_t _lseek_r(struct _reent *r, int fd, _off_t pos, int whence)
{
/* to get rid of gcc warnings */
(void) fd;
(void) pos;
(void) whence;
_off_t result = -1;
PRINTF("lseek [%i] pos %li whence %i\n", fd, pos, whence);
@ -177,6 +113,9 @@ _off_t _lseek_r(struct _reent *r, int fd, _off_t pos, int whence)
/*---------------------------------------------------------------------------*/
int _open_r(struct _reent *r, const char *name, int mode)
{
/* to get rid of gcc warnings */
(void) name;
(void) mode;
int ret = -1;
PRINTF("open '%s' mode %#x\n", name, mode);
@ -191,6 +130,9 @@ int _open_r(struct _reent *r, const char *name, int mode)
/*---------------------------------------------------------------------------*/
int _stat_r(struct _reent *r, char *name, struct stat *st)
{
/* to get rid of gcc warnings */
(void) name;
(void) st;
int ret = -1;
PRINTF("_stat_r '%s' \n", name);
r->_errno = ENODEV; // no such device
@ -264,6 +206,10 @@ int _write_r(struct _reent *r, int fd, const void *data, unsigned int count)
/*---------------------------------------------------------------------------*/
int _read_r(struct _reent *r, int fd, void *buffer, unsigned int count)
{
/* to get rid of gcc warnings */
(void) fd;
(void) buffer;
(void) count;
int result = -1;
r->_errno = EBADF;
#ifdef MODULE_FAT
@ -277,6 +223,7 @@ int _read_r(struct _reent *r, int fd, void *buffer, unsigned int count)
/*---------------------------------------------------------------------------*/
int _close_r(struct _reent *r, int fd)
{
(void) fd;
int result = -1;
r->_errno = EBADF;
#ifdef MODULE_FAT
@ -290,6 +237,9 @@ int _close_r(struct _reent *r, int fd)
/*---------------------------------------------------------------------------*/
int _unlink_r(struct _reent *r, char *path)
{
/* get rid of gcc warnings */
(void) path;
int result = -1;
r->_errno = ENODEV;
#ifdef MODULE_FAT

22
cpu/lpc2387/linkerscript.x
View File

@ -1,28 +1,14 @@
/******************************************************************************
Copyright 2008-2009, Freie Universitaet Berlin (FUB). All rights reserved.
Copyright 2013, Freie Universitaet Berlin (FUB). All rights reserved.
These sources were developed at the Freie Universitaet Berlin, Computer Systems
and Telematics group (http://cst.mi.fu-berlin.de).
-------------------------------------------------------------------------------
This file is part of RIOT.
This program is free software: you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free Software
Foundation, either version 3 of the License, or (at your option) any later
version.
RIOT is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with
this program. If not, see http://www.gnu.org/licenses/ .
--------------------------------------------------------------------------------
For further information and questions please use the web site
http://scatterweb.mi.fu-berlin.de
and the mailinglist (subscription via web site)
scatterweb@lists.spline.inf.fu-berlin.de
*******************************************************************************/
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*/
/* specify the LPC2387 memory areas (see LPC2387 datasheet page 15) */
MEMORY

4
cpu/lpc_common/Makefile Normal file
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@ -0,0 +1,4 @@
MODULE =lpc_common
include $(RIOTBASE)/Makefile.base

4
cpu/arm_common/hwtimer_cpu.c → cpu/lpc_common/hwtimer_cpu.c
View File

@ -20,10 +20,10 @@
#define VULP(x) ((volatile unsigned long*) (x))
/*/ High level interrupt handler */
/* High level interrupt handler */
static void (*int_handler)(int);
/*/ Timer 0-3 interrupt handler */
/* Timer 0-3 interrupt handler */
static void timer_irq(void) __attribute__((interrupt("IRQ")));
inline static unsigned long get_base_address(short timer)

1
cpu/arm_common/iap.c → cpu/lpc_common/iap.c
View File

@ -7,6 +7,7 @@
#include <irq.h>
#include <flashrom.h>
#include <iap.h>
/* TODO: replace by a lpc generic header */
#include <lpc2387.h>
#define ENABLE_DEBUG (0)

20
cpu/lpc_common/lpc_cpu.c Normal file
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@ -0,0 +1,20 @@
/*
* lpc_cpu.c - LPC architecture common support functions
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT.
*
*/
__attribute__((naked,noreturn)) void arm_reset(void)
{
dINT();
WDTC = 0x00FFF;
WDMOD = 0x03;
WDFEED= 0xAA;
WDFEED= 0x55;
while(1);
}

75
cpu/lpc_common/lpc_syscalls.c Normal file
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@ -0,0 +1,75 @@
/*
* syscalls.c - MCU dependent syscall implementation for LPCXXXX
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT.
*
*/
#include <errno.h>
/**
* @name Heaps (defined in linker script)
* @{
*/
#define NUM_HEAPS 3
extern uintptr_t __heap1_start; ///< start of heap memory space
extern uintptr_t __heap1_max; ///< maximum for end of heap memory space
extern uintptr_t __heap2_start; ///< start of heap memory space
extern uintptr_t __heap2_max; ///< maximum for end of heap memory space
extern uintptr_t __heap3_start; ///< start of heap memory space
extern uintptr_t __heap3_max; ///< maximum for end of heap memory space
/// current position in heap
static caddr_t heap[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start}; // add heap3 before heap2 cause Heap3 address is lower then addr of heap2
/// maximum position in heap
static const caddr_t heap_max[NUM_HEAPS] = {(caddr_t)&__heap1_max,(caddr_t)&__heap3_max,(caddr_t)&__heap2_max};
// start position in heap
static const caddr_t heap_start[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start};
/** @} */
/*-----------------------------------------------------------------------------------*/
void heap_stats(void)
{
for(int i = 0; i < NUM_HEAPS; i++)
printf("# heap %i: %p -- %p -> %p (%li of %li free)\n", i, heap_start[i], heap[i], heap_max[i],
(uint32_t)heap_max[i] - (uint32_t)heap[i], (uint32_t)heap_max[i] - (uint32_t)heap_start[i]);
}
/*-----------------------------------------------------------------------------------*/
caddr_t _sbrk_r(struct _reent *r, size_t incr)
{
uint32_t cpsr = disableIRQ();
/* check all heaps for a chunk of the requested size */
for (volatile uint8_t iUsedHeap = 0; iUsedHeap < NUM_HEAPS; iUsedHeap++ ) {
caddr_t new_heap = heap[iUsedHeap] + incr;
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, heap[iUsedHeap]);
#endif
if( new_heap <= heap_max[iUsedHeap] ) {
caddr_t prev_heap = heap[iUsedHeap];
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, new_heap);
#endif
heap[iUsedHeap] = new_heap;
r->_errno = 0;
restoreIRQ(cpsr);
return prev_heap;
}
}
restoreIRQ(cpsr);
#ifdef MODULE_TRACELOG
trace_string(TRACELOG_EV_MEMORY, "heap!"); // heap full
#endif
r->_errno = ENOMEM;
return NULL;
}

0
cpu/arm_common/profiling.c → cpu/lpc_common/profiling.c
View File

12
cpu/mc1322x/Makefile Normal file
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@ -0,0 +1,12 @@
MODULE =cpu
DIRS =
all: $(BINDIR)$(MODULE).a
@for i in $(DIRS) ; do $(MAKE) -C $$i ; done ;
include $(RIOTBASE)/Makefile.base
clean::
@for i in $(DIRS) ; do $(MAKE) -C $$i clean ; done ;

24
cpu/mc1322x/cpu.c Normal file
View File

@ -0,0 +1,24 @@
/*
* cpu.c - MC1322X architecture common support functions
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT.
*
*/
#include "mc1322x.h"
#include "lpm.h"
__attribute__((naked,noreturn)) void arm_reset(void)
{
dINT();
CRM->SW_RST = SW_RST_VAL;
while(1);
}
enum lpm_mode lpm_set(enum lpm_mode target) {
return LPM_ON;
}

127
cpu/mc1322x/hwtimer_cpu.c Normal file
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@ -0,0 +1,127 @@
/*
* hwtimer_cpu.c - architecture dependent hardware timer functionality
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
* Copyright (C) 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT.
*/
#include <stdint.h>
#include "mc1322x.h"
#include "hwtimer_arch.h"
#include "irq.h"
/* High level interrupt handler */
static void (*int_handler)(int);
void timer_x_init(volatile struct TMR_struct* const TMRx) {
/* Reset the timer */
TMRx->ENBL = 0;
/* Clear status */
TMRx->SCTRL = 0;
/* disable interrupt */
TMRx->CSCTRL =0x0000;
/* Reload/initialize to zero */
TMRx->LOAD = 0;
/* disable comparison */
TMRx->COMP1 = 0;
TMRx->CMPLD1 = 0;
/* set counter to zero */
TMRx->CNTR = 0;
/* set timer control bits */
TMRx->CTRLbits.COUNT_MODE = 1; /* use rising edge of primary source */
TMRx->CTRLbits.PRIMARY_CNT_SOURCE = 0x0f; /* Perip. clock with 128 prescale (for 24MHz = 187500Hz) */
TMRx->CTRLbits.SECONDARY_CNT_SOURCE = 0x00; /* don't need this */
TMRx->CTRLbits.ONCE = 0x00; /* keep counting */
TMRx->CTRLbits.LENGTH = 0x00; /* continue counting */
TMRx->CTRLbits.DIR = 0x00; /* count up */
TMRx->CTRLbits.CO_INIT = 0x00; /* other counters cannot force a reinitialization of this counter*/
TMRx->CTRLbits.OUTPUT_MODE = 0x00; /* OFLAG is asserted while counter is active */
TMRx->ENBL = 0xf; /* enable all the timers --- why not? */
/* TODO: install ISR */
}
void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) {
int_handler = handler;
/* TODO: do scaling voodoo */
(void) fcpu;
timer_x_init(TMR0);
timer_x_init(TMR1);
timer_x_init(TMR2);
timer_x_init(TMR3);
}
/*---------------------------------------------------------------------------*/
void hwtimer_arch_enable_interrupt(void) {
/* this enables timer interrupts in general by using the ITC.
* Timer specific interrupt control is given by the TMRx structs. */
//enable_irq(INT_NUM_TMR);
ITC->INTENABLEbits.TMR = 1;
}
/*---------------------------------------------------------------------------*/
void hwtimer_arch_disable_interrupt(void) {
/* this disables timer interrupts in general by using the ITC.
* Timer specific interrupt control is given by the TMRx structs. */
//disable_irq(INT_NUM_TMR);
ITC->INTENABLEbits.TMR = 1;
}
/*---------------------------------------------------------------------------*/
void hwtimer_arch_set(unsigned long offset, short timer) {
/* get corresponding struct for the given ::timer parameter */
struct TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET);
/* disable IRQs and save the status register */
unsigned long cpsr = disableIRQ();
tmr->COMP1 = tmr->CNTR + offset; /* load the current value + offset into the compare register */
tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */
tmr->CSCTRLbits.TCF1EN = 1; /* enable intterupts when TCF1 is set \ */
tmr->SCTRLbits.TCFIE = 1; /* enable interrupts when TCF is one - do we need both?*/
/* restor status register */
restoreIRQ(cpsr);
}
/*---------------------------------------------------------------------------*/
void hwtimer_arch_set_absolute(unsigned long value, short timer) {
/* get corresponding struct for the given ::timer parameter */
struct TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET);
/* disable IRQs and save the status register */
unsigned long cpsr = disableIRQ();
tmr->COMP1 = value; /* load the value into the compare register */
tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */
tmr->CSCTRLbits.TCF1EN = 1; /* enable interrupts when TCF1 is set \ */
tmr->SCTRLbits.TCFIE = 1; /* enable interrupts when TCF is one - do we need both?*/
/* restor status register */
restoreIRQ(cpsr);
}
/*---------------------------------------------------------------------------*/
void hwtimer_arch_unset(short timer) {
/* get corresponding struct for the given ::timer parameter */
struct TMR_struct* tmr = (void *) TMR_BASE + (timer + TMR_OFFSET);
tmr->CSCTRLbits.TCF1 = 0; /* reset compare flag */
tmr->CSCTRLbits.TCF1EN = 0; /* disable interrupts for TCF1 */
tmr->SCTRLbits.TCFIE = 0; /* disable interrupts for TCF */
}
/*---------------------------------------------------------------------------*/
unsigned long hwtimer_arch_now(void) {
return TMR0->CNTR;
}

61
cpu/mc1322x/include/cpu-conf.h Normal file
View File

@ -0,0 +1,61 @@
/*
* cpu.h - mc1322x specific definitions
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT
*/
#ifndef CPUCONF_H_
#define CPUCONF_H_
/**
* @ingroup conf
* @ingroup mc1322x
*
* @{
*/
/**
* @file
* @brief MC1322X CPUconfiguration
*
* @author Oleg Hahm
*/
/**
* @name Stdlib configuration
* @{
*/
#define __FOPEN_MAX__ 4
#define __FILENAME_MAX__ 12
/** @} */
/**
* @name Kernel configuration
* @{
*/
#ifndef KERNEL_CONF_STACKSIZE_DEFAULT
#define KERNEL_CONF_STACKSIZE_DEFAULT 4500
#endif
#define KERNEL_CONF_STACKSIZE_IDLE 500
/** @} */
/**
* @name Compiler specifics
* @{
*/
#define CC_CONF_INLINE inline
#define CC_CONF_USED __attribute__((used))
#define CC_CONF_NONNULL(...) __attribute__((nonnull(__VA_ARGS__)))
#define CC_CONF_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
/** @} */
#define TRANSCEIVER_BUFFER_SIZE (10)
#define RX_BUF_SIZE (10)
/** @} */
#endif /* CPUCONF_H_ */

18
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/*
* cpu.h - mc1322x specific definitions
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*/
#ifndef CPU_H
#define CPU_H
#include <stdint.h>
#include "arm_cpu.h"
#include "mc1322x.h"
extern uintptr_t __stack_start; ///< end of user stack memory space
#endif /* CPU_H */

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/*
* mc1322x.h - mc1322x specific definitions
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT.
*/
#ifndef MC1322X_H
#define MC1322X_H
#include <stdint.h>
/*-----------------------------------------------------------------*/
/* System Management */
#define SW_RST_VAL (0x87651234)
#define CRM_BASE (0x80003000)
/* Structure-based CRM access */
struct CRM_struct {
union {
uint32_t SYS_CNTL;
struct CRM_SYS_CNTL {
uint32_t PWR_SOURCE:2;
uint32_t PADS_1P8V_SEL:1;
uint32_t :1;
uint32_t JTAG_SECU_OFF:1;
uint32_t XTAL32_EXISTS:1;
uint32_t :2;
uint32_t XTAL_CLKDIV:6;
uint32_t :18;
} SYS_CNTLbits;
};
union {
uint32_t WU_CNTL;
struct CRM_WU_CNTL {
uint32_t TIMER_WU_EN:1;
uint32_t RTC_WU_EN:1;
uint32_t HOST_WAKE:1;
uint32_t AUTO_ADC:1;
uint32_t EXT_WU_EN:4;
uint32_t EXT_WU_EDGE:4;
uint32_t EXT_WU_POL:4;
uint32_t TIMER_WU_IEN:1;
uint32_t RTC_WU_IEN:1;
uint32_t :2;
uint32_t EXT_WU_IEN:4;
uint32_t :4;
uint32_t EXT_OUT_POL:4;
} WU_CNTLbits;
};
union {
uint32_t SLEEP_CNTL;
struct CRM_SLEEP_CNTL {
uint32_t HIB:1;
uint32_t DOZE:1;
uint32_t :2;
uint32_t RAM_RET:2;
uint32_t MCU_RET:1;
uint32_t DIG_PAD_EN:1;
uint32_t :24;
} SLEEP_CNTLbits;
};
union {
uint32_t BS_CNTL;
struct CRM_BS_CNTL {
uint32_t BS_EN:1;
uint32_t WAIT4IRQ:1;
uint32_t BS_MAN_EN:1;
uint32_t :2;
uint32_t ARM_OFF_TIME:6;
uint32_t :18;
} BS_CNTLbits;
};
union {
uint32_t COP_CNTL;
struct CRM_COP_CNTL {
uint32_t COP_EN:1;
uint32_t COP_OUT:1;
uint32_t COP_WP:1;
uint32_t :5;
uint32_t COP_TIMEOUT:7;
uint32_t :1;
uint32_t COP_COUNT:7;
uint32_t :9;
} COP_CNTLbits;
};
uint32_t COP_SERVICE;
union {
uint32_t STATUS;
struct CRM_STATUS {
uint32_t SLEEP_SYNC:1;
uint32_t HIB_WU_EVT:1;
uint32_t DOZE_WU_EVT:1;
uint32_t RTC_WU_EVT:1;
uint32_t EXT_WU_EVT:4;
uint32_t :1;
uint32_t CAL_DONE:1;
uint32_t COP_EVT:1;
uint32_t :6;
uint32_t VREG_BUCK_RDY:1;
uint32_t VREG_1P8V_RDY:1;
uint32_t VREG_1P5V_RDY:1;
uint32_t :12;
} STATUSbits;
};
union {
uint32_t MOD_STATUS;
struct CRM_MOD_STATUS {
uint32_t ARM_EN:1;
uint32_t MACA_EN:1;
uint32_t ASM_EN:1;
uint32_t SPI_EN:1;
uint32_t GPIO_EN:1;
uint32_t UART1_EN:1;
uint32_t UART2_EN:1;
uint32_t TMR_EN:1;
uint32_t RIF_EN:1;
uint32_t I2C_EN:1;
uint32_t SSI_EN:1;
uint32_t SPIF_EN:1;
uint32_t ADC_EN:1;
uint32_t :1;
uint32_t JTA_EN:1;
uint32_t NEX_EN:1;
uint32_t :1;
uint32_t AIM_EN:1;
uint32_t :14;
} MOD_STATUSbits;
};
uint32_t WU_COUNT;
uint32_t WU_TIMEOUT;
uint32_t RTC_COUNT;
uint32_t RTC_TIMEOUT;
uint32_t reserved1;
union {
uint32_t CAL_CNTL;
struct CRM_CAL_CNTL {
uint32_t CAL_TIMEOUT:16;
uint32_t CAL_EN:1;
uint32_t CAL_IEN:1;
uint32_t :14;
} CAL_CNTLbits;
};
uint32_t CAL_COUNT;
union {
uint32_t RINGOSC_CNTL;
struct CRM_RINGOSC_CNTL {
uint32_t ROSC_EN:1;
uint32_t :3;
uint32_t ROSC_FTUNE:5;
uint32_t ROSC_CTUNE:4;
uint32_t :19;
} RINGOSC_CNTLbits;
};
union {
uint32_t XTAL_CNTL;
struct CRM_XTAL_CNTL {
uint32_t :8;
uint32_t XTAL_IBIAS_SEL:4;
uint32_t :4;
uint32_t XTAL_FTUNE:5;
uint32_t XTAL_CTUNE:5;
uint32_t :6;
} XTAL_CNTLbits;
};
union {
uint32_t XTAL32_CNTL;
struct CRM_XTAL32_CNTL {
uint32_t XTAL32_EN:1;
uint32_t :3;
uint32_t XTAL32_GAIN:2;
uint32_t :26;
} XTAL32_CNTLbits;
};
union {
uint32_t VREG_CNTL;
struct CRM_VREG_CNTL {
uint32_t BUCK_EN:1;
uint32_t BUCK_SYNC_REC_EN:1;
uint32_t BUCK_BYPASS_EN:1;
uint32_t VREG_1P5V_EN:2;
uint32_t VREG_1P5V_SEL:2;
uint32_t VREG_1P8V_EN:1;
uint32_t BUCK_CLKDIV:4;
uint32_t :20;
} VREG_CNTLbits;
};
uint32_t reserved2;
uint32_t SW_RST;
uint32_t reserved3;
uint32_t reserved4;
uint32_t reserved5;
uint32_t reserved6;
};
static volatile struct CRM_struct * const CRM = (void*) (CRM_BASE);
/*-----------------------------------------------------------------*/
/* TIMERS */
#define F_CPU (24000000) ///< CPU target speed in Hz
/* Timer registers are all 16-bit wide with 16-bit access only */
#define TMR_OFFSET (0x20)
#define TMR_BASE (0x80007000)
#define TMR0_BASE (TMR_BASE)
#define TMR1_BASE (TMR_BASE + TMR_OFFSET*1)
#define TMR2_BASE (TMR_BASE + TMR_OFFSET*2)
#define TMR3_BASE (TMR_BASE + TMR_OFFSET*3)
struct TMR_struct {
uint16_t COMP1;
uint16_t COMP2;
uint16_t CAPT;
uint16_t LOAD;
uint16_t HOLD;
uint16_t CNTR;
union {
uint16_t CTRL;
struct TMR_CTRL {
uint16_t OUTPUT_MODE:3;
uint16_t CO_INIT:1;
uint16_t DIR:1;
uint16_t LENGTH:1;
uint16_t ONCE:1;
uint16_t SECONDARY_CNT_SOURCE:2;
uint16_t PRIMARY_CNT_SOURCE:4;
uint16_t COUNT_MODE:3;
} CTRLbits;
};
union {
uint16_t SCTRL;
struct TMR_SCTRL {
uint16_t OEN:1;
uint16_t OPS:1;
uint16_t FORCE:1;
uint16_t VAL:1;
uint16_t EEOF:1;
uint16_t MSTR:1;
uint16_t CAPTURE_MODE:2;
uint16_t INPUT:1;
uint16_t IPS:1;
uint16_t IEFIE:1;
uint16_t IEF:1;
uint16_t TOFIE:1;
uint16_t TOF:1;
uint16_t TCFIE:1;
uint16_t TCF:1;
} SCTRLbits;
};
uint16_t CMPLD1;
uint16_t CMPLD2;
union {
uint16_t CSCTRL;
struct TMR_CSCTRL {
uint16_t CL1:2;
uint16_t CL2:2;
uint16_t TCF1:1;
uint16_t TCF2:1;
uint16_t TCF1EN:1;
uint16_t TCF2EN:1;
uint16_t :5;
uint16_t FILT_EN:1;
uint16_t DBG_EN:2;
} CSCTRLbits;
};
uint16_t reserved[4];
union {
uint16_t ENBL;
struct TMR_ENBL {
union {
struct {
uint16_t ENBL:4;
};
struct {
uint16_t ENBL3:1;
uint16_t ENBL2:1;
uint16_t ENBL1:1;
uint16_t ENBL0:1;
};
};
uint16_t :12;
} ENBLbits;
};
};
static volatile struct TMR_struct * const TMR0 = (void *) (TMR0_BASE);
static volatile struct TMR_struct * const TMR1 = (void *) (TMR1_BASE);
static volatile struct TMR_struct * const TMR2 = (void *) (TMR2_BASE);
static volatile struct TMR_struct * const TMR3 = (void *) (TMR3_BASE);
/* Get timer pointer from timer number */
#define TMR_ADDR(x) (*(volatile struct TMR_struct *)(((uint32_t)(x) * TMR_OFFSET) + TMR_BASE))
/* Get timer number from the timer pointer. */
#define TMR_NUM(x) (((uint32_t)(x) - TMR_BASE) / TMR_OFFSET)
/*-----------------------------------------------------------------*/
/* Interrupts */
#define INTBASE (0x80020000)
#include <stdint.h>
/* Structure-based ITC access */
#define __INTERRUPT_union(x) \
union { \
uint32_t x; \
struct ITC_##x { \
uint32_t ASM:1; \
uint32_t UART1:1; \
uint32_t UART2:1; \
uint32_t CRM:1; \
uint32_t I2C:1; \
uint32_t TMR:1; \
uint32_t SPIF:1; \
uint32_t MACA:1; \
uint32_t SSI:1; \
uint32_t ADC:1; \
uint32_t SPI:1; \
uint32_t :21; \
} x##bits; \
};
struct ITC_struct {
union {
uint32_t INTCNTL;
struct ITC_INTCNTL {
uint32_t :19;
uint32_t FIAD:1;
uint32_t NIAD:1;
uint32_t :11;
} INTCNTLbits;
};
uint32_t NIMASK;
uint32_t INTENNUM;
uint32_t INTDISNUM;
__INTERRUPT_union(INTENABLE);
__INTERRUPT_union(INTTYPE);
uint32_t reserved[4];
uint32_t NIVECTOR;
uint32_t FIVECTOR;
__INTERRUPT_union(INTSRC);
__INTERRUPT_union(INTFRC);
__INTERRUPT_union(NIPEND);
__INTERRUPT_union(FIPEND);
};
#undef __INTERRUPT_union
static volatile struct ITC_struct * const ITC = (void *) (INTBASE);
/* Old register definitions, for compatibility */
#ifndef REG_NO_COMPAT
#define INTCNTL_OFF (0x0)
#define INTENNUM_OFF (0x8)
#define INTDISNUM_OFF (0xC)
#define INTENABLE_OFF (0x10)
#define INTSRC_OFF (0x30)
#define INTFRC_OFF (0x34)
#define NIPEND_OFF (0x38)
static volatile uint32_t * const INTCNTL = ((volatile uint32_t *) (INTBASE + INTCNTL_OFF));
static volatile uint32_t * const INTENNUM = ((volatile uint32_t *) (INTBASE + INTENNUM_OFF));
static volatile uint32_t * const INTDISNUM = ((volatile uint32_t *) (INTBASE + INTDISNUM_OFF));
static volatile uint32_t * const INTENABLE = ((volatile uint32_t *) (INTBASE + INTENABLE_OFF));
static volatile uint32_t * const INTSRC = ((volatile uint32_t *) (INTBASE + INTSRC_OFF));
static volatile uint32_t * const INTFRC = ((volatile uint32_t *) (INTBASE + INTFRC_OFF));
static volatile uint32_t * const NIPEND = ((volatile uint32_t *) (INTBASE + NIPEND_OFF));
enum interrupt_nums {
INT_NUM_ASM = 0,
INT_NUM_UART1,
INT_NUM_UART2,
INT_NUM_CRM,
INT_NUM_I2C,
INT_NUM_TMR,
INT_NUM_SPIF,
INT_NUM_MACA,
INT_NUM_SSI,
INT_NUM_ADC,
INT_NUM_SPI,
};
#define global_irq_disable() (set_bit(*INTCNTL,20))
#define global_irq_enable() (clear_bit(*INTCNTL,20))
#define enable_irq(irq) (*INTENNUM = irq)
#define disable_irq(irq) (*INTDISNUM = irq)
#define safe_irq_disable(x) volatile uint32_t saved_irq; saved_irq = *INTENABLE; disable_irq(x)
#define irq_restore() *INTENABLE = saved_irq
#endif /* REG_NO_COMPAT */
/* Macro to safely disable all interrupts for a block of code.
Use it like this:
disable_int({
asdf = 1234;
printf("hi\r\n");
});
*/
#define __int_top() volatile uint32_t saved_intenable
#define __int_disable() saved_intenable = ITC->INTENABLE; ITC->INTENABLE = 0
#define __int_enable() ITC->INTENABLE = saved_intenable
#define disable_int(x) do { \
__int_top(); \
__int_disable(); \
x; \
__int_enable(); } while(0)
extern void tmr0_isr(void) __attribute__((weak));
extern void tmr1_isr(void) __attribute__((weak));
extern void tmr2_isr(void) __attribute__((weak));
extern void tmr3_isr(void) __attribute__((weak));
extern void rtc_isr(void) __attribute__((weak));
extern void kbi4_isr(void) __attribute__((weak));
extern void kbi5_isr(void) __attribute__((weak));
extern void kbi6_isr(void) __attribute__((weak));
extern void kbi7_isr(void) __attribute__((weak));
extern void cal_isr(void) __attribute__((weak));
extern void uart1_isr(void) __attribute__((weak));
extern void uart2_isr(void) __attribute__((weak));
extern void maca_isr(void) __attribute__((weak));
extern void asm_isr(void) __attribute__((weak));
extern void i2c_isr(void) __attribute__((weak));
#endif /* MC1322X_H */

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.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
.gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) }
}

56
cpu/mc1322x/mc1322x_syscalls.c Normal file
View File

@ -0,0 +1,56 @@
/*
* mc1322x_syscalls.c - MCU dependent syscall implementation
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
*
* This file is part of RIOT.
*/
#include <errno.h>
#include <stdint.h>
#include <stdlib.h>
#include <sys/types.h>
#include "irq.h"
extern uintptr_t __heap_start; ///< start of heap memory space
extern uintptr_t __heap_end; ///< maximum for end of heap memory space
/// current position in heap
static caddr_t heap = (caddr_t)&__heap_start;
/// maximum position in heap
static const caddr_t heap_max = (caddr_t)&__heap_end;
// start position in heap
static const caddr_t heap_start = (caddr_t)&__heap_start;
/*-----------------------------------------------------------------------------------*/
caddr_t _sbrk_r(struct _reent *r, size_t incr)
{
uint32_t cpsr = disableIRQ();
/* check all heaps for a chunk of the requested size */
caddr_t new_heap = heap + incr;
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, heap);
#endif
if( new_heap <= heap_max ) {
caddr_t prev_heap = heap;
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, new_heap);
#endif
heap = new_heap;
r->_errno = 0;
restoreIRQ(cpsr);
return prev_heap;
}
restoreIRQ(cpsr);
#ifdef MODULE_TRACELOG
trace_string(TRACELOG_EV_MEMORY, "heap!"); // heap full
#endif
r->_errno = ENOMEM;
return NULL;
}

184
cpu/mc1322x/startup.s Normal file
View File

@ -0,0 +1,184 @@
/*
* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
* to the MC1322x project (http:/*mc1322x.devl.org) and Contiki.
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the Contiki OS.
*
*
*/
/*
The following lincence is for all parts of this code done by
Martin Thomas. Code from others used here may have other license terms.
Copyright (C) 2004 Martin THOMAS
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
the Software, and to permit persons to whom the Software is furnished to do so,
subject to the following conditions:
! The above copyright notice and this permission notice shall be included in all
! copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs (program status registers) */
.set MODE_USR, 0x10 /* Normal User Mode */
.set MODE_FIQ, 0x11 /* FIQ Processing Fast Interrupts Mode */
.set MODE_IRQ, 0x12 /* IRQ Processing Standard Interrupts Mode */
.set MODE_SVC, 0x13 /* Supervisor Processing Software Interrupts Mode */
.set MODE_ABT, 0x17 /* Abort Processing memory Faults Mode */
.set MODE_UND, 0x1B /* Undefined Processing Undefined Instructions Mode */
.set MODE_SYS, 0x1F /* System Running Priviledged Operating System Tasks Mode */
.set I_BIT, 0x80 /* when I bit is set, IRQ is disabled (program status registers) */
.set F_BIT, 0x40 /* when F bit is set, FIQ is disabled (program status registers) */
.section .startup
.set _rom_data_init, 0x108d0
.global _startup
.func _startup
_startup:
b _begin /* reset - _start */
ldr PC, Undef_Addr /* Undefined Instruction */
ldr PC, SWI_Addr /* Software Interrupt */
ldr PC, PAbt_Addr /* Prefetch Abort */
ldr PC, DAbt_Addr /* Data Abort */
nop /* Reserved Vector (holds Philips ISP checksum) */
/* see page 71 of "Insiders Guide to the Philips ARM7-Based Microcontrollers" by Trevor Martin */
/* ldr PC, [PC,#-0x0120] /* Interrupt Request Interrupt (load from VIC) */
ldr PC, IRQ_Addr /* Interrupt Request Interrupt (load from VIC) */
ldr r0, =__fiq_handler /* Fast Interrupt Request Interrupt */
/* these vectors are used for rom patching */
.org 0x20
.code 16
_RPTV_0_START:
bx lr /* do nothing */
.org 0x60
_RPTV_1_START:
bx lr /* do nothing */
.org 0xa0
_RPTV_2_START:
bx lr /* do nothing */
.org 0xe0
_RPTV_3_START:
bx lr /* do nothing */
.org 0x120
ROM_var_start: .word 0
.org 0x7ff
ROM_var_end: .word 0
.code 32
.align
_begin:
/* FIQ mode stack */
msr CPSR_c, #(MODE_FIQ | I_BIT | F_BIT)
ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */
/* IRQ mode stack */
msr CPSR_c, #(MODE_IRQ | I_BIT | F_BIT)
ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */
/* Supervisor mode stack */
msr CPSR_c, #(MODE_SVC | I_BIT | F_BIT)
ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */
/* Undefined mode stack */
msr CPSR_c, #(MODE_UND | I_BIT | F_BIT)
ldr sp, =__und_stack_top__ /* set the UND stack pointer */
/* Abort mode stack */
msr CPSR_c, #(MODE_ABT | I_BIT | F_BIT)
ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */
/* System mode stack */
msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT)
ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */
/* call the rom_data_init function in ROM */
/* initializes ROM_var space defined by ROM_var_start and ROM_var_end */
/* this area is used by ROM functions (e.g. nvm_read) */
ldr r12,=_rom_data_init
mov lr,pc
bx r12
msr CPSR_c, #(MODE_SYS)
/* Clear BSS */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
clbss_l:
str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
blt clbss_l
b main
/* Exception vector handlers branching table */
Undef_Addr: .word UNDEF_Routine /* defined in main.c */
SWI_Addr: .word ctx_switch /* defined in main.c */
PAbt_Addr: .word PABT_Routine /* defined in main.c */
DAbt_Addr: .word DABT_Routine /* defined in main.c */
IRQ_Addr: .word arm_irq_handler /* defined in main.c */
__fiq_handler: .word __fiq /* FIQ */
__fiq: b . /* FIQ */
/*
* These are defined in the board-specific linker script.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_end
_bss_end:
.word _end

2
doc/doxygen/Makefile
View File

@ -1,3 +1,5 @@
doc:
doxygen riot.doxyfile
clean:
@rm -rf latex man html

2
drivers/cc110x_ng/cc110x-rx.c
View File

@ -27,7 +27,7 @@
#include <transceiver.h>
#include <cpu-conf.h>
#include <board.h>
//#include <board.h>
#ifdef DBG_IGNORE
#include <stdio.h>

2
drivers/cc110x_ng/cc110x-tx.c
View File

@ -26,7 +26,7 @@
#include <irq.h>
#include <board.h>
//#include <board.h>
uint8_t cc110x_send(cc110x_packet_t *packet)
{

2
sys/chardev_thread.c
View File

@ -76,7 +76,7 @@ void chardev_loop(ringbuffer_t *rb)
msg_reply(&m, &m);
}
else {
r = (struct posix_iop_t *)m.content.ptr;
r = (struct posix_iop_t *)(void*)m.content.ptr;
}
break;

2
sys/include/transceiver.h
View File

@ -31,6 +31,7 @@
#define TRANSCEIVER_CC1100 (0x01) ///< CC110X transceivers
#define TRANSCEIVER_CC1020 (0x02) ///< CC1020 transceivers
#define TRANSCEIVER_CC2420 (0x04) ///< CC2420 transceivers
#define TRANSCEIVER_CC2420 (0x08) ///< MC1322X transceivers
/**
* @brief Data type for transceiver specification
@ -45,6 +46,7 @@ enum transceiver_msg_type_t {
RCV_PKT_CC1020, ///< packet was received by CC1020 transceiver
RCV_PKT_CC1100, ///< packet was received by CC1100 transceiver
RCV_PKT_CC2420, ///< packet was received by CC2420 transceiver
RCV_PKT_MC1322X, ///< packet was received by mc1322x transceiver
/* Message types for transceiver <-> upper layer communication */
PKT_PENDING, ///< packet pending in transceiver buffer

2
sys/net/sixlowpan/sixlowip.c
View File

@ -37,9 +37,7 @@ uint8_t buffer[BUFFER_SIZE];
msg_t msg_queue[IP_PKT_RECV_BUF_SIZE];
ipv6_hdr_t *ipv6_buf;
struct icmpv6_hdr_t *icmp_buf;
uint8_t ipv6_ext_hdr_len;
uint8_t *nextheader;
iface_t iface;
uint8_t iface_addr_list_count = 0;
int udp_packet_handler_pid = 0;
int tcp_packet_handler_pid = 0;

3
sys/net/sixlowpan/sixlowmac.c
View File

@ -42,11 +42,8 @@ msg_t msg_q[RADIO_RCV_BUF_SIZE];
static uint8_t r_src_addr;
uint8_t buf[PAYLOAD_SIZE];
uint16_t packet_length;
static uint8_t macdsn;
mutex_t buf_mutex;
static radio_packet_t p;
static msg_t mesg;
int transceiver_type;

4
sys/net/sixlowpan/sixlownd.c
View File

@ -36,7 +36,6 @@
/* extern variables */
uint8_t opt_hdr_len = 0;
uint8_t ipv6_ext_hdr_len = 0;
uint16_t packet_length;
/* counter */
uint8_t abr_count = 0;
@ -45,9 +44,6 @@ uint8_t def_rtr_count = 0;
uint8_t rtr_sol_count = 0;
uint8_t prefix_count = 0;
/* global interface*/
iface_t iface;
/* datastructures */
abr_cache_t abr_cache[ABR_CACHE_SIZE];
nbr_cache_t nbr_cache[NBR_CACHE_SIZE];

2
sys/net/sixlowpan/sixlowpan.c
View File

@ -50,7 +50,7 @@ uint8_t max_frag_initial = 0;
uint8_t position;
uint8_t max_frag;
ipv6_hdr_t *ipv6_buf;
static ipv6_hdr_t *ipv6_buf;
/* length of compressed packet */
uint16_t comp_len;

67
sys/transceiver/transceiver.c
View File

@ -51,6 +51,12 @@
#endif
#endif
#ifdef MODULE_MC1322X
#include <mc1322x.h>
#include <maca.h>
#include <maca_packet.h>
#endif
#define ENABLE_DEBUG (0)
#include <debug.h>
@ -136,6 +142,9 @@ void transceiver_init(transceiver_type_t t)
if (t & (TRANSCEIVER_CC1100 | TRANSCEIVER_CC2420)) {
transceivers |= t;
}
else if (t & TRANSCEIVER_MC1322X) {
transceivers |= t;
}
else {
puts("Invalid transceiver type");
}
@ -165,6 +174,11 @@ int transceiver_start(void)
DEBUG("Transceiver started for CC2420\n");
cc2420_init(transceiver_pid);
}
#endif
#ifdef MODULE_MC1322X
else if (transceivers & TRANSCEIVER_MC1322X) {
maca_init();
}
#endif
return transceiver_pid;
}
@ -214,6 +228,7 @@ void run(void)
switch(m.type) {
case RCV_PKT_CC1020:
case RCV_PKT_CC1100:
case RCV_PKT_MC1322X:
receive_packet(m.type, m.content.value);
break;
case RCV_PKT_CC2420:
@ -317,6 +332,9 @@ static void receive_packet(uint16_t type, uint8_t pos)
case RCV_PKT_CC2420:
t = TRANSCEIVER_CC2420;
break;
case RCV_PKT_MC1322X:
t = TRANSCEIVER_MC1322X;
break;
default:
t = TRANSCEIVER_NONE;
break;
@ -346,6 +364,8 @@ static void receive_packet(uint16_t type, uint8_t pos)
#elif MODULE_CC110X
receive_cc1100_packet(trans_p);
#endif
} else if (type == RCV_PKT_MC1322X) {
receive_mc1322x_packet(trans_p);
}
else if (type == RCV_PKT_CC2420) {
#ifdef MODULE_CC2420
@ -438,6 +458,22 @@ void receive_cc2420_packet(radio_packet_t *trans_p) {
}
#endif
#ifdef MODULE_MC1322X
void receive_mc1322x_packet(radio_packet_t *trans_p) {
maca_packet_t* maca_pkt;
dINT();
maca_pkt = maca_get_rx_packet ();
trans_p->lqi = maca_pkt->lqi;
trans_p->length = maca_pkt->length;
memcpy((void*) &(data_buffer[transceiver_buffer_pos * PAYLOAD_SIZE]), maca_pkt->data, MACA_MAX_PAYLOAD_SIZE);
maca_free_packet( maca_pkt );
eINT();
trans_p->data = (uint8_t*) &(data_buffer[transceiver_buffer_pos * MACA_MAX_PAYLOAD_SIZE]);
}
#endif
/*------------------------------------------------------------------------------------*/
/*
* @brief Sends a radio packet to the receiver
@ -458,6 +494,9 @@ static uint8_t send_packet(transceiver_type_t t, void *pkt)
#ifdef MODULE_CC110X_NG
cc110x_packet_t cc110x_pkt;
#endif
//#ifdef MODULE_MC1322X
maca_packet_t* maca_pkt = maca_get_free_packet();
//#endif
#ifdef MODULE_CC2420
cc2420_packet_t cc2420_pkt;
@ -499,6 +538,13 @@ static uint8_t send_packet(transceiver_type_t t, void *pkt)
cc2420_pkt.frame.payload = p.data;
res = cc2420_send(&cc2420_pkt);
break;
#endif
#ifdef MODULE_MC1322X
case TRANSCEIVER_MC1322X:
maca_pkt->length = p.length;
memcpy(maca_pkt->data, p.data, p.length);
maca_set_tx_packet( maca_pkt );
res = 1;
#endif
default:
puts("Unknown transceiver");
@ -531,6 +577,11 @@ static int16_t set_channel(transceiver_type_t t, void *channel)
case TRANSCEIVER_CC2420:
#ifdef MODULE_CC2420
return cc2420_set_channel(c);
#endif
case TRANSCEIVER_MC1322X:
#ifdef MODULE_MC1322X
maca_set_channel(c);
return c; ///< TODO: should be changed! implement get channel
#endif
default:
return -1;
@ -557,6 +608,8 @@ static int16_t get_channel(transceiver_type_t t)
#ifdef MODULE_CC2420
return cc2420_get_channel();
#endif
case TRANSCEIVER_MC1322X:
///< TODO:implement return maca_get_channel();
default:
return -1;
}
@ -622,6 +675,10 @@ static int16_t get_address(transceiver_type_t t)
case TRANSCEIVER_CC2420:
#ifdef MODULE_CC2420
return cc2420_get_address();
#endif
#ifdef MODULE_MC1322X
case TRANSCEIVER_MC1322X:
return maca_get_address();
#endif
default:
return -1;
@ -650,6 +707,10 @@ static int16_t set_address(transceiver_type_t t, void *address)
case TRANSCEIVER_CC2420:
#ifdef MODULE_CC2420
return cc2420_set_address(addr);
#endif
#ifdef MODULE_MC1322X
case TRANSCEIVER_MC1322X:
return maca_set_address(addr);
#endif
default:
return -1;
@ -688,7 +749,11 @@ static void powerdown(transceiver_type_t t)
cc110x_switch_to_pwd();
#endif
break;
case TRANSCEIVER_MC1322X:
#ifdef MODULE_MC1322X
maca_off();
#endif
break;
default:
break;
}